1 /*
2 * AD7887 SPI ADC driver
3 *
4 * Copyright 2010 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8 #ifndef IIO_ADC_AD7887_H_
9 #define IIO_ADC_AD7887_H_
10
11 #define AD7887_REF_DIS (1 << 5) /* on-chip reference disable */
12 #define AD7887_DUAL (1 << 4) /* dual-channel mode */
13 #define AD7887_CH_AIN1 (1 << 3) /* convert on channel 1, DUAL=1 */
14 #define AD7887_CH_AIN0 (0 << 3) /* convert on channel 0, DUAL=0,1 */
15 #define AD7887_PM_MODE1 (0) /* CS based shutdown */
16 #define AD7887_PM_MODE2 (1) /* full on */
17 #define AD7887_PM_MODE3 (2) /* auto shutdown after conversion */
18 #define AD7887_PM_MODE4 (3) /* standby mode */
19
20 enum ad7887_channels {
21 AD7887_CH0,
22 AD7887_CH0_CH1,
23 AD7887_CH1,
24 };
25
26 #define RES_MASK(bits) ((1 << (bits)) - 1) /* TODO: move this into a common header */
27
28 /*
29 * TODO: struct ad7887_platform_data needs to go into include/linux/iio
30 */
31
32 struct ad7887_platform_data {
33 /* External Vref voltage applied */
34 u16 vref_mv;
35 /*
36 * AD7887:
37 * In single channel mode en_dual = flase, AIN1/Vref pins assumes its
38 * Vref function. In dual channel mode en_dual = true, AIN1 becomes the
39 * second input channel, and Vref is internally connected to Vdd.
40 */
41 bool en_dual;
42 /*
43 * AD7887:
44 * use_onchip_ref = true, the Vref is internally connected to the 2.500V
45 * Voltage reference. If use_onchip_ref = false, the reference voltage
46 * is supplied by AIN1/Vref
47 */
48 bool use_onchip_ref;
49 };
50
51 /**
52 * struct ad7887_chip_info - chip specifc information
53 * @int_vref_mv: the internal reference voltage
54 * @channel: channel specification
55 */
56
57 struct ad7887_chip_info {
58 u16 int_vref_mv;
59 struct iio_chan_spec channel[3];
60 };
61
62 struct ad7887_state {
63 struct spi_device *spi;
64 const struct ad7887_chip_info *chip_info;
65 struct regulator *reg;
66 size_t d_size;
67 u16 int_vref_mv;
68 struct spi_transfer xfer[4];
69 struct spi_message msg[3];
70 struct spi_message *ring_msg;
71 unsigned char tx_cmd_buf[8];
72
73 /*
74 * DMA (thus cache coherency maintenance) requires the
75 * transfer buffers to live in their own cache lines.
76 */
77
78 unsigned char data[4] ____cacheline_aligned;
79 };
80
81 enum ad7887_supported_device_ids {
82 ID_AD7887
83 };
84
85 #ifdef CONFIG_IIO_BUFFER
86 int ad7887_register_ring_funcs_and_init(struct iio_dev *indio_dev);
87 void ad7887_ring_cleanup(struct iio_dev *indio_dev);
88 #else /* CONFIG_IIO_BUFFER */
89
90 static inline int
ad7887_register_ring_funcs_and_init(struct iio_dev * indio_dev)91 ad7887_register_ring_funcs_and_init(struct iio_dev *indio_dev)
92 {
93 return 0;
94 }
95
ad7887_ring_cleanup(struct iio_dev * indio_dev)96 static inline void ad7887_ring_cleanup(struct iio_dev *indio_dev)
97 {
98 }
99 #endif /* CONFIG_IIO_BUFFER */
100 #endif /* IIO_ADC_AD7887_H_ */
101