1 #ifndef SPI_ADIS16204_H_
2 #define SPI_ADIS16204_H_
3
4 #define ADIS16204_STARTUP_DELAY 220 /* ms */
5
6 #define ADIS16204_READ_REG(a) a
7 #define ADIS16204_WRITE_REG(a) ((a) | 0x80)
8
9 #define ADIS16204_FLASH_CNT 0x00 /* Flash memory write count */
10 #define ADIS16204_SUPPLY_OUT 0x02 /* Output, power supply */
11 #define ADIS16204_XACCL_OUT 0x04 /* Output, x-axis accelerometer */
12 #define ADIS16204_YACCL_OUT 0x06 /* Output, y-axis accelerometer */
13 #define ADIS16204_AUX_ADC 0x08 /* Output, auxiliary ADC input */
14 #define ADIS16204_TEMP_OUT 0x0A /* Output, temperature */
15 #define ADIS16204_X_PEAK_OUT 0x0C /* Twos complement */
16 #define ADIS16204_Y_PEAK_OUT 0x0E /* Twos complement */
17 #define ADIS16204_XACCL_NULL 0x10 /* Calibration, x-axis acceleration offset null */
18 #define ADIS16204_YACCL_NULL 0x12 /* Calibration, y-axis acceleration offset null */
19 #define ADIS16204_XACCL_SCALE 0x14 /* X-axis scale factor calibration register */
20 #define ADIS16204_YACCL_SCALE 0x16 /* Y-axis scale factor calibration register */
21 #define ADIS16204_XY_RSS_OUT 0x18 /* XY combined acceleration (RSS) */
22 #define ADIS16204_XY_PEAK_OUT 0x1A /* Peak, XY combined output (RSS) */
23 #define ADIS16204_CAP_BUF_1 0x1C /* Capture buffer output register 1 */
24 #define ADIS16204_CAP_BUF_2 0x1E /* Capture buffer output register 2 */
25 #define ADIS16204_ALM_MAG1 0x20 /* Alarm 1 amplitude threshold */
26 #define ADIS16204_ALM_MAG2 0x22 /* Alarm 2 amplitude threshold */
27 #define ADIS16204_ALM_CTRL 0x28 /* Alarm control */
28 #define ADIS16204_CAPT_PNTR 0x2A /* Capture register address pointer */
29 #define ADIS16204_AUX_DAC 0x30 /* Auxiliary DAC data */
30 #define ADIS16204_GPIO_CTRL 0x32 /* General-purpose digital input/output control */
31 #define ADIS16204_MSC_CTRL 0x34 /* Miscellaneous control */
32 #define ADIS16204_SMPL_PRD 0x36 /* Internal sample period (rate) control */
33 #define ADIS16204_AVG_CNT 0x38 /* Operation, filter configuration */
34 #define ADIS16204_SLP_CNT 0x3A /* Operation, sleep mode control */
35 #define ADIS16204_DIAG_STAT 0x3C /* Diagnostics, system status register */
36 #define ADIS16204_GLOB_CMD 0x3E /* Operation, system command register */
37
38 #define ADIS16204_OUTPUTS 5
39
40 /* MSC_CTRL */
41 #define ADIS16204_MSC_CTRL_PWRUP_SELF_TEST (1 << 10) /* Self-test at power-on: 1 = disabled, 0 = enabled */
42 #define ADIS16204_MSC_CTRL_SELF_TEST_EN (1 << 8) /* Self-test enable */
43 #define ADIS16204_MSC_CTRL_DATA_RDY_EN (1 << 2) /* Data-ready enable: 1 = enabled, 0 = disabled */
44 #define ADIS16204_MSC_CTRL_ACTIVE_HIGH (1 << 1) /* Data-ready polarity: 1 = active high, 0 = active low */
45 #define ADIS16204_MSC_CTRL_DATA_RDY_DIO2 (1 << 0) /* Data-ready line selection: 1 = DIO2, 0 = DIO1 */
46
47 /* DIAG_STAT */
48 #define ADIS16204_DIAG_STAT_ALARM2 (1<<9) /* Alarm 2 status: 1 = alarm active, 0 = alarm inactive */
49 #define ADIS16204_DIAG_STAT_ALARM1 (1<<8) /* Alarm 1 status: 1 = alarm active, 0 = alarm inactive */
50 #define ADIS16204_DIAG_STAT_SELFTEST_FAIL (1<<5) /* Self-test diagnostic error flag: 1 = error condition,
51 0 = normal operation */
52 #define ADIS16204_DIAG_STAT_SPI_FAIL (1<<3) /* SPI communications failure */
53 #define ADIS16204_DIAG_STAT_FLASH_UPT (1<<2) /* Flash update failure */
54 #define ADIS16204_DIAG_STAT_POWER_HIGH (1<<1) /* Power supply above 3.625 V */
55 #define ADIS16204_DIAG_STAT_POWER_LOW (1<<0) /* Power supply below 2.975 V */
56
57 /* GLOB_CMD */
58 #define ADIS16204_GLOB_CMD_SW_RESET (1<<7)
59 #define ADIS16204_GLOB_CMD_CLEAR_STAT (1<<4)
60 #define ADIS16204_GLOB_CMD_FACTORY_CAL (1<<1)
61
62 #define ADIS16204_MAX_TX 24
63 #define ADIS16204_MAX_RX 24
64
65 #define ADIS16204_ERROR_ACTIVE (1<<14)
66
67 /**
68 * struct adis16204_state - device instance specific data
69 * @us: actual spi_device
70 * @trig: data ready trigger registered with iio
71 * @tx: transmit buffer
72 * @rx: receive buffer
73 * @buf_lock: mutex to protect tx and rx
74 **/
75 struct adis16204_state {
76 struct spi_device *us;
77 struct iio_trigger *trig;
78 struct mutex buf_lock;
79 u8 tx[ADIS16204_MAX_TX] ____cacheline_aligned;
80 u8 rx[ADIS16204_MAX_RX];
81 };
82
83 int adis16204_set_irq(struct iio_dev *indio_dev, bool enable);
84
85 enum adis16204_scan {
86 ADIS16204_SCAN_SUPPLY,
87 ADIS16204_SCAN_ACC_X,
88 ADIS16204_SCAN_ACC_Y,
89 ADIS16204_SCAN_AUX_ADC,
90 ADIS16204_SCAN_TEMP,
91 };
92
93 #ifdef CONFIG_IIO_BUFFER
94 void adis16204_remove_trigger(struct iio_dev *indio_dev);
95 int adis16204_probe_trigger(struct iio_dev *indio_dev);
96
97 ssize_t adis16204_read_data_from_ring(struct device *dev,
98 struct device_attribute *attr,
99 char *buf);
100
101 int adis16204_configure_ring(struct iio_dev *indio_dev);
102 void adis16204_unconfigure_ring(struct iio_dev *indio_dev);
103
104 #else /* CONFIG_IIO_BUFFER */
105
adis16204_remove_trigger(struct iio_dev * indio_dev)106 static inline void adis16204_remove_trigger(struct iio_dev *indio_dev)
107 {
108 }
109
adis16204_probe_trigger(struct iio_dev * indio_dev)110 static inline int adis16204_probe_trigger(struct iio_dev *indio_dev)
111 {
112 return 0;
113 }
114
115 static inline ssize_t
adis16204_read_data_from_ring(struct device * dev,struct device_attribute * attr,char * buf)116 adis16204_read_data_from_ring(struct device *dev,
117 struct device_attribute *attr,
118 char *buf)
119 {
120 return 0;
121 }
122
adis16204_configure_ring(struct iio_dev * indio_dev)123 static int adis16204_configure_ring(struct iio_dev *indio_dev)
124 {
125 return 0;
126 }
127
adis16204_unconfigure_ring(struct iio_dev * indio_dev)128 static inline void adis16204_unconfigure_ring(struct iio_dev *indio_dev)
129 {
130 }
131
132 #endif /* CONFIG_IIO_BUFFER */
133 #endif /* SPI_ADIS16204_H_ */
134