1 #ifndef SPI_ADIS16201_H_
2 #define SPI_ADIS16201_H_
3 
4 #define ADIS16201_STARTUP_DELAY	220 /* ms */
5 
6 #define ADIS16201_READ_REG(a)    a
7 #define ADIS16201_WRITE_REG(a) ((a) | 0x80)
8 
9 #define ADIS16201_FLASH_CNT      0x00 /* Flash memory write count */
10 #define ADIS16201_SUPPLY_OUT     0x02 /* Output, power supply */
11 #define ADIS16201_XACCL_OUT      0x04 /* Output, x-axis accelerometer */
12 #define ADIS16201_YACCL_OUT      0x06 /* Output, y-axis accelerometer */
13 #define ADIS16201_AUX_ADC        0x08 /* Output, auxiliary ADC input */
14 #define ADIS16201_TEMP_OUT       0x0A /* Output, temperature */
15 #define ADIS16201_XINCL_OUT      0x0C /* Output, x-axis inclination */
16 #define ADIS16201_YINCL_OUT      0x0E /* Output, y-axis inclination */
17 #define ADIS16201_XACCL_OFFS     0x10 /* Calibration, x-axis acceleration offset */
18 #define ADIS16201_YACCL_OFFS     0x12 /* Calibration, y-axis acceleration offset */
19 #define ADIS16201_XACCL_SCALE    0x14 /* x-axis acceleration scale factor */
20 #define ADIS16201_YACCL_SCALE    0x16 /* y-axis acceleration scale factor */
21 #define ADIS16201_XINCL_OFFS     0x18 /* Calibration, x-axis inclination offset */
22 #define ADIS16201_YINCL_OFFS     0x1A /* Calibration, y-axis inclination offset */
23 #define ADIS16201_XINCL_SCALE    0x1C /* x-axis inclination scale factor */
24 #define ADIS16201_YINCL_SCALE    0x1E /* y-axis inclination scale factor */
25 #define ADIS16201_ALM_MAG1       0x20 /* Alarm 1 amplitude threshold */
26 #define ADIS16201_ALM_MAG2       0x22 /* Alarm 2 amplitude threshold */
27 #define ADIS16201_ALM_SMPL1      0x24 /* Alarm 1, sample period */
28 #define ADIS16201_ALM_SMPL2      0x26 /* Alarm 2, sample period */
29 #define ADIS16201_ALM_CTRL       0x28 /* Alarm control */
30 #define ADIS16201_AUX_DAC        0x30 /* Auxiliary DAC data */
31 #define ADIS16201_GPIO_CTRL      0x32 /* General-purpose digital input/output control */
32 #define ADIS16201_MSC_CTRL       0x34 /* Miscellaneous control */
33 #define ADIS16201_SMPL_PRD       0x36 /* Internal sample period (rate) control */
34 #define ADIS16201_AVG_CNT        0x38 /* Operation, filter configuration */
35 #define ADIS16201_SLP_CNT        0x3A /* Operation, sleep mode control */
36 #define ADIS16201_DIAG_STAT      0x3C /* Diagnostics, system status register */
37 #define ADIS16201_GLOB_CMD       0x3E /* Operation, system command register */
38 
39 #define ADIS16201_OUTPUTS        7
40 
41 /* MSC_CTRL */
42 #define ADIS16201_MSC_CTRL_SELF_TEST_EN	        (1 << 8)  /* Self-test enable */
43 #define ADIS16201_MSC_CTRL_DATA_RDY_EN	        (1 << 2)  /* Data-ready enable: 1 = enabled, 0 = disabled */
44 #define ADIS16201_MSC_CTRL_ACTIVE_HIGH	        (1 << 1)  /* Data-ready polarity: 1 = active high, 0 = active low */
45 #define ADIS16201_MSC_CTRL_DATA_RDY_DIO1	(1 << 0)  /* Data-ready line selection: 1 = DIO1, 0 = DIO0 */
46 
47 /* DIAG_STAT */
48 #define ADIS16201_DIAG_STAT_ALARM2        (1<<9) /* Alarm 2 status: 1 = alarm active, 0 = alarm inactive */
49 #define ADIS16201_DIAG_STAT_ALARM1        (1<<8) /* Alarm 1 status: 1 = alarm active, 0 = alarm inactive */
50 #define ADIS16201_DIAG_STAT_SPI_FAIL	  (1<<3) /* SPI communications failure */
51 #define ADIS16201_DIAG_STAT_FLASH_UPT	  (1<<2) /* Flash update failure */
52 #define ADIS16201_DIAG_STAT_POWER_HIGH	  (1<<1) /* Power supply above 3.625 V */
53 #define ADIS16201_DIAG_STAT_POWER_LOW	  (1<<0) /* Power supply below 3.15 V */
54 
55 /* GLOB_CMD */
56 #define ADIS16201_GLOB_CMD_SW_RESET	(1<<7)
57 #define ADIS16201_GLOB_CMD_FACTORY_CAL	(1<<1)
58 
59 #define ADIS16201_MAX_TX 14
60 #define ADIS16201_MAX_RX 14
61 
62 #define ADIS16201_ERROR_ACTIVE          (1<<14)
63 
64 /**
65  * struct adis16201_state - device instance specific data
66  * @us:			actual spi_device
67  * @trig:		data ready trigger registered with iio
68  * @tx:			transmit buffer
69  * @rx:			receive buffer
70  * @buf_lock:		mutex to protect tx and rx
71  **/
72 struct adis16201_state {
73 	struct spi_device	*us;
74 	struct iio_trigger	*trig;
75 	struct mutex		buf_lock;
76 	u8			tx[14] ____cacheline_aligned;
77 	u8			rx[14];
78 };
79 
80 int adis16201_set_irq(struct iio_dev *indio_dev, bool enable);
81 
82 enum adis16201_scan {
83 	ADIS16201_SCAN_SUPPLY,
84 	ADIS16201_SCAN_ACC_X,
85 	ADIS16201_SCAN_ACC_Y,
86 	ADIS16201_SCAN_AUX_ADC,
87 	ADIS16201_SCAN_TEMP,
88 	ADIS16201_SCAN_INCLI_X,
89 	ADIS16201_SCAN_INCLI_Y,
90 };
91 
92 #ifdef CONFIG_IIO_BUFFER
93 void adis16201_remove_trigger(struct iio_dev *indio_dev);
94 int adis16201_probe_trigger(struct iio_dev *indio_dev);
95 
96 ssize_t adis16201_read_data_from_ring(struct device *dev,
97 				      struct device_attribute *attr,
98 				      char *buf);
99 
100 int adis16201_configure_ring(struct iio_dev *indio_dev);
101 void adis16201_unconfigure_ring(struct iio_dev *indio_dev);
102 
103 #else /* CONFIG_IIO_BUFFER */
104 
adis16201_remove_trigger(struct iio_dev * indio_dev)105 static inline void adis16201_remove_trigger(struct iio_dev *indio_dev)
106 {
107 }
108 
adis16201_probe_trigger(struct iio_dev * indio_dev)109 static inline int adis16201_probe_trigger(struct iio_dev *indio_dev)
110 {
111 	return 0;
112 }
113 
114 static inline ssize_t
adis16201_read_data_from_ring(struct device * dev,struct device_attribute * attr,char * buf)115 adis16201_read_data_from_ring(struct device *dev,
116 			      struct device_attribute *attr,
117 			      char *buf)
118 {
119 	return 0;
120 }
121 
adis16201_configure_ring(struct iio_dev * indio_dev)122 static int adis16201_configure_ring(struct iio_dev *indio_dev)
123 {
124 	return 0;
125 }
126 
adis16201_unconfigure_ring(struct iio_dev * indio_dev)127 static inline void adis16201_unconfigure_ring(struct iio_dev *indio_dev)
128 {
129 }
130 
adis16201_initialize_ring(struct iio_ring_buffer * ring)131 static inline int adis16201_initialize_ring(struct iio_ring_buffer *ring)
132 {
133 	return 0;
134 }
135 
adis16201_uninitialize_ring(struct iio_ring_buffer * ring)136 static inline void adis16201_uninitialize_ring(struct iio_ring_buffer *ring)
137 {
138 }
139 
140 #endif /* CONFIG_IIO_BUFFER */
141 #endif /* SPI_ADIS16201_H_ */
142