1 /******************************************************************************
2 *
3 * Copyright(c) 2009-2010 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * wlanfae <wlanfae@realtek.com>
23 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24 * Hsinchu 300, Taiwan.
25 *
26 * Larry Finger <Larry.Finger@lwfinger.net>
27 *
28 *****************************************************************************/
29
30 #include "../wifi.h"
31 #include "../base.h"
32 #include "reg.h"
33 #include "def.h"
34 #include "phy.h"
35 #include "dm.h"
36 #include "fw.h"
37
38 #define UNDEC_SM_PWDB entry_min_undecoratedsmoothed_pwdb
39
40 struct dig_t de_digtable;
41
42 static const u32 ofdmswing_table[OFDM_TABLE_SIZE_92D] = {
43 0x7f8001fe, /* 0, +6.0dB */
44 0x788001e2, /* 1, +5.5dB */
45 0x71c001c7, /* 2, +5.0dB */
46 0x6b8001ae, /* 3, +4.5dB */
47 0x65400195, /* 4, +4.0dB */
48 0x5fc0017f, /* 5, +3.5dB */
49 0x5a400169, /* 6, +3.0dB */
50 0x55400155, /* 7, +2.5dB */
51 0x50800142, /* 8, +2.0dB */
52 0x4c000130, /* 9, +1.5dB */
53 0x47c0011f, /* 10, +1.0dB */
54 0x43c0010f, /* 11, +0.5dB */
55 0x40000100, /* 12, +0dB */
56 0x3c8000f2, /* 13, -0.5dB */
57 0x390000e4, /* 14, -1.0dB */
58 0x35c000d7, /* 15, -1.5dB */
59 0x32c000cb, /* 16, -2.0dB */
60 0x300000c0, /* 17, -2.5dB */
61 0x2d4000b5, /* 18, -3.0dB */
62 0x2ac000ab, /* 19, -3.5dB */
63 0x288000a2, /* 20, -4.0dB */
64 0x26000098, /* 21, -4.5dB */
65 0x24000090, /* 22, -5.0dB */
66 0x22000088, /* 23, -5.5dB */
67 0x20000080, /* 24, -6.0dB */
68 0x1e400079, /* 25, -6.5dB */
69 0x1c800072, /* 26, -7.0dB */
70 0x1b00006c, /* 27. -7.5dB */
71 0x19800066, /* 28, -8.0dB */
72 0x18000060, /* 29, -8.5dB */
73 0x16c0005b, /* 30, -9.0dB */
74 0x15800056, /* 31, -9.5dB */
75 0x14400051, /* 32, -10.0dB */
76 0x1300004c, /* 33, -10.5dB */
77 0x12000048, /* 34, -11.0dB */
78 0x11000044, /* 35, -11.5dB */
79 0x10000040, /* 36, -12.0dB */
80 0x0f00003c, /* 37, -12.5dB */
81 0x0e400039, /* 38, -13.0dB */
82 0x0d800036, /* 39, -13.5dB */
83 0x0cc00033, /* 40, -14.0dB */
84 0x0c000030, /* 41, -14.5dB */
85 0x0b40002d, /* 42, -15.0dB */
86 };
87
88 static const u8 cckswing_table_ch1ch13[CCK_TABLE_SIZE][8] = {
89 {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, /* 0, +0dB */
90 {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 1, -0.5dB */
91 {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 2, -1.0dB */
92 {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 3, -1.5dB */
93 {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 4, -2.0dB */
94 {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 5, -2.5dB */
95 {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 6, -3.0dB */
96 {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 7, -3.5dB */
97 {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 8, -4.0dB */
98 {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 9, -4.5dB */
99 {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 10, -5.0dB */
100 {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 11, -5.5dB */
101 {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 12, -6.0dB */
102 {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 13, -6.5dB */
103 {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 14, -7.0dB */
104 {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 15, -7.5dB */
105 {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */
106 {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 17, -8.5dB */
107 {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 18, -9.0dB */
108 {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 19, -9.5dB */
109 {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 20, -10.0dB */
110 {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 21, -10.5dB */
111 {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 22, -11.0dB */
112 {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 23, -11.5dB */
113 {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 24, -12.0dB */
114 {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 25, -12.5dB */
115 {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 26, -13.0dB */
116 {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 27, -13.5dB */
117 {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 28, -14.0dB */
118 {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 29, -14.5dB */
119 {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 30, -15.0dB */
120 {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 31, -15.5dB */
121 {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} /* 32, -16.0dB */
122 };
123
124 static const u8 cckswing_table_ch14[CCK_TABLE_SIZE][8] = {
125 {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, /* 0, +0dB */
126 {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 1, -0.5dB */
127 {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 2, -1.0dB */
128 {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 3, -1.5dB */
129 {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 4, -2.0dB */
130 {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 5, -2.5dB */
131 {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 6, -3.0dB */
132 {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 7, -3.5dB */
133 {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 8, -4.0dB */
134 {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 9, -4.5dB */
135 {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 10, -5.0dB */
136 {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 11, -5.5dB */
137 {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 12, -6.0dB */
138 {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 13, -6.5dB */
139 {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 14, -7.0dB */
140 {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 15, -7.5dB */
141 {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */
142 {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 17, -8.5dB */
143 {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 18, -9.0dB */
144 {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 19, -9.5dB */
145 {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 20, -10.0dB */
146 {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 21, -10.5dB */
147 {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 22, -11.0dB */
148 {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 23, -11.5dB */
149 {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 24, -12.0dB */
150 {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 25, -12.5dB */
151 {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 26, -13.0dB */
152 {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 27, -13.5dB */
153 {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 28, -14.0dB */
154 {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 29, -14.5dB */
155 {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 30, -15.0dB */
156 {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 31, -15.5dB */
157 {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} /* 32, -16.0dB */
158 };
159
rtl92d_dm_diginit(struct ieee80211_hw * hw)160 static void rtl92d_dm_diginit(struct ieee80211_hw *hw)
161 {
162 de_digtable.dig_enable_flag = true;
163 de_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
164 de_digtable.cur_igvalue = 0x20;
165 de_digtable.pre_igvalue = 0x0;
166 de_digtable.cursta_connectctate = DIG_STA_DISCONNECT;
167 de_digtable.presta_connectstate = DIG_STA_DISCONNECT;
168 de_digtable.curmultista_connectstate = DIG_MULTISTA_DISCONNECT;
169 de_digtable.rssi_lowthresh = DM_DIG_THRESH_LOW;
170 de_digtable.rssi_highthresh = DM_DIG_THRESH_HIGH;
171 de_digtable.fa_lowthresh = DM_FALSEALARM_THRESH_LOW;
172 de_digtable.fa_highthresh = DM_FALSEALARM_THRESH_HIGH;
173 de_digtable.rx_gain_range_max = DM_DIG_FA_UPPER;
174 de_digtable.rx_gain_range_min = DM_DIG_FA_LOWER;
175 de_digtable.backoff_val = DM_DIG_BACKOFF_DEFAULT;
176 de_digtable.backoff_val_range_max = DM_DIG_BACKOFF_MAX;
177 de_digtable.backoff_val_range_min = DM_DIG_BACKOFF_MIN;
178 de_digtable.pre_cck_pd_state = CCK_PD_STAGE_LOWRSSI;
179 de_digtable.cur_cck_pd_state = CCK_PD_STAGE_MAX;
180 de_digtable.large_fa_hit = 0;
181 de_digtable.recover_cnt = 0;
182 de_digtable.forbidden_igi = DM_DIG_FA_LOWER;
183 }
184
rtl92d_dm_false_alarm_counter_statistics(struct ieee80211_hw * hw)185 static void rtl92d_dm_false_alarm_counter_statistics(struct ieee80211_hw *hw)
186 {
187 u32 ret_value;
188 struct rtl_priv *rtlpriv = rtl_priv(hw);
189 struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt);
190 unsigned long flag = 0;
191
192 /* hold ofdm counter */
193 rtl_set_bbreg(hw, ROFDM0_LSTF, BIT(31), 1); /* hold page C counter */
194 rtl_set_bbreg(hw, ROFDM1_LSTF, BIT(31), 1); /*hold page D counter */
195
196 ret_value = rtl_get_bbreg(hw, ROFDM0_FRAMESYNC, BMASKDWORD);
197 falsealm_cnt->cnt_fast_fsync_fail = (ret_value & 0xffff);
198 falsealm_cnt->cnt_sb_search_fail = ((ret_value & 0xffff0000) >> 16);
199 ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER1, BMASKDWORD);
200 falsealm_cnt->cnt_parity_fail = ((ret_value & 0xffff0000) >> 16);
201 ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER2, BMASKDWORD);
202 falsealm_cnt->cnt_rate_illegal = (ret_value & 0xffff);
203 falsealm_cnt->cnt_crc8_fail = ((ret_value & 0xffff0000) >> 16);
204 ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER3, BMASKDWORD);
205 falsealm_cnt->cnt_mcs_fail = (ret_value & 0xffff);
206 falsealm_cnt->cnt_ofdm_fail = falsealm_cnt->cnt_parity_fail +
207 falsealm_cnt->cnt_rate_illegal +
208 falsealm_cnt->cnt_crc8_fail +
209 falsealm_cnt->cnt_mcs_fail +
210 falsealm_cnt->cnt_fast_fsync_fail +
211 falsealm_cnt->cnt_sb_search_fail;
212
213 if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G) {
214 /* hold cck counter */
215 rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
216 ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERLOWER, BMASKBYTE0);
217 falsealm_cnt->cnt_cck_fail = ret_value;
218 ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERUPPER, BMASKBYTE3);
219 falsealm_cnt->cnt_cck_fail += (ret_value & 0xff) << 8;
220 rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
221 } else {
222 falsealm_cnt->cnt_cck_fail = 0;
223 }
224
225 /* reset false alarm counter registers */
226 falsealm_cnt->cnt_all = falsealm_cnt->cnt_fast_fsync_fail +
227 falsealm_cnt->cnt_sb_search_fail +
228 falsealm_cnt->cnt_parity_fail +
229 falsealm_cnt->cnt_rate_illegal +
230 falsealm_cnt->cnt_crc8_fail +
231 falsealm_cnt->cnt_mcs_fail +
232 falsealm_cnt->cnt_cck_fail;
233
234 rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 1);
235 /* update ofdm counter */
236 rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 0);
237 /* update page C counter */
238 rtl_set_bbreg(hw, ROFDM0_LSTF, BIT(31), 0);
239 /* update page D counter */
240 rtl_set_bbreg(hw, ROFDM1_LSTF, BIT(31), 0);
241 if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G) {
242 /* reset cck counter */
243 rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
244 rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 0);
245 /* enable cck counter */
246 rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 2);
247 rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
248 }
249 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, ("Cnt_Fast_Fsync_fail = %x, "
250 "Cnt_SB_Search_fail = %x\n",
251 falsealm_cnt->cnt_fast_fsync_fail,
252 falsealm_cnt->cnt_sb_search_fail));
253 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, ("Cnt_Parity_Fail = %x, "
254 "Cnt_Rate_Illegal = %x, Cnt_Crc8_fail = %x, "
255 "Cnt_Mcs_fail = %x\n",
256 falsealm_cnt->cnt_parity_fail,
257 falsealm_cnt->cnt_rate_illegal,
258 falsealm_cnt->cnt_crc8_fail,
259 falsealm_cnt->cnt_mcs_fail));
260 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
261 ("Cnt_Ofdm_fail = %x, " "Cnt_Cck_fail = %x, "
262 "Cnt_all = %x\n",
263 falsealm_cnt->cnt_ofdm_fail,
264 falsealm_cnt->cnt_cck_fail,
265 falsealm_cnt->cnt_all));
266 }
267
rtl92d_dm_find_minimum_rssi(struct ieee80211_hw * hw)268 static void rtl92d_dm_find_minimum_rssi(struct ieee80211_hw *hw)
269 {
270 struct rtl_priv *rtlpriv = rtl_priv(hw);
271 struct rtl_mac *mac = rtl_mac(rtlpriv);
272
273 /* Determine the minimum RSSI */
274 if ((mac->link_state < MAC80211_LINKED) &&
275 (rtlpriv->dm.UNDEC_SM_PWDB == 0)) {
276 de_digtable.min_undecorated_pwdb_for_dm = 0;
277 RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
278 ("Not connected to any\n"));
279 }
280 if (mac->link_state >= MAC80211_LINKED) {
281 if (mac->opmode == NL80211_IFTYPE_AP ||
282 mac->opmode == NL80211_IFTYPE_ADHOC) {
283 de_digtable.min_undecorated_pwdb_for_dm =
284 rtlpriv->dm.UNDEC_SM_PWDB;
285 RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
286 ("AP Client PWDB = 0x%lx\n",
287 rtlpriv->dm.UNDEC_SM_PWDB));
288 } else {
289 de_digtable.min_undecorated_pwdb_for_dm =
290 rtlpriv->dm.undecorated_smoothed_pwdb;
291 RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
292 ("STA Default Port PWDB = 0x%x\n",
293 de_digtable.min_undecorated_pwdb_for_dm));
294 }
295 } else {
296 de_digtable.min_undecorated_pwdb_for_dm =
297 rtlpriv->dm.UNDEC_SM_PWDB;
298 RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
299 ("AP Ext Port or disconnet PWDB = 0x%x\n",
300 de_digtable.min_undecorated_pwdb_for_dm));
301 }
302
303 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, ("MinUndecoratedPWDBForDM =%d\n",
304 de_digtable.min_undecorated_pwdb_for_dm));
305 }
306
rtl92d_dm_cck_packet_detection_thresh(struct ieee80211_hw * hw)307 static void rtl92d_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw)
308 {
309 struct rtl_priv *rtlpriv = rtl_priv(hw);
310 unsigned long flag = 0;
311
312 if (de_digtable.cursta_connectctate == DIG_STA_CONNECT) {
313 if (de_digtable.pre_cck_pd_state == CCK_PD_STAGE_LOWRSSI) {
314 if (de_digtable.min_undecorated_pwdb_for_dm <= 25)
315 de_digtable.cur_cck_pd_state =
316 CCK_PD_STAGE_LOWRSSI;
317 else
318 de_digtable.cur_cck_pd_state =
319 CCK_PD_STAGE_HIGHRSSI;
320 } else {
321 if (de_digtable.min_undecorated_pwdb_for_dm <= 20)
322 de_digtable.cur_cck_pd_state =
323 CCK_PD_STAGE_LOWRSSI;
324 else
325 de_digtable.cur_cck_pd_state =
326 CCK_PD_STAGE_HIGHRSSI;
327 }
328 } else {
329 de_digtable.cur_cck_pd_state = CCK_PD_STAGE_LOWRSSI;
330 }
331 if (de_digtable.pre_cck_pd_state != de_digtable.cur_cck_pd_state) {
332 if (de_digtable.cur_cck_pd_state == CCK_PD_STAGE_LOWRSSI) {
333 rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
334 rtl_set_bbreg(hw, RCCK0_CCA, BMASKBYTE2, 0x83);
335 rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
336 } else {
337 rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
338 rtl_set_bbreg(hw, RCCK0_CCA, BMASKBYTE2, 0xcd);
339 rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
340 }
341 de_digtable.pre_cck_pd_state = de_digtable.cur_cck_pd_state;
342 }
343 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, ("CurSTAConnectState=%s\n",
344 (de_digtable.cursta_connectctate == DIG_STA_CONNECT ?
345 "DIG_STA_CONNECT " : "DIG_STA_DISCONNECT")));
346 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, ("CCKPDStage=%s\n",
347 (de_digtable.cur_cck_pd_state == CCK_PD_STAGE_LOWRSSI ?
348 "Low RSSI " : "High RSSI ")));
349 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, ("is92d single phy =%x\n",
350 IS_92D_SINGLEPHY(rtlpriv->rtlhal.version)));
351
352 }
353
rtl92d_dm_write_dig(struct ieee80211_hw * hw)354 void rtl92d_dm_write_dig(struct ieee80211_hw *hw)
355 {
356 struct rtl_priv *rtlpriv = rtl_priv(hw);
357
358 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, ("cur_igvalue = 0x%x, "
359 "pre_igvalue = 0x%x, backoff_val = %d\n",
360 de_digtable.cur_igvalue, de_digtable.pre_igvalue,
361 de_digtable.backoff_val));
362 if (de_digtable.dig_enable_flag == false) {
363 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, ("DIG is disabled\n"));
364 de_digtable.pre_igvalue = 0x17;
365 return;
366 }
367 if (de_digtable.pre_igvalue != de_digtable.cur_igvalue) {
368 rtl_set_bbreg(hw, ROFDM0_XAAGCCORE1, 0x7f,
369 de_digtable.cur_igvalue);
370 rtl_set_bbreg(hw, ROFDM0_XBAGCCORE1, 0x7f,
371 de_digtable.cur_igvalue);
372 de_digtable.pre_igvalue = de_digtable.cur_igvalue;
373 }
374 }
375
rtl92d_early_mode_enabled(struct rtl_priv * rtlpriv)376 static void rtl92d_early_mode_enabled(struct rtl_priv *rtlpriv)
377 {
378 if ((rtlpriv->mac80211.link_state >= MAC80211_LINKED) &&
379 (rtlpriv->mac80211.vendor == PEER_CISCO)) {
380 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
381 ("IOT_PEER = CISCO\n"));
382 if (de_digtable.last_min_undecorated_pwdb_for_dm >= 50
383 && de_digtable.min_undecorated_pwdb_for_dm < 50) {
384 rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x00);
385 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
386 ("Early Mode Off\n"));
387 } else if (de_digtable.last_min_undecorated_pwdb_for_dm <= 55 &&
388 de_digtable.min_undecorated_pwdb_for_dm > 55) {
389 rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x0f);
390 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
391 ("Early Mode On\n"));
392 }
393 } else if (!(rtl_read_byte(rtlpriv, REG_EARLY_MODE_CONTROL) & 0xf)) {
394 rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x0f);
395 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, ("Early Mode On\n"));
396 }
397 }
398
rtl92d_dm_dig(struct ieee80211_hw * hw)399 static void rtl92d_dm_dig(struct ieee80211_hw *hw)
400 {
401 struct rtl_priv *rtlpriv = rtl_priv(hw);
402 u8 value_igi = de_digtable.cur_igvalue;
403 struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt);
404
405 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, ("==>\n"));
406 if (rtlpriv->rtlhal.earlymode_enable) {
407 rtl92d_early_mode_enabled(rtlpriv);
408 de_digtable.last_min_undecorated_pwdb_for_dm =
409 de_digtable.min_undecorated_pwdb_for_dm;
410 }
411 if (rtlpriv->dm.dm_initialgain_enable == false)
412 return;
413
414 /* because we will send data pkt when scanning
415 * this will cause some ap like gear-3700 wep TP
416 * lower if we retrun here, this is the diff of
417 * mac80211 driver vs ieee80211 driver */
418 /* if (rtlpriv->mac80211.act_scanning)
419 * return; */
420
421 /* Not STA mode return tmp */
422 if (rtlpriv->mac80211.opmode != NL80211_IFTYPE_STATION)
423 return;
424 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, ("progress\n"));
425 /* Decide the current status and if modify initial gain or not */
426 if (rtlpriv->mac80211.link_state >= MAC80211_LINKED)
427 de_digtable.cursta_connectctate = DIG_STA_CONNECT;
428 else
429 de_digtable.cursta_connectctate = DIG_STA_DISCONNECT;
430
431 /* adjust initial gain according to false alarm counter */
432 if (falsealm_cnt->cnt_all < DM_DIG_FA_TH0)
433 value_igi--;
434 else if (falsealm_cnt->cnt_all < DM_DIG_FA_TH1)
435 value_igi += 0;
436 else if (falsealm_cnt->cnt_all < DM_DIG_FA_TH2)
437 value_igi++;
438 else if (falsealm_cnt->cnt_all >= DM_DIG_FA_TH2)
439 value_igi += 2;
440 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
441 ("dm_DIG() Before: large_fa_hit=%d, forbidden_igi=%x\n",
442 de_digtable.large_fa_hit, de_digtable.forbidden_igi));
443 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
444 ("dm_DIG() Before: Recover_cnt=%d, rx_gain_range_min=%x\n",
445 de_digtable.recover_cnt, de_digtable.rx_gain_range_min));
446
447 /* deal with abnorally large false alarm */
448 if (falsealm_cnt->cnt_all > 10000) {
449 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
450 ("dm_DIG(): Abnornally false alarm case.\n"));
451
452 de_digtable.large_fa_hit++;
453 if (de_digtable.forbidden_igi < de_digtable.cur_igvalue) {
454 de_digtable.forbidden_igi = de_digtable.cur_igvalue;
455 de_digtable.large_fa_hit = 1;
456 }
457 if (de_digtable.large_fa_hit >= 3) {
458 if ((de_digtable.forbidden_igi + 1) > DM_DIG_MAX)
459 de_digtable.rx_gain_range_min = DM_DIG_MAX;
460 else
461 de_digtable.rx_gain_range_min =
462 (de_digtable.forbidden_igi + 1);
463 de_digtable.recover_cnt = 3600; /* 3600=2hr */
464 }
465 } else {
466 /* Recovery mechanism for IGI lower bound */
467 if (de_digtable.recover_cnt != 0) {
468 de_digtable.recover_cnt--;
469 } else {
470 if (de_digtable.large_fa_hit == 0) {
471 if ((de_digtable.forbidden_igi - 1) <
472 DM_DIG_FA_LOWER) {
473 de_digtable.forbidden_igi =
474 DM_DIG_FA_LOWER;
475 de_digtable.rx_gain_range_min =
476 DM_DIG_FA_LOWER;
477
478 } else {
479 de_digtable.forbidden_igi--;
480 de_digtable.rx_gain_range_min =
481 (de_digtable.forbidden_igi + 1);
482 }
483 } else if (de_digtable.large_fa_hit == 3) {
484 de_digtable.large_fa_hit = 0;
485 }
486 }
487 }
488 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
489 ("dm_DIG() After: large_fa_hit=%d, forbidden_igi=%x\n",
490 de_digtable.large_fa_hit, de_digtable.forbidden_igi));
491 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
492 ("dm_DIG() After: recover_cnt=%d, rx_gain_range_min=%x\n",
493 de_digtable.recover_cnt, de_digtable.rx_gain_range_min));
494
495 if (value_igi > DM_DIG_MAX)
496 value_igi = DM_DIG_MAX;
497 else if (value_igi < de_digtable.rx_gain_range_min)
498 value_igi = de_digtable.rx_gain_range_min;
499 de_digtable.cur_igvalue = value_igi;
500 rtl92d_dm_write_dig(hw);
501 if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G)
502 rtl92d_dm_cck_packet_detection_thresh(hw);
503 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, ("<<==\n"));
504 }
505
rtl92d_dm_init_dynamic_txpower(struct ieee80211_hw * hw)506 static void rtl92d_dm_init_dynamic_txpower(struct ieee80211_hw *hw)
507 {
508 struct rtl_priv *rtlpriv = rtl_priv(hw);
509
510 rtlpriv->dm.dynamic_txpower_enable = true;
511 rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
512 rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
513 }
514
rtl92d_dm_dynamic_txpower(struct ieee80211_hw * hw)515 static void rtl92d_dm_dynamic_txpower(struct ieee80211_hw *hw)
516 {
517 struct rtl_priv *rtlpriv = rtl_priv(hw);
518 struct rtl_phy *rtlphy = &(rtlpriv->phy);
519 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
520 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
521 long undecorated_smoothed_pwdb;
522
523 if ((!rtlpriv->dm.dynamic_txpower_enable)
524 || rtlpriv->dm.dm_flag & HAL_DM_HIPWR_DISABLE) {
525 rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
526 return;
527 }
528 if ((mac->link_state < MAC80211_LINKED) &&
529 (rtlpriv->dm.UNDEC_SM_PWDB == 0)) {
530 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
531 ("Not connected to any\n"));
532 rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
533 rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
534 return;
535 }
536 if (mac->link_state >= MAC80211_LINKED) {
537 if (mac->opmode == NL80211_IFTYPE_ADHOC) {
538 undecorated_smoothed_pwdb =
539 rtlpriv->dm.UNDEC_SM_PWDB;
540 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
541 ("IBSS Client PWDB = 0x%lx\n",
542 undecorated_smoothed_pwdb));
543 } else {
544 undecorated_smoothed_pwdb =
545 rtlpriv->dm.undecorated_smoothed_pwdb;
546 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
547 ("STA Default Port PWDB = 0x%lx\n",
548 undecorated_smoothed_pwdb));
549 }
550 } else {
551 undecorated_smoothed_pwdb =
552 rtlpriv->dm.UNDEC_SM_PWDB;
553
554 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
555 ("AP Ext Port PWDB = 0x%lx\n",
556 undecorated_smoothed_pwdb));
557 }
558 if (rtlhal->current_bandtype == BAND_ON_5G) {
559 if (undecorated_smoothed_pwdb >= 0x33) {
560 rtlpriv->dm.dynamic_txhighpower_lvl =
561 TXHIGHPWRLEVEL_LEVEL2;
562 RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD,
563 ("5G:TxHighPwrLevel_Level2 (TxPwr=0x0)\n"));
564 } else if ((undecorated_smoothed_pwdb < 0x33)
565 && (undecorated_smoothed_pwdb >= 0x2b)) {
566 rtlpriv->dm.dynamic_txhighpower_lvl =
567 TXHIGHPWRLEVEL_LEVEL1;
568 RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD,
569 ("5G:TxHighPwrLevel_Level1 (TxPwr=0x10)\n"));
570 } else if (undecorated_smoothed_pwdb < 0x2b) {
571 rtlpriv->dm.dynamic_txhighpower_lvl =
572 TXHIGHPWRLEVEL_NORMAL;
573 RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD,
574 ("5G:TxHighPwrLevel_Normal\n"));
575 }
576 } else {
577 if (undecorated_smoothed_pwdb >=
578 TX_POWER_NEAR_FIELD_THRESH_LVL2) {
579 rtlpriv->dm.dynamic_txhighpower_lvl =
580 TXHIGHPWRLEVEL_LEVEL2;
581 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
582 ("TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n"));
583 } else
584 if ((undecorated_smoothed_pwdb <
585 (TX_POWER_NEAR_FIELD_THRESH_LVL2 - 3))
586 && (undecorated_smoothed_pwdb >=
587 TX_POWER_NEAR_FIELD_THRESH_LVL1)) {
588
589 rtlpriv->dm.dynamic_txhighpower_lvl =
590 TXHIGHPWRLEVEL_LEVEL1;
591 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
592 ("TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n"));
593 } else if (undecorated_smoothed_pwdb <
594 (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) {
595 rtlpriv->dm.dynamic_txhighpower_lvl =
596 TXHIGHPWRLEVEL_NORMAL;
597 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
598 ("TXHIGHPWRLEVEL_NORMAL\n"));
599 }
600 }
601 if ((rtlpriv->dm.dynamic_txhighpower_lvl != rtlpriv->dm.last_dtp_lvl)) {
602 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
603 ("PHY_SetTxPowerLevel8192S() Channel = %d\n",
604 rtlphy->current_channel));
605 rtl92d_phy_set_txpower_level(hw, rtlphy->current_channel);
606 }
607 rtlpriv->dm.last_dtp_lvl = rtlpriv->dm.dynamic_txhighpower_lvl;
608 }
609
rtl92d_dm_pwdb_monitor(struct ieee80211_hw * hw)610 static void rtl92d_dm_pwdb_monitor(struct ieee80211_hw *hw)
611 {
612 struct rtl_priv *rtlpriv = rtl_priv(hw);
613
614 /* AP & ADHOC & MESH will return tmp */
615 if (rtlpriv->mac80211.opmode != NL80211_IFTYPE_STATION)
616 return;
617 /* Indicate Rx signal strength to FW. */
618 if (rtlpriv->dm.useramask) {
619 u32 temp = rtlpriv->dm.undecorated_smoothed_pwdb;
620
621 temp <<= 16;
622 temp |= 0x100;
623 /* fw v12 cmdid 5:use max macid ,for nic ,
624 * default macid is 0 ,max macid is 1 */
625 rtl92d_fill_h2c_cmd(hw, H2C_RSSI_REPORT, 3, (u8 *) (&temp));
626 } else {
627 rtl_write_byte(rtlpriv, 0x4fe,
628 (u8) rtlpriv->dm.undecorated_smoothed_pwdb);
629 }
630 }
631
rtl92d_dm_init_edca_turbo(struct ieee80211_hw * hw)632 void rtl92d_dm_init_edca_turbo(struct ieee80211_hw *hw)
633 {
634 struct rtl_priv *rtlpriv = rtl_priv(hw);
635
636 rtlpriv->dm.current_turbo_edca = false;
637 rtlpriv->dm.is_any_nonbepkts = false;
638 rtlpriv->dm.is_cur_rdlstate = false;
639 }
640
rtl92d_dm_check_edca_turbo(struct ieee80211_hw * hw)641 static void rtl92d_dm_check_edca_turbo(struct ieee80211_hw *hw)
642 {
643 struct rtl_priv *rtlpriv = rtl_priv(hw);
644 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
645 static u64 last_txok_cnt;
646 static u64 last_rxok_cnt;
647 u64 cur_txok_cnt;
648 u64 cur_rxok_cnt;
649 u32 edca_be_ul = 0x5ea42b;
650 u32 edca_be_dl = 0x5ea42b;
651
652 if (mac->link_state != MAC80211_LINKED) {
653 rtlpriv->dm.current_turbo_edca = false;
654 goto exit;
655 }
656
657 /* Enable BEQ TxOP limit configuration in wireless G-mode. */
658 /* To check whether we shall force turn on TXOP configuration. */
659 if ((!rtlpriv->dm.disable_framebursting) &&
660 (rtlpriv->sec.pairwise_enc_algorithm == WEP40_ENCRYPTION ||
661 rtlpriv->sec.pairwise_enc_algorithm == WEP104_ENCRYPTION ||
662 rtlpriv->sec.pairwise_enc_algorithm == TKIP_ENCRYPTION)) {
663 /* Force TxOP limit to 0x005e for UL. */
664 if (!(edca_be_ul & 0xffff0000))
665 edca_be_ul |= 0x005e0000;
666 /* Force TxOP limit to 0x005e for DL. */
667 if (!(edca_be_dl & 0xffff0000))
668 edca_be_dl |= 0x005e0000;
669 }
670
671 if ((!rtlpriv->dm.is_any_nonbepkts) &&
672 (!rtlpriv->dm.disable_framebursting)) {
673 cur_txok_cnt = rtlpriv->stats.txbytesunicast - last_txok_cnt;
674 cur_rxok_cnt = rtlpriv->stats.rxbytesunicast - last_rxok_cnt;
675 if (cur_rxok_cnt > 4 * cur_txok_cnt) {
676 if (!rtlpriv->dm.is_cur_rdlstate ||
677 !rtlpriv->dm.current_turbo_edca) {
678 rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM,
679 edca_be_dl);
680 rtlpriv->dm.is_cur_rdlstate = true;
681 }
682 } else {
683 if (rtlpriv->dm.is_cur_rdlstate ||
684 !rtlpriv->dm.current_turbo_edca) {
685 rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM,
686 edca_be_ul);
687 rtlpriv->dm.is_cur_rdlstate = false;
688 }
689 }
690 rtlpriv->dm.current_turbo_edca = true;
691 } else {
692 if (rtlpriv->dm.current_turbo_edca) {
693 u8 tmp = AC0_BE;
694 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AC_PARAM,
695 (u8 *) (&tmp));
696 rtlpriv->dm.current_turbo_edca = false;
697 }
698 }
699
700 exit:
701 rtlpriv->dm.is_any_nonbepkts = false;
702 last_txok_cnt = rtlpriv->stats.txbytesunicast;
703 last_rxok_cnt = rtlpriv->stats.rxbytesunicast;
704 }
705
rtl92d_dm_rxgain_tracking_thermalmeter(struct ieee80211_hw * hw)706 static void rtl92d_dm_rxgain_tracking_thermalmeter(struct ieee80211_hw *hw)
707 {
708 struct rtl_priv *rtlpriv = rtl_priv(hw);
709 u8 index_mapping[RX_INDEX_MAPPING_NUM] = {
710 0x0f, 0x0f, 0x0d, 0x0c, 0x0b,
711 0x0a, 0x09, 0x08, 0x07, 0x06,
712 0x05, 0x04, 0x04, 0x03, 0x02
713 };
714 int i;
715 u32 u4tmp;
716
717 u4tmp = (index_mapping[(rtlpriv->efuse.eeprom_thermalmeter -
718 rtlpriv->dm.thermalvalue_rxgain)]) << 12;
719 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
720 ("===> Rx Gain %x\n", u4tmp));
721 for (i = RF90_PATH_A; i < rtlpriv->phy.num_total_rfpath; i++)
722 rtl_set_rfreg(hw, i, 0x3C, BRFREGOFFSETMASK,
723 (rtlpriv->phy.reg_rf3c[i] & (~(0xF000))) | u4tmp);
724 }
725
rtl92d_bandtype_2_4G(struct ieee80211_hw * hw,long * temp_cckg,u8 * cck_index_old)726 static void rtl92d_bandtype_2_4G(struct ieee80211_hw *hw, long *temp_cckg,
727 u8 *cck_index_old)
728 {
729 struct rtl_priv *rtlpriv = rtl_priv(hw);
730 int i;
731 unsigned long flag = 0;
732 long temp_cck;
733
734 /* Query CCK default setting From 0xa24 */
735 rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
736 temp_cck = rtl_get_bbreg(hw, RCCK0_TXFILTER2,
737 BMASKDWORD) & BMASKCCK;
738 rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
739 for (i = 0; i < CCK_TABLE_LENGTH; i++) {
740 if (rtlpriv->dm.cck_inch14) {
741 if (!memcmp((void *)&temp_cck,
742 (void *)&cckswing_table_ch14[i][2], 4)) {
743 *cck_index_old = (u8) i;
744 RT_TRACE(rtlpriv,
745 COMP_POWER_TRACKING,
746 DBG_LOUD,
747 ("Initial reg0x%x = 0x%lx, "
748 "cck_index=0x%x, ch 14 %d\n",
749 RCCK0_TXFILTER2,
750 temp_cck, *cck_index_old,
751 rtlpriv->dm.cck_inch14));
752 break;
753 }
754 } else {
755 if (!memcmp((void *) &temp_cck,
756 &cckswing_table_ch1ch13[i][2], 4)) {
757 *cck_index_old = (u8) i;
758 RT_TRACE(rtlpriv, COMP_POWER_TRACKING,
759 DBG_LOUD,
760 ("Initial reg0x%x = 0x%lx, "
761 "cck_index = 0x%x, ch14 %d\n",
762 RCCK0_TXFILTER2,
763 temp_cck, *cck_index_old,
764 rtlpriv->dm.cck_inch14));
765 break;
766 }
767 }
768 }
769 *temp_cckg = temp_cck;
770 }
771
rtl92d_bandtype_5G(struct rtl_hal * rtlhal,u8 * ofdm_index,bool * internal_pa,u8 thermalvalue,u8 delta,u8 rf,struct rtl_efuse * rtlefuse,struct rtl_priv * rtlpriv,struct rtl_phy * rtlphy,u8 index_mapping[5][INDEX_MAPPING_NUM],u8 index_mapping_pa[8][INDEX_MAPPING_NUM])772 static void rtl92d_bandtype_5G(struct rtl_hal *rtlhal, u8 *ofdm_index,
773 bool *internal_pa, u8 thermalvalue, u8 delta,
774 u8 rf, struct rtl_efuse *rtlefuse,
775 struct rtl_priv *rtlpriv, struct rtl_phy *rtlphy,
776 u8 index_mapping[5][INDEX_MAPPING_NUM],
777 u8 index_mapping_pa[8][INDEX_MAPPING_NUM])
778 {
779 int i;
780 u8 index;
781 u8 offset = 0;
782
783 for (i = 0; i < rf; i++) {
784 if (rtlhal->macphymode == DUALMAC_DUALPHY &&
785 rtlhal->interfaceindex == 1) /* MAC 1 5G */
786 *internal_pa = rtlefuse->internal_pa_5g[1];
787 else
788 *internal_pa = rtlefuse->internal_pa_5g[i];
789 if (*internal_pa) {
790 if (rtlhal->interfaceindex == 1 || i == rf)
791 offset = 4;
792 else
793 offset = 0;
794 if (rtlphy->current_channel >= 100 &&
795 rtlphy->current_channel <= 165)
796 offset += 2;
797 } else {
798 if (rtlhal->interfaceindex == 1 || i == rf)
799 offset = 2;
800 else
801 offset = 0;
802 }
803 if (thermalvalue > rtlefuse->eeprom_thermalmeter)
804 offset++;
805 if (*internal_pa) {
806 if (delta > INDEX_MAPPING_NUM - 1)
807 index = index_mapping_pa[offset]
808 [INDEX_MAPPING_NUM - 1];
809 else
810 index =
811 index_mapping_pa[offset][delta];
812 } else {
813 if (delta > INDEX_MAPPING_NUM - 1)
814 index =
815 index_mapping[offset][INDEX_MAPPING_NUM - 1];
816 else
817 index = index_mapping[offset][delta];
818 }
819 if (thermalvalue > rtlefuse->eeprom_thermalmeter) {
820 if (*internal_pa && thermalvalue > 0x12) {
821 ofdm_index[i] = rtlpriv->dm.ofdm_index[i] -
822 ((delta / 2) * 3 + (delta % 2));
823 } else {
824 ofdm_index[i] -= index;
825 }
826 } else {
827 ofdm_index[i] += index;
828 }
829 }
830 }
831
rtl92d_dm_txpower_tracking_callback_thermalmeter(struct ieee80211_hw * hw)832 static void rtl92d_dm_txpower_tracking_callback_thermalmeter(
833 struct ieee80211_hw *hw)
834 {
835 struct rtl_priv *rtlpriv = rtl_priv(hw);
836 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
837 struct rtl_phy *rtlphy = &(rtlpriv->phy);
838 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
839 u8 thermalvalue, delta, delta_lck, delta_iqk, delta_rxgain;
840 u8 offset, thermalvalue_avg_count = 0;
841 u32 thermalvalue_avg = 0;
842 bool internal_pa = false;
843 long ele_a = 0, ele_d, temp_cck, val_x, value32;
844 long val_y, ele_c = 0;
845 u8 ofdm_index[2];
846 u8 cck_index = 0;
847 u8 ofdm_index_old[2];
848 u8 cck_index_old = 0;
849 u8 index;
850 int i;
851 bool is2t = IS_92D_SINGLEPHY(rtlhal->version);
852 u8 ofdm_min_index = 6, ofdm_min_index_internal_pa = 3, rf;
853 u8 indexforchannel =
854 rtl92d_get_rightchnlplace_for_iqk(rtlphy->current_channel);
855 u8 index_mapping[5][INDEX_MAPPING_NUM] = {
856 /* 5G, path A/MAC 0, decrease power */
857 {0, 1, 3, 6, 8, 9, 11, 13, 14, 16, 17, 18, 18},
858 /* 5G, path A/MAC 0, increase power */
859 {0, 2, 4, 5, 7, 10, 12, 14, 16, 18, 18, 18, 18},
860 /* 5G, path B/MAC 1, decrease power */
861 {0, 2, 3, 6, 8, 9, 11, 13, 14, 16, 17, 18, 18},
862 /* 5G, path B/MAC 1, increase power */
863 {0, 2, 4, 5, 7, 10, 13, 16, 16, 18, 18, 18, 18},
864 /* 2.4G, for decreas power */
865 {0, 1, 2, 3, 4, 5, 6, 7, 7, 8, 9, 10, 10},
866 };
867 u8 index_mapping_internal_pa[8][INDEX_MAPPING_NUM] = {
868 /* 5G, path A/MAC 0, ch36-64, decrease power */
869 {0, 1, 2, 4, 6, 7, 9, 11, 12, 14, 15, 16, 16},
870 /* 5G, path A/MAC 0, ch36-64, increase power */
871 {0, 2, 4, 5, 7, 10, 12, 14, 16, 18, 18, 18, 18},
872 /* 5G, path A/MAC 0, ch100-165, decrease power */
873 {0, 1, 2, 3, 5, 6, 8, 10, 11, 13, 14, 15, 15},
874 /* 5G, path A/MAC 0, ch100-165, increase power */
875 {0, 2, 4, 5, 7, 10, 12, 14, 16, 18, 18, 18, 18},
876 /* 5G, path B/MAC 1, ch36-64, decrease power */
877 {0, 1, 2, 4, 6, 7, 9, 11, 12, 14, 15, 16, 16},
878 /* 5G, path B/MAC 1, ch36-64, increase power */
879 {0, 2, 4, 5, 7, 10, 13, 16, 16, 18, 18, 18, 18},
880 /* 5G, path B/MAC 1, ch100-165, decrease power */
881 {0, 1, 2, 3, 5, 6, 8, 9, 10, 12, 13, 14, 14},
882 /* 5G, path B/MAC 1, ch100-165, increase power */
883 {0, 2, 4, 5, 7, 10, 13, 16, 16, 18, 18, 18, 18},
884 };
885
886 rtlpriv->dm.txpower_trackinginit = true;
887 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, ("\n"));
888 thermalvalue = (u8) rtl_get_rfreg(hw, RF90_PATH_A, RF_T_METER, 0xf800);
889 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
890 ("Readback Thermal Meter = 0x%x pre thermal meter 0x%x "
891 "eeprom_thermalmeter 0x%x\n", thermalvalue,
892 rtlpriv->dm.thermalvalue, rtlefuse->eeprom_thermalmeter));
893 rtl92d_phy_ap_calibrate(hw, (thermalvalue -
894 rtlefuse->eeprom_thermalmeter));
895 if (is2t)
896 rf = 2;
897 else
898 rf = 1;
899 if (thermalvalue) {
900 ele_d = rtl_get_bbreg(hw, ROFDM0_XATxIQIMBALANCE,
901 BMASKDWORD) & BMASKOFDM_D;
902 for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) {
903 if (ele_d == (ofdmswing_table[i] & BMASKOFDM_D)) {
904 ofdm_index_old[0] = (u8) i;
905
906 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
907 ("Initial pathA ele_d reg0x%x = 0x%lx,"
908 " ofdm_index=0x%x\n",
909 ROFDM0_XATxIQIMBALANCE,
910 ele_d, ofdm_index_old[0]));
911 break;
912 }
913 }
914 if (is2t) {
915 ele_d = rtl_get_bbreg(hw, ROFDM0_XBTxIQIMBALANCE,
916 BMASKDWORD) & BMASKOFDM_D;
917 for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) {
918 if (ele_d ==
919 (ofdmswing_table[i] & BMASKOFDM_D)) {
920 ofdm_index_old[1] = (u8) i;
921 RT_TRACE(rtlpriv, COMP_POWER_TRACKING,
922 DBG_LOUD,
923 ("Initial pathB ele_d reg "
924 "0x%x = 0x%lx, ofdm_index "
925 "= 0x%x\n",
926 ROFDM0_XBTxIQIMBALANCE, ele_d,
927 ofdm_index_old[1]));
928 break;
929 }
930 }
931 }
932 if (rtlhal->current_bandtype == BAND_ON_2_4G) {
933 rtl92d_bandtype_2_4G(hw, &temp_cck, &cck_index_old);
934 } else {
935 temp_cck = 0x090e1317;
936 cck_index_old = 12;
937 }
938
939 if (!rtlpriv->dm.thermalvalue) {
940 rtlpriv->dm.thermalvalue =
941 rtlefuse->eeprom_thermalmeter;
942 rtlpriv->dm.thermalvalue_lck = thermalvalue;
943 rtlpriv->dm.thermalvalue_iqk = thermalvalue;
944 rtlpriv->dm.thermalvalue_rxgain =
945 rtlefuse->eeprom_thermalmeter;
946 for (i = 0; i < rf; i++)
947 rtlpriv->dm.ofdm_index[i] = ofdm_index_old[i];
948 rtlpriv->dm.cck_index = cck_index_old;
949 }
950 if (rtlhal->reloadtxpowerindex) {
951 for (i = 0; i < rf; i++)
952 rtlpriv->dm.ofdm_index[i] = ofdm_index_old[i];
953 rtlpriv->dm.cck_index = cck_index_old;
954 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
955 ("reload ofdm index for band switch\n"));
956 }
957 rtlpriv->dm.thermalvalue_avg
958 [rtlpriv->dm.thermalvalue_avg_index] = thermalvalue;
959 rtlpriv->dm.thermalvalue_avg_index++;
960 if (rtlpriv->dm.thermalvalue_avg_index == AVG_THERMAL_NUM)
961 rtlpriv->dm.thermalvalue_avg_index = 0;
962 for (i = 0; i < AVG_THERMAL_NUM; i++) {
963 if (rtlpriv->dm.thermalvalue_avg[i]) {
964 thermalvalue_avg +=
965 rtlpriv->dm.thermalvalue_avg[i];
966 thermalvalue_avg_count++;
967 }
968 }
969 if (thermalvalue_avg_count)
970 thermalvalue = (u8) (thermalvalue_avg /
971 thermalvalue_avg_count);
972 if (rtlhal->reloadtxpowerindex) {
973 delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ?
974 (thermalvalue - rtlefuse->eeprom_thermalmeter) :
975 (rtlefuse->eeprom_thermalmeter - thermalvalue);
976 rtlhal->reloadtxpowerindex = false;
977 rtlpriv->dm.done_txpower = false;
978 } else if (rtlpriv->dm.done_txpower) {
979 delta = (thermalvalue > rtlpriv->dm.thermalvalue) ?
980 (thermalvalue - rtlpriv->dm.thermalvalue) :
981 (rtlpriv->dm.thermalvalue - thermalvalue);
982 } else {
983 delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ?
984 (thermalvalue - rtlefuse->eeprom_thermalmeter) :
985 (rtlefuse->eeprom_thermalmeter - thermalvalue);
986 }
987 delta_lck = (thermalvalue > rtlpriv->dm.thermalvalue_lck) ?
988 (thermalvalue - rtlpriv->dm.thermalvalue_lck) :
989 (rtlpriv->dm.thermalvalue_lck - thermalvalue);
990 delta_iqk = (thermalvalue > rtlpriv->dm.thermalvalue_iqk) ?
991 (thermalvalue - rtlpriv->dm.thermalvalue_iqk) :
992 (rtlpriv->dm.thermalvalue_iqk - thermalvalue);
993 delta_rxgain =
994 (thermalvalue > rtlpriv->dm.thermalvalue_rxgain) ?
995 (thermalvalue - rtlpriv->dm.thermalvalue_rxgain) :
996 (rtlpriv->dm.thermalvalue_rxgain - thermalvalue);
997 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
998 ("Readback Thermal Meter = 0x%x pre thermal meter 0x%x"
999 " eeprom_thermalmeter 0x%x delta 0x%x "
1000 "delta_lck 0x%x delta_iqk 0x%x\n",
1001 thermalvalue, rtlpriv->dm.thermalvalue,
1002 rtlefuse->eeprom_thermalmeter, delta, delta_lck,
1003 delta_iqk));
1004 if ((delta_lck > rtlefuse->delta_lck) &&
1005 (rtlefuse->delta_lck != 0)) {
1006 rtlpriv->dm.thermalvalue_lck = thermalvalue;
1007 rtl92d_phy_lc_calibrate(hw);
1008 }
1009 if (delta > 0 && rtlpriv->dm.txpower_track_control) {
1010 rtlpriv->dm.done_txpower = true;
1011 delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ?
1012 (thermalvalue - rtlefuse->eeprom_thermalmeter) :
1013 (rtlefuse->eeprom_thermalmeter - thermalvalue);
1014 if (rtlhal->current_bandtype == BAND_ON_2_4G) {
1015 offset = 4;
1016 if (delta > INDEX_MAPPING_NUM - 1)
1017 index = index_mapping[offset]
1018 [INDEX_MAPPING_NUM - 1];
1019 else
1020 index = index_mapping[offset][delta];
1021 if (thermalvalue > rtlpriv->dm.thermalvalue) {
1022 for (i = 0; i < rf; i++)
1023 ofdm_index[i] -= delta;
1024 cck_index -= delta;
1025 } else {
1026 for (i = 0; i < rf; i++)
1027 ofdm_index[i] += index;
1028 cck_index += index;
1029 }
1030 } else if (rtlhal->current_bandtype == BAND_ON_5G) {
1031 rtl92d_bandtype_5G(rtlhal, ofdm_index,
1032 &internal_pa, thermalvalue,
1033 delta, rf, rtlefuse, rtlpriv,
1034 rtlphy, index_mapping,
1035 index_mapping_internal_pa);
1036 }
1037 if (is2t) {
1038 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1039 ("temp OFDM_A_index=0x%x, OFDM_B_index"
1040 " = 0x%x,cck_index=0x%x\n",
1041 rtlpriv->dm.ofdm_index[0],
1042 rtlpriv->dm.ofdm_index[1],
1043 rtlpriv->dm.cck_index));
1044 } else {
1045 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1046 ("temp OFDM_A_index=0x%x,cck_index = "
1047 "0x%x\n",
1048 rtlpriv->dm.ofdm_index[0],
1049 rtlpriv->dm.cck_index));
1050 }
1051 for (i = 0; i < rf; i++) {
1052 if (ofdm_index[i] > OFDM_TABLE_SIZE_92D - 1)
1053 ofdm_index[i] = OFDM_TABLE_SIZE_92D - 1;
1054 else if (ofdm_index[i] < ofdm_min_index)
1055 ofdm_index[i] = ofdm_min_index;
1056 }
1057 if (rtlhal->current_bandtype == BAND_ON_2_4G) {
1058 if (cck_index > CCK_TABLE_SIZE - 1) {
1059 cck_index = CCK_TABLE_SIZE - 1;
1060 } else if (internal_pa ||
1061 rtlhal->current_bandtype ==
1062 BAND_ON_2_4G) {
1063 if (ofdm_index[i] <
1064 ofdm_min_index_internal_pa)
1065 ofdm_index[i] =
1066 ofdm_min_index_internal_pa;
1067 } else if (cck_index < 0) {
1068 cck_index = 0;
1069 }
1070 }
1071 if (is2t) {
1072 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1073 ("new OFDM_A_index=0x%x, OFDM_B_index "
1074 "= 0x%x, cck_index=0x%x\n",
1075 ofdm_index[0], ofdm_index[1],
1076 cck_index));
1077 } else {
1078 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1079 ("new OFDM_A_index=0x%x,cck_index = "
1080 "0x%x\n",
1081 ofdm_index[0], cck_index));
1082 }
1083 ele_d = (ofdmswing_table[(u8) ofdm_index[0]] &
1084 0xFFC00000) >> 22;
1085 val_x = rtlphy->iqk_matrix_regsetting
1086 [indexforchannel].value[0][0];
1087 val_y = rtlphy->iqk_matrix_regsetting
1088 [indexforchannel].value[0][1];
1089 if (val_x != 0) {
1090 if ((val_x & 0x00000200) != 0)
1091 val_x = val_x | 0xFFFFFC00;
1092 ele_a =
1093 ((val_x * ele_d) >> 8) & 0x000003FF;
1094
1095 /* new element C = element D x Y */
1096 if ((val_y & 0x00000200) != 0)
1097 val_y = val_y | 0xFFFFFC00;
1098 ele_c = ((val_y * ele_d) >> 8) & 0x000003FF;
1099
1100 /* wirte new elements A, C, D to regC80 and
1101 * regC94, element B is always 0 */
1102 value32 = (ele_d << 22) | ((ele_c & 0x3F) <<
1103 16) | ele_a;
1104 rtl_set_bbreg(hw, ROFDM0_XATxIQIMBALANCE,
1105 BMASKDWORD, value32);
1106
1107 value32 = (ele_c & 0x000003C0) >> 6;
1108 rtl_set_bbreg(hw, ROFDM0_XCTxAFE, BMASKH4BITS,
1109 value32);
1110
1111 value32 = ((val_x * ele_d) >> 7) & 0x01;
1112 rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, BIT(24),
1113 value32);
1114
1115 } else {
1116 rtl_set_bbreg(hw, ROFDM0_XATxIQIMBALANCE,
1117 BMASKDWORD,
1118 ofdmswing_table
1119 [(u8)ofdm_index[0]]);
1120 rtl_set_bbreg(hw, ROFDM0_XCTxAFE, BMASKH4BITS,
1121 0x00);
1122 rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
1123 BIT(24), 0x00);
1124 }
1125
1126 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1127 ("TxPwrTracking for interface %d path A: X ="
1128 " 0x%lx, Y = 0x%lx ele_A = 0x%lx ele_C = "
1129 "0x%lx ele_D = 0x%lx 0xe94 = 0x%lx 0xe9c = "
1130 "0x%lx\n", rtlhal->interfaceindex,
1131 val_x, val_y, ele_a, ele_c, ele_d,
1132 val_x, val_y));
1133
1134 if (rtlhal->current_bandtype == BAND_ON_2_4G) {
1135 /* Adjust CCK according to IQK result */
1136 if (!rtlpriv->dm.cck_inch14) {
1137 rtl_write_byte(rtlpriv, 0xa22,
1138 cckswing_table_ch1ch13
1139 [(u8)cck_index][0]);
1140 rtl_write_byte(rtlpriv, 0xa23,
1141 cckswing_table_ch1ch13
1142 [(u8)cck_index][1]);
1143 rtl_write_byte(rtlpriv, 0xa24,
1144 cckswing_table_ch1ch13
1145 [(u8)cck_index][2]);
1146 rtl_write_byte(rtlpriv, 0xa25,
1147 cckswing_table_ch1ch13
1148 [(u8)cck_index][3]);
1149 rtl_write_byte(rtlpriv, 0xa26,
1150 cckswing_table_ch1ch13
1151 [(u8)cck_index][4]);
1152 rtl_write_byte(rtlpriv, 0xa27,
1153 cckswing_table_ch1ch13
1154 [(u8)cck_index][5]);
1155 rtl_write_byte(rtlpriv, 0xa28,
1156 cckswing_table_ch1ch13
1157 [(u8)cck_index][6]);
1158 rtl_write_byte(rtlpriv, 0xa29,
1159 cckswing_table_ch1ch13
1160 [(u8)cck_index][7]);
1161 } else {
1162 rtl_write_byte(rtlpriv, 0xa22,
1163 cckswing_table_ch14
1164 [(u8)cck_index][0]);
1165 rtl_write_byte(rtlpriv, 0xa23,
1166 cckswing_table_ch14
1167 [(u8)cck_index][1]);
1168 rtl_write_byte(rtlpriv, 0xa24,
1169 cckswing_table_ch14
1170 [(u8)cck_index][2]);
1171 rtl_write_byte(rtlpriv, 0xa25,
1172 cckswing_table_ch14
1173 [(u8)cck_index][3]);
1174 rtl_write_byte(rtlpriv, 0xa26,
1175 cckswing_table_ch14
1176 [(u8)cck_index][4]);
1177 rtl_write_byte(rtlpriv, 0xa27,
1178 cckswing_table_ch14
1179 [(u8)cck_index][5]);
1180 rtl_write_byte(rtlpriv, 0xa28,
1181 cckswing_table_ch14
1182 [(u8)cck_index][6]);
1183 rtl_write_byte(rtlpriv, 0xa29,
1184 cckswing_table_ch14
1185 [(u8)cck_index][7]);
1186 }
1187 }
1188 if (is2t) {
1189 ele_d = (ofdmswing_table[(u8) ofdm_index[1]] &
1190 0xFFC00000) >> 22;
1191 val_x = rtlphy->iqk_matrix_regsetting
1192 [indexforchannel].value[0][4];
1193 val_y = rtlphy->iqk_matrix_regsetting
1194 [indexforchannel].value[0][5];
1195 if (val_x != 0) {
1196 if ((val_x & 0x00000200) != 0)
1197 /* consider minus */
1198 val_x = val_x | 0xFFFFFC00;
1199 ele_a = ((val_x * ele_d) >> 8) &
1200 0x000003FF;
1201 /* new element C = element D x Y */
1202 if ((val_y & 0x00000200) != 0)
1203 val_y =
1204 val_y | 0xFFFFFC00;
1205 ele_c =
1206 ((val_y *
1207 ele_d) >> 8) & 0x00003FF;
1208 /* write new elements A, C, D to regC88
1209 * and regC9C, element B is always 0
1210 */
1211 value32 = (ele_d << 22) |
1212 ((ele_c & 0x3F) << 16) |
1213 ele_a;
1214 rtl_set_bbreg(hw,
1215 ROFDM0_XBTxIQIMBALANCE,
1216 BMASKDWORD, value32);
1217 value32 = (ele_c & 0x000003C0) >> 6;
1218 rtl_set_bbreg(hw, ROFDM0_XDTxAFE,
1219 BMASKH4BITS, value32);
1220 value32 = ((val_x * ele_d) >> 7) & 0x01;
1221 rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
1222 BIT(28), value32);
1223 } else {
1224 rtl_set_bbreg(hw,
1225 ROFDM0_XBTxIQIMBALANCE,
1226 BMASKDWORD,
1227 ofdmswing_table
1228 [(u8) ofdm_index[1]]);
1229 rtl_set_bbreg(hw, ROFDM0_XDTxAFE,
1230 BMASKH4BITS, 0x00);
1231 rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
1232 BIT(28), 0x00);
1233 }
1234 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1235 ("TxPwrTracking path B: X = 0x%lx, "
1236 "Y = 0x%lx ele_A = 0x%lx ele_C = 0x"
1237 "%lx ele_D = 0x%lx 0xeb4 = 0x%lx "
1238 "0xebc = 0x%lx\n",
1239 val_x, val_y, ele_a, ele_c,
1240 ele_d, val_x, val_y));
1241 }
1242 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1243 ("TxPwrTracking 0xc80 = 0x%x, 0xc94 = "
1244 "0x%x RF 0x24 = 0x%x\n",
1245 rtl_get_bbreg(hw, 0xc80, BMASKDWORD),
1246 rtl_get_bbreg(hw, 0xc94, BMASKDWORD),
1247 rtl_get_rfreg(hw, RF90_PATH_A, 0x24,
1248 BRFREGOFFSETMASK)));
1249 }
1250 if ((delta_iqk > rtlefuse->delta_iqk) &&
1251 (rtlefuse->delta_iqk != 0)) {
1252 rtl92d_phy_reset_iqk_result(hw);
1253 rtlpriv->dm.thermalvalue_iqk = thermalvalue;
1254 rtl92d_phy_iq_calibrate(hw);
1255 }
1256 if (delta_rxgain > 0 && rtlhal->current_bandtype == BAND_ON_5G
1257 && thermalvalue <= rtlefuse->eeprom_thermalmeter) {
1258 rtlpriv->dm.thermalvalue_rxgain = thermalvalue;
1259 rtl92d_dm_rxgain_tracking_thermalmeter(hw);
1260 }
1261 if (rtlpriv->dm.txpower_track_control)
1262 rtlpriv->dm.thermalvalue = thermalvalue;
1263 }
1264
1265 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, ("<===\n"));
1266 }
1267
rtl92d_dm_initialize_txpower_tracking(struct ieee80211_hw * hw)1268 static void rtl92d_dm_initialize_txpower_tracking(struct ieee80211_hw *hw)
1269 {
1270 struct rtl_priv *rtlpriv = rtl_priv(hw);
1271
1272 rtlpriv->dm.txpower_tracking = true;
1273 rtlpriv->dm.txpower_trackinginit = false;
1274 rtlpriv->dm.txpower_track_control = true;
1275 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1276 ("pMgntInfo->txpower_tracking = %d\n",
1277 rtlpriv->dm.txpower_tracking));
1278 }
1279
rtl92d_dm_check_txpower_tracking_thermal_meter(struct ieee80211_hw * hw)1280 void rtl92d_dm_check_txpower_tracking_thermal_meter(struct ieee80211_hw *hw)
1281 {
1282 struct rtl_priv *rtlpriv = rtl_priv(hw);
1283 static u8 tm_trigger;
1284
1285 if (!rtlpriv->dm.txpower_tracking)
1286 return;
1287
1288 if (!tm_trigger) {
1289 rtl_set_rfreg(hw, RF90_PATH_A, RF_T_METER, BIT(17) |
1290 BIT(16), 0x03);
1291 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1292 ("Trigger 92S Thermal Meter!!\n"));
1293 tm_trigger = 1;
1294 return;
1295 } else {
1296 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1297 ("Schedule TxPowerTracking direct call!!\n"));
1298 rtl92d_dm_txpower_tracking_callback_thermalmeter(hw);
1299 tm_trigger = 0;
1300 }
1301 }
1302
rtl92d_dm_init_rate_adaptive_mask(struct ieee80211_hw * hw)1303 void rtl92d_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw)
1304 {
1305 struct rtl_priv *rtlpriv = rtl_priv(hw);
1306 struct rate_adaptive *ra = &(rtlpriv->ra);
1307
1308 ra->ratr_state = DM_RATR_STA_INIT;
1309 ra->pre_ratr_state = DM_RATR_STA_INIT;
1310 if (rtlpriv->dm.dm_type == DM_TYPE_BYDRIVER)
1311 rtlpriv->dm.useramask = true;
1312 else
1313 rtlpriv->dm.useramask = false;
1314 }
1315
rtl92d_dm_init(struct ieee80211_hw * hw)1316 void rtl92d_dm_init(struct ieee80211_hw *hw)
1317 {
1318 struct rtl_priv *rtlpriv = rtl_priv(hw);
1319
1320 rtlpriv->dm.dm_type = DM_TYPE_BYDRIVER;
1321 rtl92d_dm_diginit(hw);
1322 rtl92d_dm_init_dynamic_txpower(hw);
1323 rtl92d_dm_init_edca_turbo(hw);
1324 rtl92d_dm_init_rate_adaptive_mask(hw);
1325 rtl92d_dm_initialize_txpower_tracking(hw);
1326 }
1327
rtl92d_dm_watchdog(struct ieee80211_hw * hw)1328 void rtl92d_dm_watchdog(struct ieee80211_hw *hw)
1329 {
1330 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1331 bool fw_current_inpsmode = false;
1332 bool fwps_awake = true;
1333
1334 /* 1. RF is OFF. (No need to do DM.)
1335 * 2. Fw is under power saving mode for FwLPS.
1336 * (Prevent from SW/FW I/O racing.)
1337 * 3. IPS workitem is scheduled. (Prevent from IPS sequence
1338 * to be swapped with DM.
1339 * 4. RFChangeInProgress is TRUE.
1340 * (Prevent from broken by IPS/HW/SW Rf off.) */
1341
1342 if ((ppsc->rfpwr_state == ERFON) && ((!fw_current_inpsmode) &&
1343 fwps_awake) && (!ppsc->rfchange_inprogress)) {
1344 rtl92d_dm_pwdb_monitor(hw);
1345 rtl92d_dm_false_alarm_counter_statistics(hw);
1346 rtl92d_dm_find_minimum_rssi(hw);
1347 rtl92d_dm_dig(hw);
1348 /* rtl92d_dm_dynamic_bb_powersaving(hw); */
1349 rtl92d_dm_dynamic_txpower(hw);
1350 /* rtl92d_dm_check_txpower_tracking_thermal_meter(hw); */
1351 /* rtl92d_dm_refresh_rate_adaptive_mask(hw); */
1352 /* rtl92d_dm_interrupt_migration(hw); */
1353 rtl92d_dm_check_edca_turbo(hw);
1354 }
1355 }
1356