1 /****************************************************************************** 2 * 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * GPL LICENSE SUMMARY 7 * 8 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved. 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of version 2 of the GNU General Public License as 12 * published by the Free Software Foundation. 13 * 14 * This program is distributed in the hope that it will be useful, but 15 * WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 17 * General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, 22 * USA 23 * 24 * The full GNU General Public License is included in this distribution 25 * in the file called LICENSE.GPL. 26 * 27 * Contact Information: 28 * Intel Linux Wireless <ilw@linux.intel.com> 29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 30 * 31 * BSD LICENSE 32 * 33 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved. 34 * All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 40 * * Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * * Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in 44 * the documentation and/or other materials provided with the 45 * distribution. 46 * * Neither the name Intel Corporation nor the names of its 47 * contributors may be used to endorse or promote products derived 48 * from this software without specific prior written permission. 49 * 50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 51 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 52 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 53 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 54 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 55 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 61 * 62 *****************************************************************************/ 63 /* 64 * Please use this file (iwl-commands.h) only for uCode API definitions. 65 * Please use iwl-xxxx-hw.h for hardware-related definitions. 66 * Please use iwl-dev.h for driver implementation definitions. 67 */ 68 69 #ifndef __iwl_commands_h__ 70 #define __iwl_commands_h__ 71 72 #include <linux/etherdevice.h> 73 #include <linux/ieee80211.h> 74 75 struct iwl_priv; 76 77 /* uCode version contains 4 values: Major/Minor/API/Serial */ 78 #define IWL_UCODE_MAJOR(ver) (((ver) & 0xFF000000) >> 24) 79 #define IWL_UCODE_MINOR(ver) (((ver) & 0x00FF0000) >> 16) 80 #define IWL_UCODE_API(ver) (((ver) & 0x0000FF00) >> 8) 81 #define IWL_UCODE_SERIAL(ver) ((ver) & 0x000000FF) 82 83 84 /* Tx rates */ 85 #define IWL_CCK_RATES 4 86 #define IWL_OFDM_RATES 8 87 #define IWL_MAX_RATES (IWL_CCK_RATES + IWL_OFDM_RATES) 88 89 enum { 90 REPLY_ALIVE = 0x1, 91 REPLY_ERROR = 0x2, 92 REPLY_ECHO = 0x3, /* test command */ 93 94 /* RXON and QOS commands */ 95 REPLY_RXON = 0x10, 96 REPLY_RXON_ASSOC = 0x11, 97 REPLY_QOS_PARAM = 0x13, 98 REPLY_RXON_TIMING = 0x14, 99 100 /* Multi-Station support */ 101 REPLY_ADD_STA = 0x18, 102 REPLY_REMOVE_STA = 0x19, 103 REPLY_REMOVE_ALL_STA = 0x1a, /* not used */ 104 REPLY_TXFIFO_FLUSH = 0x1e, 105 106 /* Security */ 107 REPLY_WEPKEY = 0x20, 108 109 /* RX, TX, LEDs */ 110 REPLY_TX = 0x1c, 111 REPLY_LEDS_CMD = 0x48, 112 REPLY_TX_LINK_QUALITY_CMD = 0x4e, 113 114 /* WiMAX coexistence */ 115 COEX_PRIORITY_TABLE_CMD = 0x5a, 116 COEX_MEDIUM_NOTIFICATION = 0x5b, 117 COEX_EVENT_CMD = 0x5c, 118 119 /* Calibration */ 120 TEMPERATURE_NOTIFICATION = 0x62, 121 CALIBRATION_CFG_CMD = 0x65, 122 CALIBRATION_RES_NOTIFICATION = 0x66, 123 CALIBRATION_COMPLETE_NOTIFICATION = 0x67, 124 125 /* 802.11h related */ 126 REPLY_QUIET_CMD = 0x71, /* not used */ 127 REPLY_CHANNEL_SWITCH = 0x72, 128 CHANNEL_SWITCH_NOTIFICATION = 0x73, 129 REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74, 130 SPECTRUM_MEASURE_NOTIFICATION = 0x75, 131 132 /* Power Management */ 133 POWER_TABLE_CMD = 0x77, 134 PM_SLEEP_NOTIFICATION = 0x7A, 135 PM_DEBUG_STATISTIC_NOTIFIC = 0x7B, 136 137 /* Scan commands and notifications */ 138 REPLY_SCAN_CMD = 0x80, 139 REPLY_SCAN_ABORT_CMD = 0x81, 140 SCAN_START_NOTIFICATION = 0x82, 141 SCAN_RESULTS_NOTIFICATION = 0x83, 142 SCAN_COMPLETE_NOTIFICATION = 0x84, 143 144 /* IBSS/AP commands */ 145 BEACON_NOTIFICATION = 0x90, 146 REPLY_TX_BEACON = 0x91, 147 WHO_IS_AWAKE_NOTIFICATION = 0x94, /* not used */ 148 149 /* Miscellaneous commands */ 150 REPLY_TX_POWER_DBM_CMD = 0x95, 151 QUIET_NOTIFICATION = 0x96, /* not used */ 152 REPLY_TX_PWR_TABLE_CMD = 0x97, 153 REPLY_TX_POWER_DBM_CMD_V1 = 0x98, /* old version of API */ 154 TX_ANT_CONFIGURATION_CMD = 0x98, 155 MEASURE_ABORT_NOTIFICATION = 0x99, /* not used */ 156 157 /* Bluetooth device coexistence config command */ 158 REPLY_BT_CONFIG = 0x9b, 159 160 /* Statistics */ 161 REPLY_STATISTICS_CMD = 0x9c, 162 STATISTICS_NOTIFICATION = 0x9d, 163 164 /* RF-KILL commands and notifications */ 165 REPLY_CARD_STATE_CMD = 0xa0, 166 CARD_STATE_NOTIFICATION = 0xa1, 167 168 /* Missed beacons notification */ 169 MISSED_BEACONS_NOTIFICATION = 0xa2, 170 171 REPLY_CT_KILL_CONFIG_CMD = 0xa4, 172 SENSITIVITY_CMD = 0xa8, 173 REPLY_PHY_CALIBRATION_CMD = 0xb0, 174 REPLY_RX_PHY_CMD = 0xc0, 175 REPLY_RX_MPDU_CMD = 0xc1, 176 REPLY_RX = 0xc3, 177 REPLY_COMPRESSED_BA = 0xc5, 178 179 /* BT Coex */ 180 REPLY_BT_COEX_PRIO_TABLE = 0xcc, 181 REPLY_BT_COEX_PROT_ENV = 0xcd, 182 REPLY_BT_COEX_PROFILE_NOTIF = 0xce, 183 184 /* PAN commands */ 185 REPLY_WIPAN_PARAMS = 0xb2, 186 REPLY_WIPAN_RXON = 0xb3, /* use REPLY_RXON structure */ 187 REPLY_WIPAN_RXON_TIMING = 0xb4, /* use REPLY_RXON_TIMING structure */ 188 REPLY_WIPAN_RXON_ASSOC = 0xb6, /* use REPLY_RXON_ASSOC structure */ 189 REPLY_WIPAN_QOS_PARAM = 0xb7, /* use REPLY_QOS_PARAM structure */ 190 REPLY_WIPAN_WEPKEY = 0xb8, /* use REPLY_WEPKEY structure */ 191 REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9, 192 REPLY_WIPAN_NOA_NOTIFICATION = 0xbc, 193 REPLY_WIPAN_DEACTIVATION_COMPLETE = 0xbd, 194 195 REPLY_WOWLAN_PATTERNS = 0xe0, 196 REPLY_WOWLAN_WAKEUP_FILTER = 0xe1, 197 REPLY_WOWLAN_TSC_RSC_PARAMS = 0xe2, 198 REPLY_WOWLAN_TKIP_PARAMS = 0xe3, 199 REPLY_WOWLAN_KEK_KCK_MATERIAL = 0xe4, 200 REPLY_WOWLAN_GET_STATUS = 0xe5, 201 REPLY_D3_CONFIG = 0xd3, 202 203 REPLY_MAX = 0xff 204 }; 205 206 /****************************************************************************** 207 * (0) 208 * Commonly used structures and definitions: 209 * Command header, rate_n_flags, txpower 210 * 211 *****************************************************************************/ 212 213 /* iwl_cmd_header flags value */ 214 #define IWL_CMD_FAILED_MSK 0x40 215 216 #define SEQ_TO_QUEUE(s) (((s) >> 8) & 0x1f) 217 #define QUEUE_TO_SEQ(q) (((q) & 0x1f) << 8) 218 #define SEQ_TO_INDEX(s) ((s) & 0xff) 219 #define INDEX_TO_SEQ(i) ((i) & 0xff) 220 #define SEQ_RX_FRAME cpu_to_le16(0x8000) 221 222 /** 223 * struct iwl_cmd_header 224 * 225 * This header format appears in the beginning of each command sent from the 226 * driver, and each response/notification received from uCode. 227 */ 228 struct iwl_cmd_header { 229 u8 cmd; /* Command ID: REPLY_RXON, etc. */ 230 u8 flags; /* 0:5 reserved, 6 abort, 7 internal */ 231 /* 232 * The driver sets up the sequence number to values of its choosing. 233 * uCode does not use this value, but passes it back to the driver 234 * when sending the response to each driver-originated command, so 235 * the driver can match the response to the command. Since the values 236 * don't get used by uCode, the driver may set up an arbitrary format. 237 * 238 * There is one exception: uCode sets bit 15 when it originates 239 * the response/notification, i.e. when the response/notification 240 * is not a direct response to a command sent by the driver. For 241 * example, uCode issues REPLY_RX when it sends a received frame 242 * to the driver; it is not a direct response to any driver command. 243 * 244 * The Linux driver uses the following format: 245 * 246 * 0:7 tfd index - position within TX queue 247 * 8:12 TX queue id 248 * 13:14 reserved 249 * 15 unsolicited RX or uCode-originated notification 250 */ 251 __le16 sequence; 252 253 /* command or response/notification data follows immediately */ 254 u8 data[0]; 255 } __packed; 256 257 258 /** 259 * iwlagn rate_n_flags bit fields 260 * 261 * rate_n_flags format is used in following iwlagn commands: 262 * REPLY_RX (response only) 263 * REPLY_RX_MPDU (response only) 264 * REPLY_TX (both command and response) 265 * REPLY_TX_LINK_QUALITY_CMD 266 * 267 * High-throughput (HT) rate format for bits 7:0 (bit 8 must be "1"): 268 * 2-0: 0) 6 Mbps 269 * 1) 12 Mbps 270 * 2) 18 Mbps 271 * 3) 24 Mbps 272 * 4) 36 Mbps 273 * 5) 48 Mbps 274 * 6) 54 Mbps 275 * 7) 60 Mbps 276 * 277 * 4-3: 0) Single stream (SISO) 278 * 1) Dual stream (MIMO) 279 * 2) Triple stream (MIMO) 280 * 281 * 5: Value of 0x20 in bits 7:0 indicates 6 Mbps HT40 duplicate data 282 * 283 * Legacy OFDM rate format for bits 7:0 (bit 8 must be "0", bit 9 "0"): 284 * 3-0: 0xD) 6 Mbps 285 * 0xF) 9 Mbps 286 * 0x5) 12 Mbps 287 * 0x7) 18 Mbps 288 * 0x9) 24 Mbps 289 * 0xB) 36 Mbps 290 * 0x1) 48 Mbps 291 * 0x3) 54 Mbps 292 * 293 * Legacy CCK rate format for bits 7:0 (bit 8 must be "0", bit 9 "1"): 294 * 6-0: 10) 1 Mbps 295 * 20) 2 Mbps 296 * 55) 5.5 Mbps 297 * 110) 11 Mbps 298 */ 299 #define RATE_MCS_CODE_MSK 0x7 300 #define RATE_MCS_SPATIAL_POS 3 301 #define RATE_MCS_SPATIAL_MSK 0x18 302 #define RATE_MCS_HT_DUP_POS 5 303 #define RATE_MCS_HT_DUP_MSK 0x20 304 /* Both legacy and HT use bits 7:0 as the CCK/OFDM rate or HT MCS */ 305 #define RATE_MCS_RATE_MSK 0xff 306 307 /* Bit 8: (1) HT format, (0) legacy format in bits 7:0 */ 308 #define RATE_MCS_FLAGS_POS 8 309 #define RATE_MCS_HT_POS 8 310 #define RATE_MCS_HT_MSK 0x100 311 312 /* Bit 9: (1) CCK, (0) OFDM. HT (bit 8) must be "0" for this bit to be valid */ 313 #define RATE_MCS_CCK_POS 9 314 #define RATE_MCS_CCK_MSK 0x200 315 316 /* Bit 10: (1) Use Green Field preamble */ 317 #define RATE_MCS_GF_POS 10 318 #define RATE_MCS_GF_MSK 0x400 319 320 /* Bit 11: (1) Use 40Mhz HT40 chnl width, (0) use 20 MHz legacy chnl width */ 321 #define RATE_MCS_HT40_POS 11 322 #define RATE_MCS_HT40_MSK 0x800 323 324 /* Bit 12: (1) Duplicate data on both 20MHz chnls. HT40 (bit 11) must be set. */ 325 #define RATE_MCS_DUP_POS 12 326 #define RATE_MCS_DUP_MSK 0x1000 327 328 /* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */ 329 #define RATE_MCS_SGI_POS 13 330 #define RATE_MCS_SGI_MSK 0x2000 331 332 /** 333 * rate_n_flags Tx antenna masks 334 * 4965 has 2 transmitters 335 * 5100 has 1 transmitter B 336 * 5150 has 1 transmitter A 337 * 5300 has 3 transmitters 338 * 5350 has 3 transmitters 339 * bit14:16 340 */ 341 #define RATE_MCS_ANT_POS 14 342 #define RATE_MCS_ANT_A_MSK 0x04000 343 #define RATE_MCS_ANT_B_MSK 0x08000 344 #define RATE_MCS_ANT_C_MSK 0x10000 345 #define RATE_MCS_ANT_AB_MSK (RATE_MCS_ANT_A_MSK | RATE_MCS_ANT_B_MSK) 346 #define RATE_MCS_ANT_ABC_MSK (RATE_MCS_ANT_AB_MSK | RATE_MCS_ANT_C_MSK) 347 #define RATE_ANT_NUM 3 348 349 #define POWER_TABLE_NUM_ENTRIES 33 350 #define POWER_TABLE_NUM_HT_OFDM_ENTRIES 32 351 #define POWER_TABLE_CCK_ENTRY 32 352 353 #define IWL_PWR_NUM_HT_OFDM_ENTRIES 24 354 #define IWL_PWR_CCK_ENTRIES 2 355 356 /** 357 * struct tx_power_dual_stream 358 * 359 * Table entries in REPLY_TX_PWR_TABLE_CMD, REPLY_CHANNEL_SWITCH 360 * 361 * Same format as iwl_tx_power_dual_stream, but __le32 362 */ 363 struct tx_power_dual_stream { 364 __le32 dw; 365 } __packed; 366 367 /** 368 * Command REPLY_TX_POWER_DBM_CMD = 0x98 369 * struct iwlagn_tx_power_dbm_cmd 370 */ 371 #define IWLAGN_TX_POWER_AUTO 0x7f 372 #define IWLAGN_TX_POWER_NO_CLOSED (0x1 << 6) 373 374 struct iwlagn_tx_power_dbm_cmd { 375 s8 global_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */ 376 u8 flags; 377 s8 srv_chan_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */ 378 u8 reserved; 379 } __packed; 380 381 /** 382 * Command TX_ANT_CONFIGURATION_CMD = 0x98 383 * This command is used to configure valid Tx antenna. 384 * By default uCode concludes the valid antenna according to the radio flavor. 385 * This command enables the driver to override/modify this conclusion. 386 */ 387 struct iwl_tx_ant_config_cmd { 388 __le32 valid; 389 } __packed; 390 391 /****************************************************************************** 392 * (0a) 393 * Alive and Error Commands & Responses: 394 * 395 *****************************************************************************/ 396 397 #define UCODE_VALID_OK cpu_to_le32(0x1) 398 399 /** 400 * REPLY_ALIVE = 0x1 (response only, not a command) 401 * 402 * uCode issues this "alive" notification once the runtime image is ready 403 * to receive commands from the driver. This is the *second* "alive" 404 * notification that the driver will receive after rebooting uCode; 405 * this "alive" is indicated by subtype field != 9. 406 * 407 * See comments documenting "BSM" (bootstrap state machine). 408 * 409 * This response includes two pointers to structures within the device's 410 * data SRAM (access via HBUS_TARG_MEM_* regs) that are useful for debugging: 411 * 412 * 1) log_event_table_ptr indicates base of the event log. This traces 413 * a 256-entry history of uCode execution within a circular buffer. 414 * Its header format is: 415 * 416 * __le32 log_size; log capacity (in number of entries) 417 * __le32 type; (1) timestamp with each entry, (0) no timestamp 418 * __le32 wraps; # times uCode has wrapped to top of circular buffer 419 * __le32 write_index; next circular buffer entry that uCode would fill 420 * 421 * The header is followed by the circular buffer of log entries. Entries 422 * with timestamps have the following format: 423 * 424 * __le32 event_id; range 0 - 1500 425 * __le32 timestamp; low 32 bits of TSF (of network, if associated) 426 * __le32 data; event_id-specific data value 427 * 428 * Entries without timestamps contain only event_id and data. 429 * 430 * 431 * 2) error_event_table_ptr indicates base of the error log. This contains 432 * information about any uCode error that occurs. For agn, the format 433 * of the error log is defined by struct iwl_error_event_table. 434 * 435 * The Linux driver can print both logs to the system log when a uCode error 436 * occurs. 437 */ 438 439 /* 440 * Note: This structure is read from the device with IO accesses, 441 * and the reading already does the endian conversion. As it is 442 * read with u32-sized accesses, any members with a different size 443 * need to be ordered correctly though! 444 */ 445 struct iwl_error_event_table { 446 u32 valid; /* (nonzero) valid, (0) log is empty */ 447 u32 error_id; /* type of error */ 448 u32 pc; /* program counter */ 449 u32 blink1; /* branch link */ 450 u32 blink2; /* branch link */ 451 u32 ilink1; /* interrupt link */ 452 u32 ilink2; /* interrupt link */ 453 u32 data1; /* error-specific data */ 454 u32 data2; /* error-specific data */ 455 u32 line; /* source code line of error */ 456 u32 bcon_time; /* beacon timer */ 457 u32 tsf_low; /* network timestamp function timer */ 458 u32 tsf_hi; /* network timestamp function timer */ 459 u32 gp1; /* GP1 timer register */ 460 u32 gp2; /* GP2 timer register */ 461 u32 gp3; /* GP3 timer register */ 462 u32 ucode_ver; /* uCode version */ 463 u32 hw_ver; /* HW Silicon version */ 464 u32 brd_ver; /* HW board version */ 465 u32 log_pc; /* log program counter */ 466 u32 frame_ptr; /* frame pointer */ 467 u32 stack_ptr; /* stack pointer */ 468 u32 hcmd; /* last host command header */ 469 u32 isr0; /* isr status register LMPM_NIC_ISR0: 470 * rxtx_flag */ 471 u32 isr1; /* isr status register LMPM_NIC_ISR1: 472 * host_flag */ 473 u32 isr2; /* isr status register LMPM_NIC_ISR2: 474 * enc_flag */ 475 u32 isr3; /* isr status register LMPM_NIC_ISR3: 476 * time_flag */ 477 u32 isr4; /* isr status register LMPM_NIC_ISR4: 478 * wico interrupt */ 479 u32 isr_pref; /* isr status register LMPM_NIC_PREF_STAT */ 480 u32 wait_event; /* wait event() caller address */ 481 u32 l2p_control; /* L2pControlField */ 482 u32 l2p_duration; /* L2pDurationField */ 483 u32 l2p_mhvalid; /* L2pMhValidBits */ 484 u32 l2p_addr_match; /* L2pAddrMatchStat */ 485 u32 lmpm_pmg_sel; /* indicate which clocks are turned on 486 * (LMPM_PMG_SEL) */ 487 u32 u_timestamp; /* indicate when the date and time of the 488 * compilation */ 489 u32 flow_handler; /* FH read/write pointers, RX credit */ 490 } __packed; 491 492 struct iwl_alive_resp { 493 u8 ucode_minor; 494 u8 ucode_major; 495 __le16 reserved1; 496 u8 sw_rev[8]; 497 u8 ver_type; 498 u8 ver_subtype; /* not "9" for runtime alive */ 499 __le16 reserved2; 500 __le32 log_event_table_ptr; /* SRAM address for event log */ 501 __le32 error_event_table_ptr; /* SRAM address for error log */ 502 __le32 timestamp; 503 __le32 is_valid; 504 } __packed; 505 506 /* 507 * REPLY_ERROR = 0x2 (response only, not a command) 508 */ 509 struct iwl_error_resp { 510 __le32 error_type; 511 u8 cmd_id; 512 u8 reserved1; 513 __le16 bad_cmd_seq_num; 514 __le32 error_info; 515 __le64 timestamp; 516 } __packed; 517 518 /****************************************************************************** 519 * (1) 520 * RXON Commands & Responses: 521 * 522 *****************************************************************************/ 523 524 /* 525 * Rx config defines & structure 526 */ 527 /* rx_config device types */ 528 enum { 529 RXON_DEV_TYPE_AP = 1, 530 RXON_DEV_TYPE_ESS = 3, 531 RXON_DEV_TYPE_IBSS = 4, 532 RXON_DEV_TYPE_SNIFFER = 6, 533 RXON_DEV_TYPE_CP = 7, 534 RXON_DEV_TYPE_2STA = 8, 535 RXON_DEV_TYPE_P2P = 9, 536 }; 537 538 539 #define RXON_RX_CHAIN_DRIVER_FORCE_MSK cpu_to_le16(0x1 << 0) 540 #define RXON_RX_CHAIN_DRIVER_FORCE_POS (0) 541 #define RXON_RX_CHAIN_VALID_MSK cpu_to_le16(0x7 << 1) 542 #define RXON_RX_CHAIN_VALID_POS (1) 543 #define RXON_RX_CHAIN_FORCE_SEL_MSK cpu_to_le16(0x7 << 4) 544 #define RXON_RX_CHAIN_FORCE_SEL_POS (4) 545 #define RXON_RX_CHAIN_FORCE_MIMO_SEL_MSK cpu_to_le16(0x7 << 7) 546 #define RXON_RX_CHAIN_FORCE_MIMO_SEL_POS (7) 547 #define RXON_RX_CHAIN_CNT_MSK cpu_to_le16(0x3 << 10) 548 #define RXON_RX_CHAIN_CNT_POS (10) 549 #define RXON_RX_CHAIN_MIMO_CNT_MSK cpu_to_le16(0x3 << 12) 550 #define RXON_RX_CHAIN_MIMO_CNT_POS (12) 551 #define RXON_RX_CHAIN_MIMO_FORCE_MSK cpu_to_le16(0x1 << 14) 552 #define RXON_RX_CHAIN_MIMO_FORCE_POS (14) 553 554 /* rx_config flags */ 555 /* band & modulation selection */ 556 #define RXON_FLG_BAND_24G_MSK cpu_to_le32(1 << 0) 557 #define RXON_FLG_CCK_MSK cpu_to_le32(1 << 1) 558 /* auto detection enable */ 559 #define RXON_FLG_AUTO_DETECT_MSK cpu_to_le32(1 << 2) 560 /* TGg protection when tx */ 561 #define RXON_FLG_TGG_PROTECT_MSK cpu_to_le32(1 << 3) 562 /* cck short slot & preamble */ 563 #define RXON_FLG_SHORT_SLOT_MSK cpu_to_le32(1 << 4) 564 #define RXON_FLG_SHORT_PREAMBLE_MSK cpu_to_le32(1 << 5) 565 /* antenna selection */ 566 #define RXON_FLG_DIS_DIV_MSK cpu_to_le32(1 << 7) 567 #define RXON_FLG_ANT_SEL_MSK cpu_to_le32(0x0f00) 568 #define RXON_FLG_ANT_A_MSK cpu_to_le32(1 << 8) 569 #define RXON_FLG_ANT_B_MSK cpu_to_le32(1 << 9) 570 /* radar detection enable */ 571 #define RXON_FLG_RADAR_DETECT_MSK cpu_to_le32(1 << 12) 572 #define RXON_FLG_TGJ_NARROW_BAND_MSK cpu_to_le32(1 << 13) 573 /* rx response to host with 8-byte TSF 574 * (according to ON_AIR deassertion) */ 575 #define RXON_FLG_TSF2HOST_MSK cpu_to_le32(1 << 15) 576 577 578 /* HT flags */ 579 #define RXON_FLG_CTRL_CHANNEL_LOC_POS (22) 580 #define RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK cpu_to_le32(0x1 << 22) 581 582 #define RXON_FLG_HT_OPERATING_MODE_POS (23) 583 584 #define RXON_FLG_HT_PROT_MSK cpu_to_le32(0x1 << 23) 585 #define RXON_FLG_HT40_PROT_MSK cpu_to_le32(0x2 << 23) 586 587 #define RXON_FLG_CHANNEL_MODE_POS (25) 588 #define RXON_FLG_CHANNEL_MODE_MSK cpu_to_le32(0x3 << 25) 589 590 /* channel mode */ 591 enum { 592 CHANNEL_MODE_LEGACY = 0, 593 CHANNEL_MODE_PURE_40 = 1, 594 CHANNEL_MODE_MIXED = 2, 595 CHANNEL_MODE_RESERVED = 3, 596 }; 597 #define RXON_FLG_CHANNEL_MODE_LEGACY cpu_to_le32(CHANNEL_MODE_LEGACY << RXON_FLG_CHANNEL_MODE_POS) 598 #define RXON_FLG_CHANNEL_MODE_PURE_40 cpu_to_le32(CHANNEL_MODE_PURE_40 << RXON_FLG_CHANNEL_MODE_POS) 599 #define RXON_FLG_CHANNEL_MODE_MIXED cpu_to_le32(CHANNEL_MODE_MIXED << RXON_FLG_CHANNEL_MODE_POS) 600 601 /* CTS to self (if spec allows) flag */ 602 #define RXON_FLG_SELF_CTS_EN cpu_to_le32(0x1<<30) 603 604 /* rx_config filter flags */ 605 /* accept all data frames */ 606 #define RXON_FILTER_PROMISC_MSK cpu_to_le32(1 << 0) 607 /* pass control & management to host */ 608 #define RXON_FILTER_CTL2HOST_MSK cpu_to_le32(1 << 1) 609 /* accept multi-cast */ 610 #define RXON_FILTER_ACCEPT_GRP_MSK cpu_to_le32(1 << 2) 611 /* don't decrypt uni-cast frames */ 612 #define RXON_FILTER_DIS_DECRYPT_MSK cpu_to_le32(1 << 3) 613 /* don't decrypt multi-cast frames */ 614 #define RXON_FILTER_DIS_GRP_DECRYPT_MSK cpu_to_le32(1 << 4) 615 /* STA is associated */ 616 #define RXON_FILTER_ASSOC_MSK cpu_to_le32(1 << 5) 617 /* transfer to host non bssid beacons in associated state */ 618 #define RXON_FILTER_BCON_AWARE_MSK cpu_to_le32(1 << 6) 619 620 /** 621 * REPLY_RXON = 0x10 (command, has simple generic response) 622 * 623 * RXON tunes the radio tuner to a service channel, and sets up a number 624 * of parameters that are used primarily for Rx, but also for Tx operations. 625 * 626 * NOTE: When tuning to a new channel, driver must set the 627 * RXON_FILTER_ASSOC_MSK to 0. This will clear station-dependent 628 * info within the device, including the station tables, tx retry 629 * rate tables, and txpower tables. Driver must build a new station 630 * table and txpower table before transmitting anything on the RXON 631 * channel. 632 * 633 * NOTE: All RXONs wipe clean the internal txpower table. Driver must 634 * issue a new REPLY_TX_PWR_TABLE_CMD after each REPLY_RXON (0x10), 635 * regardless of whether RXON_FILTER_ASSOC_MSK is set. 636 */ 637 638 struct iwl_rxon_cmd { 639 u8 node_addr[6]; 640 __le16 reserved1; 641 u8 bssid_addr[6]; 642 __le16 reserved2; 643 u8 wlap_bssid_addr[6]; 644 __le16 reserved3; 645 u8 dev_type; 646 u8 air_propagation; 647 __le16 rx_chain; 648 u8 ofdm_basic_rates; 649 u8 cck_basic_rates; 650 __le16 assoc_id; 651 __le32 flags; 652 __le32 filter_flags; 653 __le16 channel; 654 u8 ofdm_ht_single_stream_basic_rates; 655 u8 ofdm_ht_dual_stream_basic_rates; 656 u8 ofdm_ht_triple_stream_basic_rates; 657 u8 reserved5; 658 __le16 acquisition_data; 659 __le16 reserved6; 660 } __packed; 661 662 /* 663 * REPLY_RXON_ASSOC = 0x11 (command, has simple generic response) 664 */ 665 struct iwl_rxon_assoc_cmd { 666 __le32 flags; 667 __le32 filter_flags; 668 u8 ofdm_basic_rates; 669 u8 cck_basic_rates; 670 __le16 reserved1; 671 u8 ofdm_ht_single_stream_basic_rates; 672 u8 ofdm_ht_dual_stream_basic_rates; 673 u8 ofdm_ht_triple_stream_basic_rates; 674 u8 reserved2; 675 __le16 rx_chain_select_flags; 676 __le16 acquisition_data; 677 __le32 reserved3; 678 } __packed; 679 680 #define IWL_CONN_MAX_LISTEN_INTERVAL 10 681 #define IWL_MAX_UCODE_BEACON_INTERVAL 4 /* 4096 */ 682 683 /* 684 * REPLY_RXON_TIMING = 0x14 (command, has simple generic response) 685 */ 686 struct iwl_rxon_time_cmd { 687 __le64 timestamp; 688 __le16 beacon_interval; 689 __le16 atim_window; 690 __le32 beacon_init_val; 691 __le16 listen_interval; 692 u8 dtim_period; 693 u8 delta_cp_bss_tbtts; 694 } __packed; 695 696 /* 697 * REPLY_CHANNEL_SWITCH = 0x72 (command, has simple generic response) 698 */ 699 /** 700 * struct iwl5000_channel_switch_cmd 701 * @band: 0- 5.2GHz, 1- 2.4GHz 702 * @expect_beacon: 0- resume transmits after channel switch 703 * 1- wait for beacon to resume transmits 704 * @channel: new channel number 705 * @rxon_flags: Rx on flags 706 * @rxon_filter_flags: filtering parameters 707 * @switch_time: switch time in extended beacon format 708 * @reserved: reserved bytes 709 */ 710 struct iwl5000_channel_switch_cmd { 711 u8 band; 712 u8 expect_beacon; 713 __le16 channel; 714 __le32 rxon_flags; 715 __le32 rxon_filter_flags; 716 __le32 switch_time; 717 __le32 reserved[2][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES]; 718 } __packed; 719 720 /** 721 * struct iwl6000_channel_switch_cmd 722 * @band: 0- 5.2GHz, 1- 2.4GHz 723 * @expect_beacon: 0- resume transmits after channel switch 724 * 1- wait for beacon to resume transmits 725 * @channel: new channel number 726 * @rxon_flags: Rx on flags 727 * @rxon_filter_flags: filtering parameters 728 * @switch_time: switch time in extended beacon format 729 * @reserved: reserved bytes 730 */ 731 struct iwl6000_channel_switch_cmd { 732 u8 band; 733 u8 expect_beacon; 734 __le16 channel; 735 __le32 rxon_flags; 736 __le32 rxon_filter_flags; 737 __le32 switch_time; 738 __le32 reserved[3][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES]; 739 } __packed; 740 741 /* 742 * CHANNEL_SWITCH_NOTIFICATION = 0x73 (notification only, not a command) 743 */ 744 struct iwl_csa_notification { 745 __le16 band; 746 __le16 channel; 747 __le32 status; /* 0 - OK, 1 - fail */ 748 } __packed; 749 750 /****************************************************************************** 751 * (2) 752 * Quality-of-Service (QOS) Commands & Responses: 753 * 754 *****************************************************************************/ 755 756 /** 757 * struct iwl_ac_qos -- QOS timing params for REPLY_QOS_PARAM 758 * One for each of 4 EDCA access categories in struct iwl_qosparam_cmd 759 * 760 * @cw_min: Contention window, start value in numbers of slots. 761 * Should be a power-of-2, minus 1. Device's default is 0x0f. 762 * @cw_max: Contention window, max value in numbers of slots. 763 * Should be a power-of-2, minus 1. Device's default is 0x3f. 764 * @aifsn: Number of slots in Arbitration Interframe Space (before 765 * performing random backoff timing prior to Tx). Device default 1. 766 * @edca_txop: Length of Tx opportunity, in uSecs. Device default is 0. 767 * 768 * Device will automatically increase contention window by (2*CW) + 1 for each 769 * transmission retry. Device uses cw_max as a bit mask, ANDed with new CW 770 * value, to cap the CW value. 771 */ 772 struct iwl_ac_qos { 773 __le16 cw_min; 774 __le16 cw_max; 775 u8 aifsn; 776 u8 reserved1; 777 __le16 edca_txop; 778 } __packed; 779 780 /* QoS flags defines */ 781 #define QOS_PARAM_FLG_UPDATE_EDCA_MSK cpu_to_le32(0x01) 782 #define QOS_PARAM_FLG_TGN_MSK cpu_to_le32(0x02) 783 #define QOS_PARAM_FLG_TXOP_TYPE_MSK cpu_to_le32(0x10) 784 785 /* Number of Access Categories (AC) (EDCA), queues 0..3 */ 786 #define AC_NUM 4 787 788 /* 789 * REPLY_QOS_PARAM = 0x13 (command, has simple generic response) 790 * 791 * This command sets up timings for each of the 4 prioritized EDCA Tx FIFOs 792 * 0: Background, 1: Best Effort, 2: Video, 3: Voice. 793 */ 794 struct iwl_qosparam_cmd { 795 __le32 qos_flags; 796 struct iwl_ac_qos ac[AC_NUM]; 797 } __packed; 798 799 /****************************************************************************** 800 * (3) 801 * Add/Modify Stations Commands & Responses: 802 * 803 *****************************************************************************/ 804 /* 805 * Multi station support 806 */ 807 808 /* Special, dedicated locations within device's station table */ 809 #define IWL_AP_ID 0 810 #define IWL_AP_ID_PAN 1 811 #define IWL_STA_ID 2 812 #define IWLAGN_PAN_BCAST_ID 14 813 #define IWLAGN_BROADCAST_ID 15 814 #define IWLAGN_STATION_COUNT 16 815 816 #define IWL_INVALID_STATION 255 817 #define IWL_MAX_TID_COUNT 8 818 #define IWL_TID_NON_QOS IWL_MAX_TID_COUNT 819 820 #define STA_FLG_TX_RATE_MSK cpu_to_le32(1 << 2) 821 #define STA_FLG_PWR_SAVE_MSK cpu_to_le32(1 << 8) 822 #define STA_FLG_PAN_STATION cpu_to_le32(1 << 13) 823 #define STA_FLG_RTS_MIMO_PROT_MSK cpu_to_le32(1 << 17) 824 #define STA_FLG_AGG_MPDU_8US_MSK cpu_to_le32(1 << 18) 825 #define STA_FLG_MAX_AGG_SIZE_POS (19) 826 #define STA_FLG_MAX_AGG_SIZE_MSK cpu_to_le32(3 << 19) 827 #define STA_FLG_HT40_EN_MSK cpu_to_le32(1 << 21) 828 #define STA_FLG_MIMO_DIS_MSK cpu_to_le32(1 << 22) 829 #define STA_FLG_AGG_MPDU_DENSITY_POS (23) 830 #define STA_FLG_AGG_MPDU_DENSITY_MSK cpu_to_le32(7 << 23) 831 832 /* Use in mode field. 1: modify existing entry, 0: add new station entry */ 833 #define STA_CONTROL_MODIFY_MSK 0x01 834 835 /* key flags __le16*/ 836 #define STA_KEY_FLG_ENCRYPT_MSK cpu_to_le16(0x0007) 837 #define STA_KEY_FLG_NO_ENC cpu_to_le16(0x0000) 838 #define STA_KEY_FLG_WEP cpu_to_le16(0x0001) 839 #define STA_KEY_FLG_CCMP cpu_to_le16(0x0002) 840 #define STA_KEY_FLG_TKIP cpu_to_le16(0x0003) 841 842 #define STA_KEY_FLG_KEYID_POS 8 843 #define STA_KEY_FLG_INVALID cpu_to_le16(0x0800) 844 /* wep key is either from global key (0) or from station info array (1) */ 845 #define STA_KEY_FLG_MAP_KEY_MSK cpu_to_le16(0x0008) 846 847 /* wep key in STA: 5-bytes (0) or 13-bytes (1) */ 848 #define STA_KEY_FLG_KEY_SIZE_MSK cpu_to_le16(0x1000) 849 #define STA_KEY_MULTICAST_MSK cpu_to_le16(0x4000) 850 #define STA_KEY_MAX_NUM 8 851 #define STA_KEY_MAX_NUM_PAN 16 852 /* must not match WEP_INVALID_OFFSET */ 853 #define IWLAGN_HW_KEY_DEFAULT 0xfe 854 855 /* Flags indicate whether to modify vs. don't change various station params */ 856 #define STA_MODIFY_KEY_MASK 0x01 857 #define STA_MODIFY_TID_DISABLE_TX 0x02 858 #define STA_MODIFY_TX_RATE_MSK 0x04 859 #define STA_MODIFY_ADDBA_TID_MSK 0x08 860 #define STA_MODIFY_DELBA_TID_MSK 0x10 861 #define STA_MODIFY_SLEEP_TX_COUNT_MSK 0x20 862 863 /* Receiver address (actually, Rx station's index into station table), 864 * combined with Traffic ID (QOS priority), in format used by Tx Scheduler */ 865 #define BUILD_RAxTID(sta_id, tid) (((sta_id) << 4) + (tid)) 866 867 /* agn */ 868 struct iwl_keyinfo { 869 __le16 key_flags; 870 u8 tkip_rx_tsc_byte2; /* TSC[2] for key mix ph1 detection */ 871 u8 reserved1; 872 __le16 tkip_rx_ttak[5]; /* 10-byte unicast TKIP TTAK */ 873 u8 key_offset; 874 u8 reserved2; 875 u8 key[16]; /* 16-byte unicast decryption key */ 876 __le64 tx_secur_seq_cnt; 877 __le64 hw_tkip_mic_rx_key; 878 __le64 hw_tkip_mic_tx_key; 879 } __packed; 880 881 /** 882 * struct sta_id_modify 883 * @addr[ETH_ALEN]: station's MAC address 884 * @sta_id: index of station in uCode's station table 885 * @modify_mask: STA_MODIFY_*, 1: modify, 0: don't change 886 * 887 * Driver selects unused table index when adding new station, 888 * or the index to a pre-existing station entry when modifying that station. 889 * Some indexes have special purposes (IWL_AP_ID, index 0, is for AP). 890 * 891 * modify_mask flags select which parameters to modify vs. leave alone. 892 */ 893 struct sta_id_modify { 894 u8 addr[ETH_ALEN]; 895 __le16 reserved1; 896 u8 sta_id; 897 u8 modify_mask; 898 __le16 reserved2; 899 } __packed; 900 901 /* 902 * REPLY_ADD_STA = 0x18 (command) 903 * 904 * The device contains an internal table of per-station information, 905 * with info on security keys, aggregation parameters, and Tx rates for 906 * initial Tx attempt and any retries (agn devices uses 907 * REPLY_TX_LINK_QUALITY_CMD, 908 * 909 * REPLY_ADD_STA sets up the table entry for one station, either creating 910 * a new entry, or modifying a pre-existing one. 911 * 912 * NOTE: RXON command (without "associated" bit set) wipes the station table 913 * clean. Moving into RF_KILL state does this also. Driver must set up 914 * new station table before transmitting anything on the RXON channel 915 * (except active scans or active measurements; those commands carry 916 * their own txpower/rate setup data). 917 * 918 * When getting started on a new channel, driver must set up the 919 * IWL_BROADCAST_ID entry (last entry in the table). For a client 920 * station in a BSS, once an AP is selected, driver sets up the AP STA 921 * in the IWL_AP_ID entry (1st entry in the table). BROADCAST and AP 922 * are all that are needed for a BSS client station. If the device is 923 * used as AP, or in an IBSS network, driver must set up station table 924 * entries for all STAs in network, starting with index IWL_STA_ID. 925 */ 926 927 struct iwl_addsta_cmd { 928 u8 mode; /* 1: modify existing, 0: add new station */ 929 u8 reserved[3]; 930 struct sta_id_modify sta; 931 struct iwl_keyinfo key; 932 __le32 station_flags; /* STA_FLG_* */ 933 __le32 station_flags_msk; /* STA_FLG_* */ 934 935 /* bit field to disable (1) or enable (0) Tx for Traffic ID (TID) 936 * corresponding to bit (e.g. bit 5 controls TID 5). 937 * Set modify_mask bit STA_MODIFY_TID_DISABLE_TX to use this field. */ 938 __le16 tid_disable_tx; 939 __le16 legacy_reserved; 940 941 /* TID for which to add block-ack support. 942 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */ 943 u8 add_immediate_ba_tid; 944 945 /* TID for which to remove block-ack support. 946 * Set modify_mask bit STA_MODIFY_DELBA_TID_MSK to use this field. */ 947 u8 remove_immediate_ba_tid; 948 949 /* Starting Sequence Number for added block-ack support. 950 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */ 951 __le16 add_immediate_ba_ssn; 952 953 /* 954 * Number of packets OK to transmit to station even though 955 * it is asleep -- used to synchronise PS-poll and u-APSD 956 * responses while ucode keeps track of STA sleep state. 957 */ 958 __le16 sleep_tx_count; 959 960 __le16 reserved2; 961 } __packed; 962 963 964 #define ADD_STA_SUCCESS_MSK 0x1 965 #define ADD_STA_NO_ROOM_IN_TABLE 0x2 966 #define ADD_STA_NO_BLOCK_ACK_RESOURCE 0x4 967 #define ADD_STA_MODIFY_NON_EXIST_STA 0x8 968 /* 969 * REPLY_ADD_STA = 0x18 (response) 970 */ 971 struct iwl_add_sta_resp { 972 u8 status; /* ADD_STA_* */ 973 } __packed; 974 975 #define REM_STA_SUCCESS_MSK 0x1 976 /* 977 * REPLY_REM_STA = 0x19 (response) 978 */ 979 struct iwl_rem_sta_resp { 980 u8 status; 981 } __packed; 982 983 /* 984 * REPLY_REM_STA = 0x19 (command) 985 */ 986 struct iwl_rem_sta_cmd { 987 u8 num_sta; /* number of removed stations */ 988 u8 reserved[3]; 989 u8 addr[ETH_ALEN]; /* MAC addr of the first station */ 990 u8 reserved2[2]; 991 } __packed; 992 993 994 /* WiFi queues mask */ 995 #define IWL_SCD_BK_MSK cpu_to_le32(BIT(0)) 996 #define IWL_SCD_BE_MSK cpu_to_le32(BIT(1)) 997 #define IWL_SCD_VI_MSK cpu_to_le32(BIT(2)) 998 #define IWL_SCD_VO_MSK cpu_to_le32(BIT(3)) 999 #define IWL_SCD_MGMT_MSK cpu_to_le32(BIT(3)) 1000 1001 /* PAN queues mask */ 1002 #define IWL_PAN_SCD_BK_MSK cpu_to_le32(BIT(4)) 1003 #define IWL_PAN_SCD_BE_MSK cpu_to_le32(BIT(5)) 1004 #define IWL_PAN_SCD_VI_MSK cpu_to_le32(BIT(6)) 1005 #define IWL_PAN_SCD_VO_MSK cpu_to_le32(BIT(7)) 1006 #define IWL_PAN_SCD_MGMT_MSK cpu_to_le32(BIT(7)) 1007 #define IWL_PAN_SCD_MULTICAST_MSK cpu_to_le32(BIT(8)) 1008 1009 #define IWL_AGG_TX_QUEUE_MSK cpu_to_le32(0xffc00) 1010 1011 #define IWL_DROP_SINGLE 0 1012 #define IWL_DROP_ALL (BIT(IWL_RXON_CTX_BSS) | BIT(IWL_RXON_CTX_PAN)) 1013 1014 /* 1015 * REPLY_TXFIFO_FLUSH = 0x1e(command and response) 1016 * 1017 * When using full FIFO flush this command checks the scheduler HW block WR/RD 1018 * pointers to check if all the frames were transferred by DMA into the 1019 * relevant TX FIFO queue. Only when the DMA is finished and the queue is 1020 * empty the command can finish. 1021 * This command is used to flush the TXFIFO from transmit commands, it may 1022 * operate on single or multiple queues, the command queue can't be flushed by 1023 * this command. The command response is returned when all the queue flush 1024 * operations are done. Each TX command flushed return response with the FLUSH 1025 * status set in the TX response status. When FIFO flush operation is used, 1026 * the flush operation ends when both the scheduler DMA done and TXFIFO empty 1027 * are set. 1028 * 1029 * @fifo_control: bit mask for which queues to flush 1030 * @flush_control: flush controls 1031 * 0: Dump single MSDU 1032 * 1: Dump multiple MSDU according to PS, INVALID STA, TTL, TID disable. 1033 * 2: Dump all FIFO 1034 */ 1035 struct iwl_txfifo_flush_cmd { 1036 __le32 fifo_control; 1037 __le16 flush_control; 1038 __le16 reserved; 1039 } __packed; 1040 1041 /* 1042 * REPLY_WEP_KEY = 0x20 1043 */ 1044 struct iwl_wep_key { 1045 u8 key_index; 1046 u8 key_offset; 1047 u8 reserved1[2]; 1048 u8 key_size; 1049 u8 reserved2[3]; 1050 u8 key[16]; 1051 } __packed; 1052 1053 struct iwl_wep_cmd { 1054 u8 num_keys; 1055 u8 global_key_type; 1056 u8 flags; 1057 u8 reserved; 1058 struct iwl_wep_key key[0]; 1059 } __packed; 1060 1061 #define WEP_KEY_WEP_TYPE 1 1062 #define WEP_KEYS_MAX 4 1063 #define WEP_INVALID_OFFSET 0xff 1064 #define WEP_KEY_LEN_64 5 1065 #define WEP_KEY_LEN_128 13 1066 1067 /****************************************************************************** 1068 * (4) 1069 * Rx Responses: 1070 * 1071 *****************************************************************************/ 1072 1073 #define RX_RES_STATUS_NO_CRC32_ERROR cpu_to_le32(1 << 0) 1074 #define RX_RES_STATUS_NO_RXE_OVERFLOW cpu_to_le32(1 << 1) 1075 1076 #define RX_RES_PHY_FLAGS_BAND_24_MSK cpu_to_le16(1 << 0) 1077 #define RX_RES_PHY_FLAGS_MOD_CCK_MSK cpu_to_le16(1 << 1) 1078 #define RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK cpu_to_le16(1 << 2) 1079 #define RX_RES_PHY_FLAGS_NARROW_BAND_MSK cpu_to_le16(1 << 3) 1080 #define RX_RES_PHY_FLAGS_ANTENNA_MSK 0xf0 1081 #define RX_RES_PHY_FLAGS_ANTENNA_POS 4 1082 1083 #define RX_RES_STATUS_SEC_TYPE_MSK (0x7 << 8) 1084 #define RX_RES_STATUS_SEC_TYPE_NONE (0x0 << 8) 1085 #define RX_RES_STATUS_SEC_TYPE_WEP (0x1 << 8) 1086 #define RX_RES_STATUS_SEC_TYPE_CCMP (0x2 << 8) 1087 #define RX_RES_STATUS_SEC_TYPE_TKIP (0x3 << 8) 1088 #define RX_RES_STATUS_SEC_TYPE_ERR (0x7 << 8) 1089 1090 #define RX_RES_STATUS_STATION_FOUND (1<<6) 1091 #define RX_RES_STATUS_NO_STATION_INFO_MISMATCH (1<<7) 1092 1093 #define RX_RES_STATUS_DECRYPT_TYPE_MSK (0x3 << 11) 1094 #define RX_RES_STATUS_NOT_DECRYPT (0x0 << 11) 1095 #define RX_RES_STATUS_DECRYPT_OK (0x3 << 11) 1096 #define RX_RES_STATUS_BAD_ICV_MIC (0x1 << 11) 1097 #define RX_RES_STATUS_BAD_KEY_TTAK (0x2 << 11) 1098 1099 #define RX_MPDU_RES_STATUS_ICV_OK (0x20) 1100 #define RX_MPDU_RES_STATUS_MIC_OK (0x40) 1101 #define RX_MPDU_RES_STATUS_TTAK_OK (1 << 7) 1102 #define RX_MPDU_RES_STATUS_DEC_DONE_MSK (0x800) 1103 1104 1105 #define IWLAGN_RX_RES_PHY_CNT 8 1106 #define IWLAGN_RX_RES_AGC_IDX 1 1107 #define IWLAGN_RX_RES_RSSI_AB_IDX 2 1108 #define IWLAGN_RX_RES_RSSI_C_IDX 3 1109 #define IWLAGN_OFDM_AGC_MSK 0xfe00 1110 #define IWLAGN_OFDM_AGC_BIT_POS 9 1111 #define IWLAGN_OFDM_RSSI_INBAND_A_BITMSK 0x00ff 1112 #define IWLAGN_OFDM_RSSI_ALLBAND_A_BITMSK 0xff00 1113 #define IWLAGN_OFDM_RSSI_A_BIT_POS 0 1114 #define IWLAGN_OFDM_RSSI_INBAND_B_BITMSK 0xff0000 1115 #define IWLAGN_OFDM_RSSI_ALLBAND_B_BITMSK 0xff000000 1116 #define IWLAGN_OFDM_RSSI_B_BIT_POS 16 1117 #define IWLAGN_OFDM_RSSI_INBAND_C_BITMSK 0x00ff 1118 #define IWLAGN_OFDM_RSSI_ALLBAND_C_BITMSK 0xff00 1119 #define IWLAGN_OFDM_RSSI_C_BIT_POS 0 1120 1121 struct iwlagn_non_cfg_phy { 1122 __le32 non_cfg_phy[IWLAGN_RX_RES_PHY_CNT]; /* up to 8 phy entries */ 1123 } __packed; 1124 1125 1126 /* 1127 * REPLY_RX = 0xc3 (response only, not a command) 1128 * Used only for legacy (non 11n) frames. 1129 */ 1130 struct iwl_rx_phy_res { 1131 u8 non_cfg_phy_cnt; /* non configurable DSP phy data byte count */ 1132 u8 cfg_phy_cnt; /* configurable DSP phy data byte count */ 1133 u8 stat_id; /* configurable DSP phy data set ID */ 1134 u8 reserved1; 1135 __le64 timestamp; /* TSF at on air rise */ 1136 __le32 beacon_time_stamp; /* beacon at on-air rise */ 1137 __le16 phy_flags; /* general phy flags: band, modulation, ... */ 1138 __le16 channel; /* channel number */ 1139 u8 non_cfg_phy_buf[32]; /* for various implementations of non_cfg_phy */ 1140 __le32 rate_n_flags; /* RATE_MCS_* */ 1141 __le16 byte_count; /* frame's byte-count */ 1142 __le16 frame_time; /* frame's time on the air */ 1143 } __packed; 1144 1145 struct iwl_rx_mpdu_res_start { 1146 __le16 byte_count; 1147 __le16 reserved; 1148 } __packed; 1149 1150 1151 /****************************************************************************** 1152 * (5) 1153 * Tx Commands & Responses: 1154 * 1155 * Driver must place each REPLY_TX command into one of the prioritized Tx 1156 * queues in host DRAM, shared between driver and device (see comments for 1157 * SCD registers and Tx/Rx Queues). When the device's Tx scheduler and uCode 1158 * are preparing to transmit, the device pulls the Tx command over the PCI 1159 * bus via one of the device's Tx DMA channels, to fill an internal FIFO 1160 * from which data will be transmitted. 1161 * 1162 * uCode handles all timing and protocol related to control frames 1163 * (RTS/CTS/ACK), based on flags in the Tx command. uCode and Tx scheduler 1164 * handle reception of block-acks; uCode updates the host driver via 1165 * REPLY_COMPRESSED_BA. 1166 * 1167 * uCode handles retrying Tx when an ACK is expected but not received. 1168 * This includes trying lower data rates than the one requested in the Tx 1169 * command, as set up by the REPLY_TX_LINK_QUALITY_CMD (agn). 1170 * 1171 * Driver sets up transmit power for various rates via REPLY_TX_PWR_TABLE_CMD. 1172 * This command must be executed after every RXON command, before Tx can occur. 1173 *****************************************************************************/ 1174 1175 /* REPLY_TX Tx flags field */ 1176 1177 /* 1178 * 1: Use RTS/CTS protocol or CTS-to-self if spec allows it 1179 * before this frame. if CTS-to-self required check 1180 * RXON_FLG_SELF_CTS_EN status. 1181 */ 1182 #define TX_CMD_FLG_PROT_REQUIRE_MSK cpu_to_le32(1 << 0) 1183 1184 /* 1: Expect ACK from receiving station 1185 * 0: Don't expect ACK (MAC header's duration field s/b 0) 1186 * Set this for unicast frames, but not broadcast/multicast. */ 1187 #define TX_CMD_FLG_ACK_MSK cpu_to_le32(1 << 3) 1188 1189 /* For agn devices: 1190 * 1: Use rate scale table (see REPLY_TX_LINK_QUALITY_CMD). 1191 * Tx command's initial_rate_index indicates first rate to try; 1192 * uCode walks through table for additional Tx attempts. 1193 * 0: Use Tx rate/MCS from Tx command's rate_n_flags field. 1194 * This rate will be used for all Tx attempts; it will not be scaled. */ 1195 #define TX_CMD_FLG_STA_RATE_MSK cpu_to_le32(1 << 4) 1196 1197 /* 1: Expect immediate block-ack. 1198 * Set when Txing a block-ack request frame. Also set TX_CMD_FLG_ACK_MSK. */ 1199 #define TX_CMD_FLG_IMM_BA_RSP_MASK cpu_to_le32(1 << 6) 1200 1201 /* Tx antenna selection field; reserved (0) for agn devices. */ 1202 #define TX_CMD_FLG_ANT_SEL_MSK cpu_to_le32(0xf00) 1203 1204 /* 1: Ignore Bluetooth priority for this frame. 1205 * 0: Delay Tx until Bluetooth device is done (normal usage). */ 1206 #define TX_CMD_FLG_IGNORE_BT cpu_to_le32(1 << 12) 1207 1208 /* 1: uCode overrides sequence control field in MAC header. 1209 * 0: Driver provides sequence control field in MAC header. 1210 * Set this for management frames, non-QOS data frames, non-unicast frames, 1211 * and also in Tx command embedded in REPLY_SCAN_CMD for active scans. */ 1212 #define TX_CMD_FLG_SEQ_CTL_MSK cpu_to_le32(1 << 13) 1213 1214 /* 1: This frame is non-last MPDU; more fragments are coming. 1215 * 0: Last fragment, or not using fragmentation. */ 1216 #define TX_CMD_FLG_MORE_FRAG_MSK cpu_to_le32(1 << 14) 1217 1218 /* 1: uCode calculates and inserts Timestamp Function (TSF) in outgoing frame. 1219 * 0: No TSF required in outgoing frame. 1220 * Set this for transmitting beacons and probe responses. */ 1221 #define TX_CMD_FLG_TSF_MSK cpu_to_le32(1 << 16) 1222 1223 /* 1: Driver inserted 2 bytes pad after the MAC header, for (required) dword 1224 * alignment of frame's payload data field. 1225 * 0: No pad 1226 * Set this for MAC headers with 26 or 30 bytes, i.e. those with QOS or ADDR4 1227 * field (but not both). Driver must align frame data (i.e. data following 1228 * MAC header) to DWORD boundary. */ 1229 #define TX_CMD_FLG_MH_PAD_MSK cpu_to_le32(1 << 20) 1230 1231 /* accelerate aggregation support 1232 * 0 - no CCMP encryption; 1 - CCMP encryption */ 1233 #define TX_CMD_FLG_AGG_CCMP_MSK cpu_to_le32(1 << 22) 1234 1235 /* HCCA-AP - disable duration overwriting. */ 1236 #define TX_CMD_FLG_DUR_MSK cpu_to_le32(1 << 25) 1237 1238 1239 /* 1240 * TX command security control 1241 */ 1242 #define TX_CMD_SEC_WEP 0x01 1243 #define TX_CMD_SEC_CCM 0x02 1244 #define TX_CMD_SEC_TKIP 0x03 1245 #define TX_CMD_SEC_MSK 0x03 1246 #define TX_CMD_SEC_SHIFT 6 1247 #define TX_CMD_SEC_KEY128 0x08 1248 1249 /* 1250 * security overhead sizes 1251 */ 1252 #define WEP_IV_LEN 4 1253 #define WEP_ICV_LEN 4 1254 #define CCMP_MIC_LEN 8 1255 #define TKIP_ICV_LEN 4 1256 1257 /* 1258 * REPLY_TX = 0x1c (command) 1259 */ 1260 1261 /* 1262 * 4965 uCode updates these Tx attempt count values in host DRAM. 1263 * Used for managing Tx retries when expecting block-acks. 1264 * Driver should set these fields to 0. 1265 */ 1266 struct iwl_dram_scratch { 1267 u8 try_cnt; /* Tx attempts */ 1268 u8 bt_kill_cnt; /* Tx attempts blocked by Bluetooth device */ 1269 __le16 reserved; 1270 } __packed; 1271 1272 struct iwl_tx_cmd { 1273 /* 1274 * MPDU byte count: 1275 * MAC header (24/26/30/32 bytes) + 2 bytes pad if 26/30 header size, 1276 * + 8 byte IV for CCM or TKIP (not used for WEP) 1277 * + Data payload 1278 * + 8-byte MIC (not used for CCM/WEP) 1279 * NOTE: Does not include Tx command bytes, post-MAC pad bytes, 1280 * MIC (CCM) 8 bytes, ICV (WEP/TKIP/CKIP) 4 bytes, CRC 4 bytes.i 1281 * Range: 14-2342 bytes. 1282 */ 1283 __le16 len; 1284 1285 /* 1286 * MPDU or MSDU byte count for next frame. 1287 * Used for fragmentation and bursting, but not 11n aggregation. 1288 * Same as "len", but for next frame. Set to 0 if not applicable. 1289 */ 1290 __le16 next_frame_len; 1291 1292 __le32 tx_flags; /* TX_CMD_FLG_* */ 1293 1294 /* uCode may modify this field of the Tx command (in host DRAM!). 1295 * Driver must also set dram_lsb_ptr and dram_msb_ptr in this cmd. */ 1296 struct iwl_dram_scratch scratch; 1297 1298 /* Rate for *all* Tx attempts, if TX_CMD_FLG_STA_RATE_MSK is cleared. */ 1299 __le32 rate_n_flags; /* RATE_MCS_* */ 1300 1301 /* Index of destination station in uCode's station table */ 1302 u8 sta_id; 1303 1304 /* Type of security encryption: CCM or TKIP */ 1305 u8 sec_ctl; /* TX_CMD_SEC_* */ 1306 1307 /* 1308 * Index into rate table (see REPLY_TX_LINK_QUALITY_CMD) for initial 1309 * Tx attempt, if TX_CMD_FLG_STA_RATE_MSK is set. Normally "0" for 1310 * data frames, this field may be used to selectively reduce initial 1311 * rate (via non-0 value) for special frames (e.g. management), while 1312 * still supporting rate scaling for all frames. 1313 */ 1314 u8 initial_rate_index; 1315 u8 reserved; 1316 u8 key[16]; 1317 __le16 next_frame_flags; 1318 __le16 reserved2; 1319 union { 1320 __le32 life_time; 1321 __le32 attempt; 1322 } stop_time; 1323 1324 /* Host DRAM physical address pointer to "scratch" in this command. 1325 * Must be dword aligned. "0" in dram_lsb_ptr disables usage. */ 1326 __le32 dram_lsb_ptr; 1327 u8 dram_msb_ptr; 1328 1329 u8 rts_retry_limit; /*byte 50 */ 1330 u8 data_retry_limit; /*byte 51 */ 1331 u8 tid_tspec; 1332 union { 1333 __le16 pm_frame_timeout; 1334 __le16 attempt_duration; 1335 } timeout; 1336 1337 /* 1338 * Duration of EDCA burst Tx Opportunity, in 32-usec units. 1339 * Set this if txop time is not specified by HCCA protocol (e.g. by AP). 1340 */ 1341 __le16 driver_txop; 1342 1343 /* 1344 * MAC header goes here, followed by 2 bytes padding if MAC header 1345 * length is 26 or 30 bytes, followed by payload data 1346 */ 1347 u8 payload[0]; 1348 struct ieee80211_hdr hdr[0]; 1349 } __packed; 1350 1351 /* 1352 * TX command response is sent after *agn* transmission attempts. 1353 * 1354 * both postpone and abort status are expected behavior from uCode. there is 1355 * no special operation required from driver; except for RFKILL_FLUSH, 1356 * which required tx flush host command to flush all the tx frames in queues 1357 */ 1358 enum { 1359 TX_STATUS_SUCCESS = 0x01, 1360 TX_STATUS_DIRECT_DONE = 0x02, 1361 /* postpone TX */ 1362 TX_STATUS_POSTPONE_DELAY = 0x40, 1363 TX_STATUS_POSTPONE_FEW_BYTES = 0x41, 1364 TX_STATUS_POSTPONE_BT_PRIO = 0x42, 1365 TX_STATUS_POSTPONE_QUIET_PERIOD = 0x43, 1366 TX_STATUS_POSTPONE_CALC_TTAK = 0x44, 1367 /* abort TX */ 1368 TX_STATUS_FAIL_INTERNAL_CROSSED_RETRY = 0x81, 1369 TX_STATUS_FAIL_SHORT_LIMIT = 0x82, 1370 TX_STATUS_FAIL_LONG_LIMIT = 0x83, 1371 TX_STATUS_FAIL_FIFO_UNDERRUN = 0x84, 1372 TX_STATUS_FAIL_DRAIN_FLOW = 0x85, 1373 TX_STATUS_FAIL_RFKILL_FLUSH = 0x86, 1374 TX_STATUS_FAIL_LIFE_EXPIRE = 0x87, 1375 TX_STATUS_FAIL_DEST_PS = 0x88, 1376 TX_STATUS_FAIL_HOST_ABORTED = 0x89, 1377 TX_STATUS_FAIL_BT_RETRY = 0x8a, 1378 TX_STATUS_FAIL_STA_INVALID = 0x8b, 1379 TX_STATUS_FAIL_FRAG_DROPPED = 0x8c, 1380 TX_STATUS_FAIL_TID_DISABLE = 0x8d, 1381 TX_STATUS_FAIL_FIFO_FLUSHED = 0x8e, 1382 TX_STATUS_FAIL_INSUFFICIENT_CF_POLL = 0x8f, 1383 TX_STATUS_FAIL_PASSIVE_NO_RX = 0x90, 1384 TX_STATUS_FAIL_NO_BEACON_ON_RADAR = 0x91, 1385 }; 1386 1387 #define TX_PACKET_MODE_REGULAR 0x0000 1388 #define TX_PACKET_MODE_BURST_SEQ 0x0100 1389 #define TX_PACKET_MODE_BURST_FIRST 0x0200 1390 1391 enum { 1392 TX_POWER_PA_NOT_ACTIVE = 0x0, 1393 }; 1394 1395 enum { 1396 TX_STATUS_MSK = 0x000000ff, /* bits 0:7 */ 1397 TX_STATUS_DELAY_MSK = 0x00000040, 1398 TX_STATUS_ABORT_MSK = 0x00000080, 1399 TX_PACKET_MODE_MSK = 0x0000ff00, /* bits 8:15 */ 1400 TX_FIFO_NUMBER_MSK = 0x00070000, /* bits 16:18 */ 1401 TX_RESERVED = 0x00780000, /* bits 19:22 */ 1402 TX_POWER_PA_DETECT_MSK = 0x7f800000, /* bits 23:30 */ 1403 TX_ABORT_REQUIRED_MSK = 0x80000000, /* bits 31:31 */ 1404 }; 1405 1406 /* ******************************* 1407 * TX aggregation status 1408 ******************************* */ 1409 1410 enum { 1411 AGG_TX_STATE_TRANSMITTED = 0x00, 1412 AGG_TX_STATE_UNDERRUN_MSK = 0x01, 1413 AGG_TX_STATE_BT_PRIO_MSK = 0x02, 1414 AGG_TX_STATE_FEW_BYTES_MSK = 0x04, 1415 AGG_TX_STATE_ABORT_MSK = 0x08, 1416 AGG_TX_STATE_LAST_SENT_TTL_MSK = 0x10, 1417 AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK = 0x20, 1418 AGG_TX_STATE_LAST_SENT_BT_KILL_MSK = 0x40, 1419 AGG_TX_STATE_SCD_QUERY_MSK = 0x80, 1420 AGG_TX_STATE_TEST_BAD_CRC32_MSK = 0x100, 1421 AGG_TX_STATE_RESPONSE_MSK = 0x1ff, 1422 AGG_TX_STATE_DUMP_TX_MSK = 0x200, 1423 AGG_TX_STATE_DELAY_TX_MSK = 0x400 1424 }; 1425 1426 #define AGG_TX_STATUS_MSK 0x00000fff /* bits 0:11 */ 1427 #define AGG_TX_TRY_MSK 0x0000f000 /* bits 12:15 */ 1428 1429 #define AGG_TX_STATE_LAST_SENT_MSK (AGG_TX_STATE_LAST_SENT_TTL_MSK | \ 1430 AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK | \ 1431 AGG_TX_STATE_LAST_SENT_BT_KILL_MSK) 1432 1433 /* # tx attempts for first frame in aggregation */ 1434 #define AGG_TX_STATE_TRY_CNT_POS 12 1435 #define AGG_TX_STATE_TRY_CNT_MSK 0xf000 1436 1437 /* Command ID and sequence number of Tx command for this frame */ 1438 #define AGG_TX_STATE_SEQ_NUM_POS 16 1439 #define AGG_TX_STATE_SEQ_NUM_MSK 0xffff0000 1440 1441 /* 1442 * REPLY_TX = 0x1c (response) 1443 * 1444 * This response may be in one of two slightly different formats, indicated 1445 * by the frame_count field: 1446 * 1447 * 1) No aggregation (frame_count == 1). This reports Tx results for 1448 * a single frame. Multiple attempts, at various bit rates, may have 1449 * been made for this frame. 1450 * 1451 * 2) Aggregation (frame_count > 1). This reports Tx results for 1452 * 2 or more frames that used block-acknowledge. All frames were 1453 * transmitted at same rate. Rate scaling may have been used if first 1454 * frame in this new agg block failed in previous agg block(s). 1455 * 1456 * Note that, for aggregation, ACK (block-ack) status is not delivered here; 1457 * block-ack has not been received by the time the agn device records 1458 * this status. 1459 * This status relates to reasons the tx might have been blocked or aborted 1460 * within the sending station (this agn device), rather than whether it was 1461 * received successfully by the destination station. 1462 */ 1463 struct agg_tx_status { 1464 __le16 status; 1465 __le16 sequence; 1466 } __packed; 1467 1468 /* 1469 * definitions for initial rate index field 1470 * bits [3:0] initial rate index 1471 * bits [6:4] rate table color, used for the initial rate 1472 * bit-7 invalid rate indication 1473 * i.e. rate was not chosen from rate table 1474 * or rate table color was changed during frame retries 1475 * refer tlc rate info 1476 */ 1477 1478 #define IWL50_TX_RES_INIT_RATE_INDEX_POS 0 1479 #define IWL50_TX_RES_INIT_RATE_INDEX_MSK 0x0f 1480 #define IWL50_TX_RES_RATE_TABLE_COLOR_POS 4 1481 #define IWL50_TX_RES_RATE_TABLE_COLOR_MSK 0x70 1482 #define IWL50_TX_RES_INV_RATE_INDEX_MSK 0x80 1483 1484 /* refer to ra_tid */ 1485 #define IWLAGN_TX_RES_TID_POS 0 1486 #define IWLAGN_TX_RES_TID_MSK 0x0f 1487 #define IWLAGN_TX_RES_RA_POS 4 1488 #define IWLAGN_TX_RES_RA_MSK 0xf0 1489 1490 struct iwlagn_tx_resp { 1491 u8 frame_count; /* 1 no aggregation, >1 aggregation */ 1492 u8 bt_kill_count; /* # blocked by bluetooth (unused for agg) */ 1493 u8 failure_rts; /* # failures due to unsuccessful RTS */ 1494 u8 failure_frame; /* # failures due to no ACK (unused for agg) */ 1495 1496 /* For non-agg: Rate at which frame was successful. 1497 * For agg: Rate at which all frames were transmitted. */ 1498 __le32 rate_n_flags; /* RATE_MCS_* */ 1499 1500 /* For non-agg: RTS + CTS + frame tx attempts time + ACK. 1501 * For agg: RTS + CTS + aggregation tx time + block-ack time. */ 1502 __le16 wireless_media_time; /* uSecs */ 1503 1504 u8 pa_status; /* RF power amplifier measurement (not used) */ 1505 u8 pa_integ_res_a[3]; 1506 u8 pa_integ_res_b[3]; 1507 u8 pa_integ_res_C[3]; 1508 1509 __le32 tfd_info; 1510 __le16 seq_ctl; 1511 __le16 byte_cnt; 1512 u8 tlc_info; 1513 u8 ra_tid; /* tid (0:3), sta_id (4:7) */ 1514 __le16 frame_ctrl; 1515 /* 1516 * For non-agg: frame status TX_STATUS_* 1517 * For agg: status of 1st frame, AGG_TX_STATE_*; other frame status 1518 * fields follow this one, up to frame_count. 1519 * Bit fields: 1520 * 11- 0: AGG_TX_STATE_* status code 1521 * 15-12: Retry count for 1st frame in aggregation (retries 1522 * occur if tx failed for this frame when it was a 1523 * member of a previous aggregation block). If rate 1524 * scaling is used, retry count indicates the rate 1525 * table entry used for all frames in the new agg. 1526 * 31-16: Sequence # for this frame's Tx cmd (not SSN!) 1527 */ 1528 struct agg_tx_status status; /* TX status (in aggregation - 1529 * status of 1st frame) */ 1530 } __packed; 1531 /* 1532 * REPLY_COMPRESSED_BA = 0xc5 (response only, not a command) 1533 * 1534 * Reports Block-Acknowledge from recipient station 1535 */ 1536 struct iwl_compressed_ba_resp { 1537 __le32 sta_addr_lo32; 1538 __le16 sta_addr_hi16; 1539 __le16 reserved; 1540 1541 /* Index of recipient (BA-sending) station in uCode's station table */ 1542 u8 sta_id; 1543 u8 tid; 1544 __le16 seq_ctl; 1545 __le64 bitmap; 1546 __le16 scd_flow; 1547 __le16 scd_ssn; 1548 u8 txed; /* number of frames sent */ 1549 u8 txed_2_done; /* number of frames acked */ 1550 } __packed; 1551 1552 /* 1553 * REPLY_TX_PWR_TABLE_CMD = 0x97 (command, has simple generic response) 1554 * 1555 */ 1556 1557 /*RS_NEW_API: only TLC_RTS remains and moved to bit 0 */ 1558 #define LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK (1 << 0) 1559 1560 /* # of EDCA prioritized tx fifos */ 1561 #define LINK_QUAL_AC_NUM AC_NUM 1562 1563 /* # entries in rate scale table to support Tx retries */ 1564 #define LINK_QUAL_MAX_RETRY_NUM 16 1565 1566 /* Tx antenna selection values */ 1567 #define LINK_QUAL_ANT_A_MSK (1 << 0) 1568 #define LINK_QUAL_ANT_B_MSK (1 << 1) 1569 #define LINK_QUAL_ANT_MSK (LINK_QUAL_ANT_A_MSK|LINK_QUAL_ANT_B_MSK) 1570 1571 1572 /** 1573 * struct iwl_link_qual_general_params 1574 * 1575 * Used in REPLY_TX_LINK_QUALITY_CMD 1576 */ 1577 struct iwl_link_qual_general_params { 1578 u8 flags; 1579 1580 /* No entries at or above this (driver chosen) index contain MIMO */ 1581 u8 mimo_delimiter; 1582 1583 /* Best single antenna to use for single stream (legacy, SISO). */ 1584 u8 single_stream_ant_msk; /* LINK_QUAL_ANT_* */ 1585 1586 /* Best antennas to use for MIMO (unused for 4965, assumes both). */ 1587 u8 dual_stream_ant_msk; /* LINK_QUAL_ANT_* */ 1588 1589 /* 1590 * If driver needs to use different initial rates for different 1591 * EDCA QOS access categories (as implemented by tx fifos 0-3), 1592 * this table will set that up, by indicating the indexes in the 1593 * rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table at which to start. 1594 * Otherwise, driver should set all entries to 0. 1595 * 1596 * Entry usage: 1597 * 0 = Background, 1 = Best Effort (normal), 2 = Video, 3 = Voice 1598 * TX FIFOs above 3 use same value (typically 0) as TX FIFO 3. 1599 */ 1600 u8 start_rate_index[LINK_QUAL_AC_NUM]; 1601 } __packed; 1602 1603 #define LINK_QUAL_AGG_TIME_LIMIT_DEF (4000) /* 4 milliseconds */ 1604 #define LINK_QUAL_AGG_TIME_LIMIT_MAX (8000) 1605 #define LINK_QUAL_AGG_TIME_LIMIT_MIN (100) 1606 1607 #define LINK_QUAL_AGG_DISABLE_START_DEF (3) 1608 #define LINK_QUAL_AGG_DISABLE_START_MAX (255) 1609 #define LINK_QUAL_AGG_DISABLE_START_MIN (0) 1610 1611 #define LINK_QUAL_AGG_FRAME_LIMIT_DEF (63) 1612 #define LINK_QUAL_AGG_FRAME_LIMIT_MAX (63) 1613 #define LINK_QUAL_AGG_FRAME_LIMIT_MIN (0) 1614 1615 /** 1616 * struct iwl_link_qual_agg_params 1617 * 1618 * Used in REPLY_TX_LINK_QUALITY_CMD 1619 */ 1620 struct iwl_link_qual_agg_params { 1621 1622 /* 1623 *Maximum number of uSec in aggregation. 1624 * default set to 4000 (4 milliseconds) if not configured in .cfg 1625 */ 1626 __le16 agg_time_limit; 1627 1628 /* 1629 * Number of Tx retries allowed for a frame, before that frame will 1630 * no longer be considered for the start of an aggregation sequence 1631 * (scheduler will then try to tx it as single frame). 1632 * Driver should set this to 3. 1633 */ 1634 u8 agg_dis_start_th; 1635 1636 /* 1637 * Maximum number of frames in aggregation. 1638 * 0 = no limit (default). 1 = no aggregation. 1639 * Other values = max # frames in aggregation. 1640 */ 1641 u8 agg_frame_cnt_limit; 1642 1643 __le32 reserved; 1644 } __packed; 1645 1646 /* 1647 * REPLY_TX_LINK_QUALITY_CMD = 0x4e (command, has simple generic response) 1648 * 1649 * For agn devices 1650 * 1651 * Each station in the agn device's internal station table has its own table 1652 * of 16 1653 * Tx rates and modulation modes (e.g. legacy/SISO/MIMO) for retrying Tx when 1654 * an ACK is not received. This command replaces the entire table for 1655 * one station. 1656 * 1657 * NOTE: Station must already be in agn device's station table. 1658 * Use REPLY_ADD_STA. 1659 * 1660 * The rate scaling procedures described below work well. Of course, other 1661 * procedures are possible, and may work better for particular environments. 1662 * 1663 * 1664 * FILLING THE RATE TABLE 1665 * 1666 * Given a particular initial rate and mode, as determined by the rate 1667 * scaling algorithm described below, the Linux driver uses the following 1668 * formula to fill the rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table in the 1669 * Link Quality command: 1670 * 1671 * 1672 * 1) If using High-throughput (HT) (SISO or MIMO) initial rate: 1673 * a) Use this same initial rate for first 3 entries. 1674 * b) Find next lower available rate using same mode (SISO or MIMO), 1675 * use for next 3 entries. If no lower rate available, switch to 1676 * legacy mode (no HT40 channel, no MIMO, no short guard interval). 1677 * c) If using MIMO, set command's mimo_delimiter to number of entries 1678 * using MIMO (3 or 6). 1679 * d) After trying 2 HT rates, switch to legacy mode (no HT40 channel, 1680 * no MIMO, no short guard interval), at the next lower bit rate 1681 * (e.g. if second HT bit rate was 54, try 48 legacy), and follow 1682 * legacy procedure for remaining table entries. 1683 * 1684 * 2) If using legacy initial rate: 1685 * a) Use the initial rate for only one entry. 1686 * b) For each following entry, reduce the rate to next lower available 1687 * rate, until reaching the lowest available rate. 1688 * c) When reducing rate, also switch antenna selection. 1689 * d) Once lowest available rate is reached, repeat this rate until 1690 * rate table is filled (16 entries), switching antenna each entry. 1691 * 1692 * 1693 * ACCUMULATING HISTORY 1694 * 1695 * The rate scaling algorithm for agn devices, as implemented in Linux driver, 1696 * uses two sets of frame Tx success history: One for the current/active 1697 * modulation mode, and one for a speculative/search mode that is being 1698 * attempted. If the speculative mode turns out to be more effective (i.e. 1699 * actual transfer rate is better), then the driver continues to use the 1700 * speculative mode as the new current active mode. 1701 * 1702 * Each history set contains, separately for each possible rate, data for a 1703 * sliding window of the 62 most recent tx attempts at that rate. The data 1704 * includes a shifting bitmap of success(1)/failure(0), and sums of successful 1705 * and attempted frames, from which the driver can additionally calculate a 1706 * success ratio (success / attempted) and number of failures 1707 * (attempted - success), and control the size of the window (attempted). 1708 * The driver uses the bit map to remove successes from the success sum, as 1709 * the oldest tx attempts fall out of the window. 1710 * 1711 * When the agn device makes multiple tx attempts for a given frame, each 1712 * attempt might be at a different rate, and have different modulation 1713 * characteristics (e.g. antenna, fat channel, short guard interval), as set 1714 * up in the rate scaling table in the Link Quality command. The driver must 1715 * determine which rate table entry was used for each tx attempt, to determine 1716 * which rate-specific history to update, and record only those attempts that 1717 * match the modulation characteristics of the history set. 1718 * 1719 * When using block-ack (aggregation), all frames are transmitted at the same 1720 * rate, since there is no per-attempt acknowledgment from the destination 1721 * station. The Tx response struct iwl_tx_resp indicates the Tx rate in 1722 * rate_n_flags field. After receiving a block-ack, the driver can update 1723 * history for the entire block all at once. 1724 * 1725 * 1726 * FINDING BEST STARTING RATE: 1727 * 1728 * When working with a selected initial modulation mode (see below), the 1729 * driver attempts to find a best initial rate. The initial rate is the 1730 * first entry in the Link Quality command's rate table. 1731 * 1732 * 1) Calculate actual throughput (success ratio * expected throughput, see 1733 * table below) for current initial rate. Do this only if enough frames 1734 * have been attempted to make the value meaningful: at least 6 failed 1735 * tx attempts, or at least 8 successes. If not enough, don't try rate 1736 * scaling yet. 1737 * 1738 * 2) Find available rates adjacent to current initial rate. Available means: 1739 * a) supported by hardware && 1740 * b) supported by association && 1741 * c) within any constraints selected by user 1742 * 1743 * 3) Gather measured throughputs for adjacent rates. These might not have 1744 * enough history to calculate a throughput. That's okay, we might try 1745 * using one of them anyway! 1746 * 1747 * 4) Try decreasing rate if, for current rate: 1748 * a) success ratio is < 15% || 1749 * b) lower adjacent rate has better measured throughput || 1750 * c) higher adjacent rate has worse throughput, and lower is unmeasured 1751 * 1752 * As a sanity check, if decrease was determined above, leave rate 1753 * unchanged if: 1754 * a) lower rate unavailable 1755 * b) success ratio at current rate > 85% (very good) 1756 * c) current measured throughput is better than expected throughput 1757 * of lower rate (under perfect 100% tx conditions, see table below) 1758 * 1759 * 5) Try increasing rate if, for current rate: 1760 * a) success ratio is < 15% || 1761 * b) both adjacent rates' throughputs are unmeasured (try it!) || 1762 * b) higher adjacent rate has better measured throughput || 1763 * c) lower adjacent rate has worse throughput, and higher is unmeasured 1764 * 1765 * As a sanity check, if increase was determined above, leave rate 1766 * unchanged if: 1767 * a) success ratio at current rate < 70%. This is not particularly 1768 * good performance; higher rate is sure to have poorer success. 1769 * 1770 * 6) Re-evaluate the rate after each tx frame. If working with block- 1771 * acknowledge, history and statistics may be calculated for the entire 1772 * block (including prior history that fits within the history windows), 1773 * before re-evaluation. 1774 * 1775 * FINDING BEST STARTING MODULATION MODE: 1776 * 1777 * After working with a modulation mode for a "while" (and doing rate scaling), 1778 * the driver searches for a new initial mode in an attempt to improve 1779 * throughput. The "while" is measured by numbers of attempted frames: 1780 * 1781 * For legacy mode, search for new mode after: 1782 * 480 successful frames, or 160 failed frames 1783 * For high-throughput modes (SISO or MIMO), search for new mode after: 1784 * 4500 successful frames, or 400 failed frames 1785 * 1786 * Mode switch possibilities are (3 for each mode): 1787 * 1788 * For legacy: 1789 * Change antenna, try SISO (if HT association), try MIMO (if HT association) 1790 * For SISO: 1791 * Change antenna, try MIMO, try shortened guard interval (SGI) 1792 * For MIMO: 1793 * Try SISO antenna A, SISO antenna B, try shortened guard interval (SGI) 1794 * 1795 * When trying a new mode, use the same bit rate as the old/current mode when 1796 * trying antenna switches and shortened guard interval. When switching to 1797 * SISO from MIMO or legacy, or to MIMO from SISO or legacy, use a rate 1798 * for which the expected throughput (under perfect conditions) is about the 1799 * same or slightly better than the actual measured throughput delivered by 1800 * the old/current mode. 1801 * 1802 * Actual throughput can be estimated by multiplying the expected throughput 1803 * by the success ratio (successful / attempted tx frames). Frame size is 1804 * not considered in this calculation; it assumes that frame size will average 1805 * out to be fairly consistent over several samples. The following are 1806 * metric values for expected throughput assuming 100% success ratio. 1807 * Only G band has support for CCK rates: 1808 * 1809 * RATE: 1 2 5 11 6 9 12 18 24 36 48 54 60 1810 * 1811 * G: 7 13 35 58 40 57 72 98 121 154 177 186 186 1812 * A: 0 0 0 0 40 57 72 98 121 154 177 186 186 1813 * SISO 20MHz: 0 0 0 0 42 42 76 102 124 159 183 193 202 1814 * SGI SISO 20MHz: 0 0 0 0 46 46 82 110 132 168 192 202 211 1815 * MIMO 20MHz: 0 0 0 0 74 74 123 155 179 214 236 244 251 1816 * SGI MIMO 20MHz: 0 0 0 0 81 81 131 164 188 222 243 251 257 1817 * SISO 40MHz: 0 0 0 0 77 77 127 160 184 220 242 250 257 1818 * SGI SISO 40MHz: 0 0 0 0 83 83 135 169 193 229 250 257 264 1819 * MIMO 40MHz: 0 0 0 0 123 123 182 214 235 264 279 285 289 1820 * SGI MIMO 40MHz: 0 0 0 0 131 131 191 222 242 270 284 289 293 1821 * 1822 * After the new mode has been tried for a short while (minimum of 6 failed 1823 * frames or 8 successful frames), compare success ratio and actual throughput 1824 * estimate of the new mode with the old. If either is better with the new 1825 * mode, continue to use the new mode. 1826 * 1827 * Continue comparing modes until all 3 possibilities have been tried. 1828 * If moving from legacy to HT, try all 3 possibilities from the new HT 1829 * mode. After trying all 3, a best mode is found. Continue to use this mode 1830 * for the longer "while" described above (e.g. 480 successful frames for 1831 * legacy), and then repeat the search process. 1832 * 1833 */ 1834 struct iwl_link_quality_cmd { 1835 1836 /* Index of destination/recipient station in uCode's station table */ 1837 u8 sta_id; 1838 u8 reserved1; 1839 __le16 control; /* not used */ 1840 struct iwl_link_qual_general_params general_params; 1841 struct iwl_link_qual_agg_params agg_params; 1842 1843 /* 1844 * Rate info; when using rate-scaling, Tx command's initial_rate_index 1845 * specifies 1st Tx rate attempted, via index into this table. 1846 * agn devices works its way through table when retrying Tx. 1847 */ 1848 struct { 1849 __le32 rate_n_flags; /* RATE_MCS_*, IWL_RATE_* */ 1850 } rs_table[LINK_QUAL_MAX_RETRY_NUM]; 1851 __le32 reserved2; 1852 } __packed; 1853 1854 /* 1855 * BT configuration enable flags: 1856 * bit 0 - 1: BT channel announcement enabled 1857 * 0: disable 1858 * bit 1 - 1: priority of BT device enabled 1859 * 0: disable 1860 * bit 2 - 1: BT 2 wire support enabled 1861 * 0: disable 1862 */ 1863 #define BT_COEX_DISABLE (0x0) 1864 #define BT_ENABLE_CHANNEL_ANNOUNCE BIT(0) 1865 #define BT_ENABLE_PRIORITY BIT(1) 1866 #define BT_ENABLE_2_WIRE BIT(2) 1867 1868 #define BT_COEX_DISABLE (0x0) 1869 #define BT_COEX_ENABLE (BT_ENABLE_CHANNEL_ANNOUNCE | BT_ENABLE_PRIORITY) 1870 1871 #define BT_LEAD_TIME_MIN (0x0) 1872 #define BT_LEAD_TIME_DEF (0x1E) 1873 #define BT_LEAD_TIME_MAX (0xFF) 1874 1875 #define BT_MAX_KILL_MIN (0x1) 1876 #define BT_MAX_KILL_DEF (0x5) 1877 #define BT_MAX_KILL_MAX (0xFF) 1878 1879 #define BT_DURATION_LIMIT_DEF 625 1880 #define BT_DURATION_LIMIT_MAX 1250 1881 #define BT_DURATION_LIMIT_MIN 625 1882 1883 #define BT_ON_THRESHOLD_DEF 4 1884 #define BT_ON_THRESHOLD_MAX 1000 1885 #define BT_ON_THRESHOLD_MIN 1 1886 1887 #define BT_FRAG_THRESHOLD_DEF 0 1888 #define BT_FRAG_THRESHOLD_MAX 0 1889 #define BT_FRAG_THRESHOLD_MIN 0 1890 1891 #define BT_AGG_THRESHOLD_DEF 1200 1892 #define BT_AGG_THRESHOLD_MAX 8000 1893 #define BT_AGG_THRESHOLD_MIN 400 1894 1895 /* 1896 * REPLY_BT_CONFIG = 0x9b (command, has simple generic response) 1897 * 1898 * agn devices support hardware handshake with Bluetooth device on 1899 * same platform. Bluetooth device alerts wireless device when it will Tx; 1900 * wireless device can delay or kill its own Tx to accommodate. 1901 */ 1902 struct iwl_bt_cmd { 1903 u8 flags; 1904 u8 lead_time; 1905 u8 max_kill; 1906 u8 reserved; 1907 __le32 kill_ack_mask; 1908 __le32 kill_cts_mask; 1909 } __packed; 1910 1911 #define IWLAGN_BT_FLAG_CHANNEL_INHIBITION BIT(0) 1912 1913 #define IWLAGN_BT_FLAG_COEX_MODE_MASK (BIT(3)|BIT(4)|BIT(5)) 1914 #define IWLAGN_BT_FLAG_COEX_MODE_SHIFT 3 1915 #define IWLAGN_BT_FLAG_COEX_MODE_DISABLED 0 1916 #define IWLAGN_BT_FLAG_COEX_MODE_LEGACY_2W 1 1917 #define IWLAGN_BT_FLAG_COEX_MODE_3W 2 1918 #define IWLAGN_BT_FLAG_COEX_MODE_4W 3 1919 1920 #define IWLAGN_BT_FLAG_UCODE_DEFAULT BIT(6) 1921 /* Disable Sync PSPoll on SCO/eSCO */ 1922 #define IWLAGN_BT_FLAG_SYNC_2_BT_DISABLE BIT(7) 1923 1924 #define IWLAGN_BT_PSP_MIN_RSSI_THRESHOLD -75 /* dBm */ 1925 #define IWLAGN_BT_PSP_MAX_RSSI_THRESHOLD -65 /* dBm */ 1926 1927 #define IWLAGN_BT_PRIO_BOOST_MAX 0xFF 1928 #define IWLAGN_BT_PRIO_BOOST_MIN 0x00 1929 #define IWLAGN_BT_PRIO_BOOST_DEFAULT 0xF0 1930 1931 #define IWLAGN_BT_MAX_KILL_DEFAULT 5 1932 1933 #define IWLAGN_BT3_T7_DEFAULT 1 1934 1935 #define IWLAGN_BT_KILL_ACK_MASK_DEFAULT cpu_to_le32(0xffff0000) 1936 #define IWLAGN_BT_KILL_CTS_MASK_DEFAULT cpu_to_le32(0xffff0000) 1937 #define IWLAGN_BT_KILL_ACK_CTS_MASK_SCO cpu_to_le32(0xffffffff) 1938 1939 #define IWLAGN_BT3_PRIO_SAMPLE_DEFAULT 2 1940 1941 #define IWLAGN_BT3_T2_DEFAULT 0xc 1942 1943 #define IWLAGN_BT_VALID_ENABLE_FLAGS cpu_to_le16(BIT(0)) 1944 #define IWLAGN_BT_VALID_BOOST cpu_to_le16(BIT(1)) 1945 #define IWLAGN_BT_VALID_MAX_KILL cpu_to_le16(BIT(2)) 1946 #define IWLAGN_BT_VALID_3W_TIMERS cpu_to_le16(BIT(3)) 1947 #define IWLAGN_BT_VALID_KILL_ACK_MASK cpu_to_le16(BIT(4)) 1948 #define IWLAGN_BT_VALID_KILL_CTS_MASK cpu_to_le16(BIT(5)) 1949 #define IWLAGN_BT_VALID_BT4_TIMES cpu_to_le16(BIT(6)) 1950 #define IWLAGN_BT_VALID_3W_LUT cpu_to_le16(BIT(7)) 1951 1952 #define IWLAGN_BT_ALL_VALID_MSK (IWLAGN_BT_VALID_ENABLE_FLAGS | \ 1953 IWLAGN_BT_VALID_BOOST | \ 1954 IWLAGN_BT_VALID_MAX_KILL | \ 1955 IWLAGN_BT_VALID_3W_TIMERS | \ 1956 IWLAGN_BT_VALID_KILL_ACK_MASK | \ 1957 IWLAGN_BT_VALID_KILL_CTS_MASK | \ 1958 IWLAGN_BT_VALID_BT4_TIMES | \ 1959 IWLAGN_BT_VALID_3W_LUT) 1960 1961 struct iwl_basic_bt_cmd { 1962 u8 flags; 1963 u8 ledtime; /* unused */ 1964 u8 max_kill; 1965 u8 bt3_timer_t7_value; 1966 __le32 kill_ack_mask; 1967 __le32 kill_cts_mask; 1968 u8 bt3_prio_sample_time; 1969 u8 bt3_timer_t2_value; 1970 __le16 bt4_reaction_time; /* unused */ 1971 __le32 bt3_lookup_table[12]; 1972 __le16 bt4_decision_time; /* unused */ 1973 __le16 valid; 1974 }; 1975 1976 struct iwl6000_bt_cmd { 1977 struct iwl_basic_bt_cmd basic; 1978 u8 prio_boost; 1979 /* 1980 * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask 1981 * if configure the following patterns 1982 */ 1983 u8 tx_prio_boost; /* SW boost of WiFi tx priority */ 1984 __le16 rx_prio_boost; /* SW boost of WiFi rx priority */ 1985 }; 1986 1987 struct iwl2000_bt_cmd { 1988 struct iwl_basic_bt_cmd basic; 1989 __le32 prio_boost; 1990 /* 1991 * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask 1992 * if configure the following patterns 1993 */ 1994 u8 reserved; 1995 u8 tx_prio_boost; /* SW boost of WiFi tx priority */ 1996 __le16 rx_prio_boost; /* SW boost of WiFi rx priority */ 1997 }; 1998 1999 #define IWLAGN_BT_SCO_ACTIVE cpu_to_le32(BIT(0)) 2000 2001 struct iwlagn_bt_sco_cmd { 2002 __le32 flags; 2003 }; 2004 2005 /****************************************************************************** 2006 * (6) 2007 * Spectrum Management (802.11h) Commands, Responses, Notifications: 2008 * 2009 *****************************************************************************/ 2010 2011 /* 2012 * Spectrum Management 2013 */ 2014 #define MEASUREMENT_FILTER_FLAG (RXON_FILTER_PROMISC_MSK | \ 2015 RXON_FILTER_CTL2HOST_MSK | \ 2016 RXON_FILTER_ACCEPT_GRP_MSK | \ 2017 RXON_FILTER_DIS_DECRYPT_MSK | \ 2018 RXON_FILTER_DIS_GRP_DECRYPT_MSK | \ 2019 RXON_FILTER_ASSOC_MSK | \ 2020 RXON_FILTER_BCON_AWARE_MSK) 2021 2022 struct iwl_measure_channel { 2023 __le32 duration; /* measurement duration in extended beacon 2024 * format */ 2025 u8 channel; /* channel to measure */ 2026 u8 type; /* see enum iwl_measure_type */ 2027 __le16 reserved; 2028 } __packed; 2029 2030 /* 2031 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (command) 2032 */ 2033 struct iwl_spectrum_cmd { 2034 __le16 len; /* number of bytes starting from token */ 2035 u8 token; /* token id */ 2036 u8 id; /* measurement id -- 0 or 1 */ 2037 u8 origin; /* 0 = TGh, 1 = other, 2 = TGk */ 2038 u8 periodic; /* 1 = periodic */ 2039 __le16 path_loss_timeout; 2040 __le32 start_time; /* start time in extended beacon format */ 2041 __le32 reserved2; 2042 __le32 flags; /* rxon flags */ 2043 __le32 filter_flags; /* rxon filter flags */ 2044 __le16 channel_count; /* minimum 1, maximum 10 */ 2045 __le16 reserved3; 2046 struct iwl_measure_channel channels[10]; 2047 } __packed; 2048 2049 /* 2050 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (response) 2051 */ 2052 struct iwl_spectrum_resp { 2053 u8 token; 2054 u8 id; /* id of the prior command replaced, or 0xff */ 2055 __le16 status; /* 0 - command will be handled 2056 * 1 - cannot handle (conflicts with another 2057 * measurement) */ 2058 } __packed; 2059 2060 enum iwl_measurement_state { 2061 IWL_MEASUREMENT_START = 0, 2062 IWL_MEASUREMENT_STOP = 1, 2063 }; 2064 2065 enum iwl_measurement_status { 2066 IWL_MEASUREMENT_OK = 0, 2067 IWL_MEASUREMENT_CONCURRENT = 1, 2068 IWL_MEASUREMENT_CSA_CONFLICT = 2, 2069 IWL_MEASUREMENT_TGH_CONFLICT = 3, 2070 /* 4-5 reserved */ 2071 IWL_MEASUREMENT_STOPPED = 6, 2072 IWL_MEASUREMENT_TIMEOUT = 7, 2073 IWL_MEASUREMENT_PERIODIC_FAILED = 8, 2074 }; 2075 2076 #define NUM_ELEMENTS_IN_HISTOGRAM 8 2077 2078 struct iwl_measurement_histogram { 2079 __le32 ofdm[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 0.8usec counts */ 2080 __le32 cck[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 1usec counts */ 2081 } __packed; 2082 2083 /* clear channel availability counters */ 2084 struct iwl_measurement_cca_counters { 2085 __le32 ofdm; 2086 __le32 cck; 2087 } __packed; 2088 2089 enum iwl_measure_type { 2090 IWL_MEASURE_BASIC = (1 << 0), 2091 IWL_MEASURE_CHANNEL_LOAD = (1 << 1), 2092 IWL_MEASURE_HISTOGRAM_RPI = (1 << 2), 2093 IWL_MEASURE_HISTOGRAM_NOISE = (1 << 3), 2094 IWL_MEASURE_FRAME = (1 << 4), 2095 /* bits 5:6 are reserved */ 2096 IWL_MEASURE_IDLE = (1 << 7), 2097 }; 2098 2099 /* 2100 * SPECTRUM_MEASURE_NOTIFICATION = 0x75 (notification only, not a command) 2101 */ 2102 struct iwl_spectrum_notification { 2103 u8 id; /* measurement id -- 0 or 1 */ 2104 u8 token; 2105 u8 channel_index; /* index in measurement channel list */ 2106 u8 state; /* 0 - start, 1 - stop */ 2107 __le32 start_time; /* lower 32-bits of TSF */ 2108 u8 band; /* 0 - 5.2GHz, 1 - 2.4GHz */ 2109 u8 channel; 2110 u8 type; /* see enum iwl_measurement_type */ 2111 u8 reserved1; 2112 /* NOTE: cca_ofdm, cca_cck, basic_type, and histogram are only only 2113 * valid if applicable for measurement type requested. */ 2114 __le32 cca_ofdm; /* cca fraction time in 40Mhz clock periods */ 2115 __le32 cca_cck; /* cca fraction time in 44Mhz clock periods */ 2116 __le32 cca_time; /* channel load time in usecs */ 2117 u8 basic_type; /* 0 - bss, 1 - ofdm preamble, 2 - 2118 * unidentified */ 2119 u8 reserved2[3]; 2120 struct iwl_measurement_histogram histogram; 2121 __le32 stop_time; /* lower 32-bits of TSF */ 2122 __le32 status; /* see iwl_measurement_status */ 2123 } __packed; 2124 2125 /****************************************************************************** 2126 * (7) 2127 * Power Management Commands, Responses, Notifications: 2128 * 2129 *****************************************************************************/ 2130 2131 /** 2132 * struct iwl_powertable_cmd - Power Table Command 2133 * @flags: See below: 2134 * 2135 * POWER_TABLE_CMD = 0x77 (command, has simple generic response) 2136 * 2137 * PM allow: 2138 * bit 0 - '0' Driver not allow power management 2139 * '1' Driver allow PM (use rest of parameters) 2140 * 2141 * uCode send sleep notifications: 2142 * bit 1 - '0' Don't send sleep notification 2143 * '1' send sleep notification (SEND_PM_NOTIFICATION) 2144 * 2145 * Sleep over DTIM 2146 * bit 2 - '0' PM have to walk up every DTIM 2147 * '1' PM could sleep over DTIM till listen Interval. 2148 * 2149 * PCI power managed 2150 * bit 3 - '0' (PCI_CFG_LINK_CTRL & 0x1) 2151 * '1' !(PCI_CFG_LINK_CTRL & 0x1) 2152 * 2153 * Fast PD 2154 * bit 4 - '1' Put radio to sleep when receiving frame for others 2155 * 2156 * Force sleep Modes 2157 * bit 31/30- '00' use both mac/xtal sleeps 2158 * '01' force Mac sleep 2159 * '10' force xtal sleep 2160 * '11' Illegal set 2161 * 2162 * NOTE: if sleep_interval[SLEEP_INTRVL_TABLE_SIZE-1] > DTIM period then 2163 * ucode assume sleep over DTIM is allowed and we don't need to wake up 2164 * for every DTIM. 2165 */ 2166 #define IWL_POWER_VEC_SIZE 5 2167 2168 #define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK cpu_to_le16(BIT(0)) 2169 #define IWL_POWER_POWER_SAVE_ENA_MSK cpu_to_le16(BIT(0)) 2170 #define IWL_POWER_POWER_MANAGEMENT_ENA_MSK cpu_to_le16(BIT(1)) 2171 #define IWL_POWER_SLEEP_OVER_DTIM_MSK cpu_to_le16(BIT(2)) 2172 #define IWL_POWER_PCI_PM_MSK cpu_to_le16(BIT(3)) 2173 #define IWL_POWER_FAST_PD cpu_to_le16(BIT(4)) 2174 #define IWL_POWER_BEACON_FILTERING cpu_to_le16(BIT(5)) 2175 #define IWL_POWER_SHADOW_REG_ENA cpu_to_le16(BIT(6)) 2176 #define IWL_POWER_CT_KILL_SET cpu_to_le16(BIT(7)) 2177 #define IWL_POWER_BT_SCO_ENA cpu_to_le16(BIT(8)) 2178 #define IWL_POWER_ADVANCE_PM_ENA_MSK cpu_to_le16(BIT(9)) 2179 2180 struct iwl_powertable_cmd { 2181 __le16 flags; 2182 u8 keep_alive_seconds; 2183 u8 debug_flags; 2184 __le32 rx_data_timeout; 2185 __le32 tx_data_timeout; 2186 __le32 sleep_interval[IWL_POWER_VEC_SIZE]; 2187 __le32 keep_alive_beacons; 2188 } __packed; 2189 2190 /* 2191 * PM_SLEEP_NOTIFICATION = 0x7A (notification only, not a command) 2192 * all devices identical. 2193 */ 2194 struct iwl_sleep_notification { 2195 u8 pm_sleep_mode; 2196 u8 pm_wakeup_src; 2197 __le16 reserved; 2198 __le32 sleep_time; 2199 __le32 tsf_low; 2200 __le32 bcon_timer; 2201 } __packed; 2202 2203 /* Sleep states. all devices identical. */ 2204 enum { 2205 IWL_PM_NO_SLEEP = 0, 2206 IWL_PM_SLP_MAC = 1, 2207 IWL_PM_SLP_FULL_MAC_UNASSOCIATE = 2, 2208 IWL_PM_SLP_FULL_MAC_CARD_STATE = 3, 2209 IWL_PM_SLP_PHY = 4, 2210 IWL_PM_SLP_REPENT = 5, 2211 IWL_PM_WAKEUP_BY_TIMER = 6, 2212 IWL_PM_WAKEUP_BY_DRIVER = 7, 2213 IWL_PM_WAKEUP_BY_RFKILL = 8, 2214 /* 3 reserved */ 2215 IWL_PM_NUM_OF_MODES = 12, 2216 }; 2217 2218 /* 2219 * REPLY_CARD_STATE_CMD = 0xa0 (command, has simple generic response) 2220 */ 2221 #define CARD_STATE_CMD_DISABLE 0x00 /* Put card to sleep */ 2222 #define CARD_STATE_CMD_ENABLE 0x01 /* Wake up card */ 2223 #define CARD_STATE_CMD_HALT 0x02 /* Power down permanently */ 2224 struct iwl_card_state_cmd { 2225 __le32 status; /* CARD_STATE_CMD_* request new power state */ 2226 } __packed; 2227 2228 /* 2229 * CARD_STATE_NOTIFICATION = 0xa1 (notification only, not a command) 2230 */ 2231 struct iwl_card_state_notif { 2232 __le32 flags; 2233 } __packed; 2234 2235 #define HW_CARD_DISABLED 0x01 2236 #define SW_CARD_DISABLED 0x02 2237 #define CT_CARD_DISABLED 0x04 2238 #define RXON_CARD_DISABLED 0x10 2239 2240 struct iwl_ct_kill_config { 2241 __le32 reserved; 2242 __le32 critical_temperature_M; 2243 __le32 critical_temperature_R; 2244 } __packed; 2245 2246 /* 1000, and 6x00 */ 2247 struct iwl_ct_kill_throttling_config { 2248 __le32 critical_temperature_exit; 2249 __le32 reserved; 2250 __le32 critical_temperature_enter; 2251 } __packed; 2252 2253 /****************************************************************************** 2254 * (8) 2255 * Scan Commands, Responses, Notifications: 2256 * 2257 *****************************************************************************/ 2258 2259 #define SCAN_CHANNEL_TYPE_PASSIVE cpu_to_le32(0) 2260 #define SCAN_CHANNEL_TYPE_ACTIVE cpu_to_le32(1) 2261 2262 /** 2263 * struct iwl_scan_channel - entry in REPLY_SCAN_CMD channel table 2264 * 2265 * One for each channel in the scan list. 2266 * Each channel can independently select: 2267 * 1) SSID for directed active scans 2268 * 2) Txpower setting (for rate specified within Tx command) 2269 * 3) How long to stay on-channel (behavior may be modified by quiet_time, 2270 * quiet_plcp_th, good_CRC_th) 2271 * 2272 * To avoid uCode errors, make sure the following are true (see comments 2273 * under struct iwl_scan_cmd about max_out_time and quiet_time): 2274 * 1) If using passive_dwell (i.e. passive_dwell != 0): 2275 * active_dwell <= passive_dwell (< max_out_time if max_out_time != 0) 2276 * 2) quiet_time <= active_dwell 2277 * 3) If restricting off-channel time (i.e. max_out_time !=0): 2278 * passive_dwell < max_out_time 2279 * active_dwell < max_out_time 2280 */ 2281 2282 struct iwl_scan_channel { 2283 /* 2284 * type is defined as: 2285 * 0:0 1 = active, 0 = passive 2286 * 1:20 SSID direct bit map; if a bit is set, then corresponding 2287 * SSID IE is transmitted in probe request. 2288 * 21:31 reserved 2289 */ 2290 __le32 type; 2291 __le16 channel; /* band is selected by iwl_scan_cmd "flags" field */ 2292 u8 tx_gain; /* gain for analog radio */ 2293 u8 dsp_atten; /* gain for DSP */ 2294 __le16 active_dwell; /* in 1024-uSec TU (time units), typ 5-50 */ 2295 __le16 passive_dwell; /* in 1024-uSec TU (time units), typ 20-500 */ 2296 } __packed; 2297 2298 /* set number of direct probes __le32 type */ 2299 #define IWL_SCAN_PROBE_MASK(n) cpu_to_le32((BIT(n) | (BIT(n) - BIT(1)))) 2300 2301 /** 2302 * struct iwl_ssid_ie - directed scan network information element 2303 * 2304 * Up to 20 of these may appear in REPLY_SCAN_CMD, 2305 * selected by "type" bit field in struct iwl_scan_channel; 2306 * each channel may select different ssids from among the 20 entries. 2307 * SSID IEs get transmitted in reverse order of entry. 2308 */ 2309 struct iwl_ssid_ie { 2310 u8 id; 2311 u8 len; 2312 u8 ssid[32]; 2313 } __packed; 2314 2315 #define PROBE_OPTION_MAX 20 2316 #define TX_CMD_LIFE_TIME_INFINITE cpu_to_le32(0xFFFFFFFF) 2317 #define IWL_GOOD_CRC_TH_DISABLED 0 2318 #define IWL_GOOD_CRC_TH_DEFAULT cpu_to_le16(1) 2319 #define IWL_GOOD_CRC_TH_NEVER cpu_to_le16(0xffff) 2320 #define IWL_MAX_SCAN_SIZE 1024 2321 #define IWL_MAX_CMD_SIZE 4096 2322 2323 /* 2324 * REPLY_SCAN_CMD = 0x80 (command) 2325 * 2326 * The hardware scan command is very powerful; the driver can set it up to 2327 * maintain (relatively) normal network traffic while doing a scan in the 2328 * background. The max_out_time and suspend_time control the ratio of how 2329 * long the device stays on an associated network channel ("service channel") 2330 * vs. how long it's away from the service channel, i.e. tuned to other channels 2331 * for scanning. 2332 * 2333 * max_out_time is the max time off-channel (in usec), and suspend_time 2334 * is how long (in "extended beacon" format) that the scan is "suspended" 2335 * after returning to the service channel. That is, suspend_time is the 2336 * time that we stay on the service channel, doing normal work, between 2337 * scan segments. The driver may set these parameters differently to support 2338 * scanning when associated vs. not associated, and light vs. heavy traffic 2339 * loads when associated. 2340 * 2341 * After receiving this command, the device's scan engine does the following; 2342 * 2343 * 1) Sends SCAN_START notification to driver 2344 * 2) Checks to see if it has time to do scan for one channel 2345 * 3) Sends NULL packet, with power-save (PS) bit set to 1, 2346 * to tell AP that we're going off-channel 2347 * 4) Tunes to first channel in scan list, does active or passive scan 2348 * 5) Sends SCAN_RESULT notification to driver 2349 * 6) Checks to see if it has time to do scan on *next* channel in list 2350 * 7) Repeats 4-6 until it no longer has time to scan the next channel 2351 * before max_out_time expires 2352 * 8) Returns to service channel 2353 * 9) Sends NULL packet with PS=0 to tell AP that we're back 2354 * 10) Stays on service channel until suspend_time expires 2355 * 11) Repeats entire process 2-10 until list is complete 2356 * 12) Sends SCAN_COMPLETE notification 2357 * 2358 * For fast, efficient scans, the scan command also has support for staying on 2359 * a channel for just a short time, if doing active scanning and getting no 2360 * responses to the transmitted probe request. This time is controlled by 2361 * quiet_time, and the number of received packets below which a channel is 2362 * considered "quiet" is controlled by quiet_plcp_threshold. 2363 * 2364 * For active scanning on channels that have regulatory restrictions against 2365 * blindly transmitting, the scan can listen before transmitting, to make sure 2366 * that there is already legitimate activity on the channel. If enough 2367 * packets are cleanly received on the channel (controlled by good_CRC_th, 2368 * typical value 1), the scan engine starts transmitting probe requests. 2369 * 2370 * Driver must use separate scan commands for 2.4 vs. 5 GHz bands. 2371 * 2372 * To avoid uCode errors, see timing restrictions described under 2373 * struct iwl_scan_channel. 2374 */ 2375 2376 enum iwl_scan_flags { 2377 /* BIT(0) currently unused */ 2378 IWL_SCAN_FLAGS_ACTION_FRAME_TX = BIT(1), 2379 /* bits 2-7 reserved */ 2380 }; 2381 2382 struct iwl_scan_cmd { 2383 __le16 len; 2384 u8 scan_flags; /* scan flags: see enum iwl_scan_flags */ 2385 u8 channel_count; /* # channels in channel list */ 2386 __le16 quiet_time; /* dwell only this # millisecs on quiet channel 2387 * (only for active scan) */ 2388 __le16 quiet_plcp_th; /* quiet chnl is < this # pkts (typ. 1) */ 2389 __le16 good_CRC_th; /* passive -> active promotion threshold */ 2390 __le16 rx_chain; /* RXON_RX_CHAIN_* */ 2391 __le32 max_out_time; /* max usec to be away from associated (service) 2392 * channel */ 2393 __le32 suspend_time; /* pause scan this long (in "extended beacon 2394 * format") when returning to service chnl: 2395 */ 2396 __le32 flags; /* RXON_FLG_* */ 2397 __le32 filter_flags; /* RXON_FILTER_* */ 2398 2399 /* For active scans (set to all-0s for passive scans). 2400 * Does not include payload. Must specify Tx rate; no rate scaling. */ 2401 struct iwl_tx_cmd tx_cmd; 2402 2403 /* For directed active scans (set to all-0s otherwise) */ 2404 struct iwl_ssid_ie direct_scan[PROBE_OPTION_MAX]; 2405 2406 /* 2407 * Probe request frame, followed by channel list. 2408 * 2409 * Size of probe request frame is specified by byte count in tx_cmd. 2410 * Channel list follows immediately after probe request frame. 2411 * Number of channels in list is specified by channel_count. 2412 * Each channel in list is of type: 2413 * 2414 * struct iwl_scan_channel channels[0]; 2415 * 2416 * NOTE: Only one band of channels can be scanned per pass. You 2417 * must not mix 2.4GHz channels and 5.2GHz channels, and you must wait 2418 * for one scan to complete (i.e. receive SCAN_COMPLETE_NOTIFICATION) 2419 * before requesting another scan. 2420 */ 2421 u8 data[0]; 2422 } __packed; 2423 2424 /* Can abort will notify by complete notification with abort status. */ 2425 #define CAN_ABORT_STATUS cpu_to_le32(0x1) 2426 /* complete notification statuses */ 2427 #define ABORT_STATUS 0x2 2428 2429 /* 2430 * REPLY_SCAN_CMD = 0x80 (response) 2431 */ 2432 struct iwl_scanreq_notification { 2433 __le32 status; /* 1: okay, 2: cannot fulfill request */ 2434 } __packed; 2435 2436 /* 2437 * SCAN_START_NOTIFICATION = 0x82 (notification only, not a command) 2438 */ 2439 struct iwl_scanstart_notification { 2440 __le32 tsf_low; 2441 __le32 tsf_high; 2442 __le32 beacon_timer; 2443 u8 channel; 2444 u8 band; 2445 u8 reserved[2]; 2446 __le32 status; 2447 } __packed; 2448 2449 #define SCAN_OWNER_STATUS 0x1 2450 #define MEASURE_OWNER_STATUS 0x2 2451 2452 #define IWL_PROBE_STATUS_OK 0 2453 #define IWL_PROBE_STATUS_TX_FAILED BIT(0) 2454 /* error statuses combined with TX_FAILED */ 2455 #define IWL_PROBE_STATUS_FAIL_TTL BIT(1) 2456 #define IWL_PROBE_STATUS_FAIL_BT BIT(2) 2457 2458 #define NUMBER_OF_STATISTICS 1 /* first __le32 is good CRC */ 2459 /* 2460 * SCAN_RESULTS_NOTIFICATION = 0x83 (notification only, not a command) 2461 */ 2462 struct iwl_scanresults_notification { 2463 u8 channel; 2464 u8 band; 2465 u8 probe_status; 2466 u8 num_probe_not_sent; /* not enough time to send */ 2467 __le32 tsf_low; 2468 __le32 tsf_high; 2469 __le32 statistics[NUMBER_OF_STATISTICS]; 2470 } __packed; 2471 2472 /* 2473 * SCAN_COMPLETE_NOTIFICATION = 0x84 (notification only, not a command) 2474 */ 2475 struct iwl_scancomplete_notification { 2476 u8 scanned_channels; 2477 u8 status; 2478 u8 bt_status; /* BT On/Off status */ 2479 u8 last_channel; 2480 __le32 tsf_low; 2481 __le32 tsf_high; 2482 } __packed; 2483 2484 2485 /****************************************************************************** 2486 * (9) 2487 * IBSS/AP Commands and Notifications: 2488 * 2489 *****************************************************************************/ 2490 2491 enum iwl_ibss_manager { 2492 IWL_NOT_IBSS_MANAGER = 0, 2493 IWL_IBSS_MANAGER = 1, 2494 }; 2495 2496 /* 2497 * BEACON_NOTIFICATION = 0x90 (notification only, not a command) 2498 */ 2499 2500 struct iwlagn_beacon_notif { 2501 struct iwlagn_tx_resp beacon_notify_hdr; 2502 __le32 low_tsf; 2503 __le32 high_tsf; 2504 __le32 ibss_mgr_status; 2505 } __packed; 2506 2507 /* 2508 * REPLY_TX_BEACON = 0x91 (command, has simple generic response) 2509 */ 2510 2511 struct iwl_tx_beacon_cmd { 2512 struct iwl_tx_cmd tx; 2513 __le16 tim_idx; 2514 u8 tim_size; 2515 u8 reserved1; 2516 struct ieee80211_hdr frame[0]; /* beacon frame */ 2517 } __packed; 2518 2519 /****************************************************************************** 2520 * (10) 2521 * Statistics Commands and Notifications: 2522 * 2523 *****************************************************************************/ 2524 2525 #define IWL_TEMP_CONVERT 260 2526 2527 #define SUP_RATE_11A_MAX_NUM_CHANNELS 8 2528 #define SUP_RATE_11B_MAX_NUM_CHANNELS 4 2529 #define SUP_RATE_11G_MAX_NUM_CHANNELS 12 2530 2531 /* Used for passing to driver number of successes and failures per rate */ 2532 struct rate_histogram { 2533 union { 2534 __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS]; 2535 __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS]; 2536 __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS]; 2537 } success; 2538 union { 2539 __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS]; 2540 __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS]; 2541 __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS]; 2542 } failed; 2543 } __packed; 2544 2545 /* statistics command response */ 2546 2547 struct statistics_dbg { 2548 __le32 burst_check; 2549 __le32 burst_count; 2550 __le32 wait_for_silence_timeout_cnt; 2551 __le32 reserved[3]; 2552 } __packed; 2553 2554 struct statistics_rx_phy { 2555 __le32 ina_cnt; 2556 __le32 fina_cnt; 2557 __le32 plcp_err; 2558 __le32 crc32_err; 2559 __le32 overrun_err; 2560 __le32 early_overrun_err; 2561 __le32 crc32_good; 2562 __le32 false_alarm_cnt; 2563 __le32 fina_sync_err_cnt; 2564 __le32 sfd_timeout; 2565 __le32 fina_timeout; 2566 __le32 unresponded_rts; 2567 __le32 rxe_frame_limit_overrun; 2568 __le32 sent_ack_cnt; 2569 __le32 sent_cts_cnt; 2570 __le32 sent_ba_rsp_cnt; 2571 __le32 dsp_self_kill; 2572 __le32 mh_format_err; 2573 __le32 re_acq_main_rssi_sum; 2574 __le32 reserved3; 2575 } __packed; 2576 2577 struct statistics_rx_ht_phy { 2578 __le32 plcp_err; 2579 __le32 overrun_err; 2580 __le32 early_overrun_err; 2581 __le32 crc32_good; 2582 __le32 crc32_err; 2583 __le32 mh_format_err; 2584 __le32 agg_crc32_good; 2585 __le32 agg_mpdu_cnt; 2586 __le32 agg_cnt; 2587 __le32 unsupport_mcs; 2588 } __packed; 2589 2590 #define INTERFERENCE_DATA_AVAILABLE cpu_to_le32(1) 2591 2592 struct statistics_rx_non_phy { 2593 __le32 bogus_cts; /* CTS received when not expecting CTS */ 2594 __le32 bogus_ack; /* ACK received when not expecting ACK */ 2595 __le32 non_bssid_frames; /* number of frames with BSSID that 2596 * doesn't belong to the STA BSSID */ 2597 __le32 filtered_frames; /* count frames that were dumped in the 2598 * filtering process */ 2599 __le32 non_channel_beacons; /* beacons with our bss id but not on 2600 * our serving channel */ 2601 __le32 channel_beacons; /* beacons with our bss id and in our 2602 * serving channel */ 2603 __le32 num_missed_bcon; /* number of missed beacons */ 2604 __le32 adc_rx_saturation_time; /* count in 0.8us units the time the 2605 * ADC was in saturation */ 2606 __le32 ina_detection_search_time;/* total time (in 0.8us) searched 2607 * for INA */ 2608 __le32 beacon_silence_rssi_a; /* RSSI silence after beacon frame */ 2609 __le32 beacon_silence_rssi_b; /* RSSI silence after beacon frame */ 2610 __le32 beacon_silence_rssi_c; /* RSSI silence after beacon frame */ 2611 __le32 interference_data_flag; /* flag for interference data 2612 * availability. 1 when data is 2613 * available. */ 2614 __le32 channel_load; /* counts RX Enable time in uSec */ 2615 __le32 dsp_false_alarms; /* DSP false alarm (both OFDM 2616 * and CCK) counter */ 2617 __le32 beacon_rssi_a; 2618 __le32 beacon_rssi_b; 2619 __le32 beacon_rssi_c; 2620 __le32 beacon_energy_a; 2621 __le32 beacon_energy_b; 2622 __le32 beacon_energy_c; 2623 } __packed; 2624 2625 struct statistics_rx_non_phy_bt { 2626 struct statistics_rx_non_phy common; 2627 /* additional stats for bt */ 2628 __le32 num_bt_kills; 2629 __le32 reserved[2]; 2630 } __packed; 2631 2632 struct statistics_rx { 2633 struct statistics_rx_phy ofdm; 2634 struct statistics_rx_phy cck; 2635 struct statistics_rx_non_phy general; 2636 struct statistics_rx_ht_phy ofdm_ht; 2637 } __packed; 2638 2639 struct statistics_rx_bt { 2640 struct statistics_rx_phy ofdm; 2641 struct statistics_rx_phy cck; 2642 struct statistics_rx_non_phy_bt general; 2643 struct statistics_rx_ht_phy ofdm_ht; 2644 } __packed; 2645 2646 /** 2647 * struct statistics_tx_power - current tx power 2648 * 2649 * @ant_a: current tx power on chain a in 1/2 dB step 2650 * @ant_b: current tx power on chain b in 1/2 dB step 2651 * @ant_c: current tx power on chain c in 1/2 dB step 2652 */ 2653 struct statistics_tx_power { 2654 u8 ant_a; 2655 u8 ant_b; 2656 u8 ant_c; 2657 u8 reserved; 2658 } __packed; 2659 2660 struct statistics_tx_non_phy_agg { 2661 __le32 ba_timeout; 2662 __le32 ba_reschedule_frames; 2663 __le32 scd_query_agg_frame_cnt; 2664 __le32 scd_query_no_agg; 2665 __le32 scd_query_agg; 2666 __le32 scd_query_mismatch; 2667 __le32 frame_not_ready; 2668 __le32 underrun; 2669 __le32 bt_prio_kill; 2670 __le32 rx_ba_rsp_cnt; 2671 } __packed; 2672 2673 struct statistics_tx { 2674 __le32 preamble_cnt; 2675 __le32 rx_detected_cnt; 2676 __le32 bt_prio_defer_cnt; 2677 __le32 bt_prio_kill_cnt; 2678 __le32 few_bytes_cnt; 2679 __le32 cts_timeout; 2680 __le32 ack_timeout; 2681 __le32 expected_ack_cnt; 2682 __le32 actual_ack_cnt; 2683 __le32 dump_msdu_cnt; 2684 __le32 burst_abort_next_frame_mismatch_cnt; 2685 __le32 burst_abort_missing_next_frame_cnt; 2686 __le32 cts_timeout_collision; 2687 __le32 ack_or_ba_timeout_collision; 2688 struct statistics_tx_non_phy_agg agg; 2689 /* 2690 * "tx_power" are optional parameters provided by uCode, 2691 * 6000 series is the only device provide the information, 2692 * Those are reserved fields for all the other devices 2693 */ 2694 struct statistics_tx_power tx_power; 2695 __le32 reserved1; 2696 } __packed; 2697 2698 2699 struct statistics_div { 2700 __le32 tx_on_a; 2701 __le32 tx_on_b; 2702 __le32 exec_time; 2703 __le32 probe_time; 2704 __le32 reserved1; 2705 __le32 reserved2; 2706 } __packed; 2707 2708 struct statistics_general_common { 2709 __le32 temperature; /* radio temperature */ 2710 __le32 temperature_m; /* radio voltage */ 2711 struct statistics_dbg dbg; 2712 __le32 sleep_time; 2713 __le32 slots_out; 2714 __le32 slots_idle; 2715 __le32 ttl_timestamp; 2716 struct statistics_div div; 2717 __le32 rx_enable_counter; 2718 /* 2719 * num_of_sos_states: 2720 * count the number of times we have to re-tune 2721 * in order to get out of bad PHY status 2722 */ 2723 __le32 num_of_sos_states; 2724 } __packed; 2725 2726 struct statistics_bt_activity { 2727 /* Tx statistics */ 2728 __le32 hi_priority_tx_req_cnt; 2729 __le32 hi_priority_tx_denied_cnt; 2730 __le32 lo_priority_tx_req_cnt; 2731 __le32 lo_priority_tx_denied_cnt; 2732 /* Rx statistics */ 2733 __le32 hi_priority_rx_req_cnt; 2734 __le32 hi_priority_rx_denied_cnt; 2735 __le32 lo_priority_rx_req_cnt; 2736 __le32 lo_priority_rx_denied_cnt; 2737 } __packed; 2738 2739 struct statistics_general { 2740 struct statistics_general_common common; 2741 __le32 reserved2; 2742 __le32 reserved3; 2743 } __packed; 2744 2745 struct statistics_general_bt { 2746 struct statistics_general_common common; 2747 struct statistics_bt_activity activity; 2748 __le32 reserved2; 2749 __le32 reserved3; 2750 } __packed; 2751 2752 #define UCODE_STATISTICS_CLEAR_MSK (0x1 << 0) 2753 #define UCODE_STATISTICS_FREQUENCY_MSK (0x1 << 1) 2754 #define UCODE_STATISTICS_NARROW_BAND_MSK (0x1 << 2) 2755 2756 /* 2757 * REPLY_STATISTICS_CMD = 0x9c, 2758 * all devices identical. 2759 * 2760 * This command triggers an immediate response containing uCode statistics. 2761 * The response is in the same format as STATISTICS_NOTIFICATION 0x9d, below. 2762 * 2763 * If the CLEAR_STATS configuration flag is set, uCode will clear its 2764 * internal copy of the statistics (counters) after issuing the response. 2765 * This flag does not affect STATISTICS_NOTIFICATIONs after beacons (see below). 2766 * 2767 * If the DISABLE_NOTIF configuration flag is set, uCode will not issue 2768 * STATISTICS_NOTIFICATIONs after received beacons (see below). This flag 2769 * does not affect the response to the REPLY_STATISTICS_CMD 0x9c itself. 2770 */ 2771 #define IWL_STATS_CONF_CLEAR_STATS cpu_to_le32(0x1) /* see above */ 2772 #define IWL_STATS_CONF_DISABLE_NOTIF cpu_to_le32(0x2)/* see above */ 2773 struct iwl_statistics_cmd { 2774 __le32 configuration_flags; /* IWL_STATS_CONF_* */ 2775 } __packed; 2776 2777 /* 2778 * STATISTICS_NOTIFICATION = 0x9d (notification only, not a command) 2779 * 2780 * By default, uCode issues this notification after receiving a beacon 2781 * while associated. To disable this behavior, set DISABLE_NOTIF flag in the 2782 * REPLY_STATISTICS_CMD 0x9c, above. 2783 * 2784 * Statistics counters continue to increment beacon after beacon, but are 2785 * cleared when changing channels or when driver issues REPLY_STATISTICS_CMD 2786 * 0x9c with CLEAR_STATS bit set (see above). 2787 * 2788 * uCode also issues this notification during scans. uCode clears statistics 2789 * appropriately so that each notification contains statistics for only the 2790 * one channel that has just been scanned. 2791 */ 2792 #define STATISTICS_REPLY_FLG_BAND_24G_MSK cpu_to_le32(0x2) 2793 #define STATISTICS_REPLY_FLG_HT40_MODE_MSK cpu_to_le32(0x8) 2794 2795 struct iwl_notif_statistics { 2796 __le32 flag; 2797 struct statistics_rx rx; 2798 struct statistics_tx tx; 2799 struct statistics_general general; 2800 } __packed; 2801 2802 struct iwl_bt_notif_statistics { 2803 __le32 flag; 2804 struct statistics_rx_bt rx; 2805 struct statistics_tx tx; 2806 struct statistics_general_bt general; 2807 } __packed; 2808 2809 /* 2810 * MISSED_BEACONS_NOTIFICATION = 0xa2 (notification only, not a command) 2811 * 2812 * uCode send MISSED_BEACONS_NOTIFICATION to driver when detect beacon missed 2813 * in regardless of how many missed beacons, which mean when driver receive the 2814 * notification, inside the command, it can find all the beacons information 2815 * which include number of total missed beacons, number of consecutive missed 2816 * beacons, number of beacons received and number of beacons expected to 2817 * receive. 2818 * 2819 * If uCode detected consecutive_missed_beacons > 5, it will reset the radio 2820 * in order to bring the radio/PHY back to working state; which has no relation 2821 * to when driver will perform sensitivity calibration. 2822 * 2823 * Driver should set it own missed_beacon_threshold to decide when to perform 2824 * sensitivity calibration based on number of consecutive missed beacons in 2825 * order to improve overall performance, especially in noisy environment. 2826 * 2827 */ 2828 2829 #define IWL_MISSED_BEACON_THRESHOLD_MIN (1) 2830 #define IWL_MISSED_BEACON_THRESHOLD_DEF (5) 2831 #define IWL_MISSED_BEACON_THRESHOLD_MAX IWL_MISSED_BEACON_THRESHOLD_DEF 2832 2833 struct iwl_missed_beacon_notif { 2834 __le32 consecutive_missed_beacons; 2835 __le32 total_missed_becons; 2836 __le32 num_expected_beacons; 2837 __le32 num_recvd_beacons; 2838 } __packed; 2839 2840 2841 /****************************************************************************** 2842 * (11) 2843 * Rx Calibration Commands: 2844 * 2845 * With the uCode used for open source drivers, most Tx calibration (except 2846 * for Tx Power) and most Rx calibration is done by uCode during the 2847 * "initialize" phase of uCode boot. Driver must calibrate only: 2848 * 2849 * 1) Tx power (depends on temperature), described elsewhere 2850 * 2) Receiver gain balance (optimize MIMO, and detect disconnected antennas) 2851 * 3) Receiver sensitivity (to optimize signal detection) 2852 * 2853 *****************************************************************************/ 2854 2855 /** 2856 * SENSITIVITY_CMD = 0xa8 (command, has simple generic response) 2857 * 2858 * This command sets up the Rx signal detector for a sensitivity level that 2859 * is high enough to lock onto all signals within the associated network, 2860 * but low enough to ignore signals that are below a certain threshold, so as 2861 * not to have too many "false alarms". False alarms are signals that the 2862 * Rx DSP tries to lock onto, but then discards after determining that they 2863 * are noise. 2864 * 2865 * The optimum number of false alarms is between 5 and 50 per 200 TUs 2866 * (200 * 1024 uSecs, i.e. 204.8 milliseconds) of actual Rx time (i.e. 2867 * time listening, not transmitting). Driver must adjust sensitivity so that 2868 * the ratio of actual false alarms to actual Rx time falls within this range. 2869 * 2870 * While associated, uCode delivers STATISTICS_NOTIFICATIONs after each 2871 * received beacon. These provide information to the driver to analyze the 2872 * sensitivity. Don't analyze statistics that come in from scanning, or any 2873 * other non-associated-network source. Pertinent statistics include: 2874 * 2875 * From "general" statistics (struct statistics_rx_non_phy): 2876 * 2877 * (beacon_energy_[abc] & 0x0FF00) >> 8 (unsigned, higher value is lower level) 2878 * Measure of energy of desired signal. Used for establishing a level 2879 * below which the device does not detect signals. 2880 * 2881 * (beacon_silence_rssi_[abc] & 0x0FF00) >> 8 (unsigned, units in dB) 2882 * Measure of background noise in silent period after beacon. 2883 * 2884 * channel_load 2885 * uSecs of actual Rx time during beacon period (varies according to 2886 * how much time was spent transmitting). 2887 * 2888 * From "cck" and "ofdm" statistics (struct statistics_rx_phy), separately: 2889 * 2890 * false_alarm_cnt 2891 * Signal locks abandoned early (before phy-level header). 2892 * 2893 * plcp_err 2894 * Signal locks abandoned late (during phy-level header). 2895 * 2896 * NOTE: Both false_alarm_cnt and plcp_err increment monotonically from 2897 * beacon to beacon, i.e. each value is an accumulation of all errors 2898 * before and including the latest beacon. Values will wrap around to 0 2899 * after counting up to 2^32 - 1. Driver must differentiate vs. 2900 * previous beacon's values to determine # false alarms in the current 2901 * beacon period. 2902 * 2903 * Total number of false alarms = false_alarms + plcp_errs 2904 * 2905 * For OFDM, adjust the following table entries in struct iwl_sensitivity_cmd 2906 * (notice that the start points for OFDM are at or close to settings for 2907 * maximum sensitivity): 2908 * 2909 * START / MIN / MAX 2910 * HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX 90 / 85 / 120 2911 * HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX 170 / 170 / 210 2912 * HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX 105 / 105 / 140 2913 * HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX 220 / 220 / 270 2914 * 2915 * If actual rate of OFDM false alarms (+ plcp_errors) is too high 2916 * (greater than 50 for each 204.8 msecs listening), reduce sensitivity 2917 * by *adding* 1 to all 4 of the table entries above, up to the max for 2918 * each entry. Conversely, if false alarm rate is too low (less than 5 2919 * for each 204.8 msecs listening), *subtract* 1 from each entry to 2920 * increase sensitivity. 2921 * 2922 * For CCK sensitivity, keep track of the following: 2923 * 2924 * 1). 20-beacon history of maximum background noise, indicated by 2925 * (beacon_silence_rssi_[abc] & 0x0FF00), units in dB, across the 2926 * 3 receivers. For any given beacon, the "silence reference" is 2927 * the maximum of last 60 samples (20 beacons * 3 receivers). 2928 * 2929 * 2). 10-beacon history of strongest signal level, as indicated 2930 * by (beacon_energy_[abc] & 0x0FF00) >> 8, across the 3 receivers, 2931 * i.e. the strength of the signal through the best receiver at the 2932 * moment. These measurements are "upside down", with lower values 2933 * for stronger signals, so max energy will be *minimum* value. 2934 * 2935 * Then for any given beacon, the driver must determine the *weakest* 2936 * of the strongest signals; this is the minimum level that needs to be 2937 * successfully detected, when using the best receiver at the moment. 2938 * "Max cck energy" is the maximum (higher value means lower energy!) 2939 * of the last 10 minima. Once this is determined, driver must add 2940 * a little margin by adding "6" to it. 2941 * 2942 * 3). Number of consecutive beacon periods with too few false alarms. 2943 * Reset this to 0 at the first beacon period that falls within the 2944 * "good" range (5 to 50 false alarms per 204.8 milliseconds rx). 2945 * 2946 * Then, adjust the following CCK table entries in struct iwl_sensitivity_cmd 2947 * (notice that the start points for CCK are at maximum sensitivity): 2948 * 2949 * START / MIN / MAX 2950 * HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX 125 / 125 / 200 2951 * HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX 200 / 200 / 400 2952 * HD_MIN_ENERGY_CCK_DET_INDEX 100 / 0 / 100 2953 * 2954 * If actual rate of CCK false alarms (+ plcp_errors) is too high 2955 * (greater than 50 for each 204.8 msecs listening), method for reducing 2956 * sensitivity is: 2957 * 2958 * 1) *Add* 3 to value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX, 2959 * up to max 400. 2960 * 2961 * 2) If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is < 160, 2962 * sensitivity has been reduced a significant amount; bring it up to 2963 * a moderate 161. Otherwise, *add* 3, up to max 200. 2964 * 2965 * 3) a) If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is > 160, 2966 * sensitivity has been reduced only a moderate or small amount; 2967 * *subtract* 2 from value in HD_MIN_ENERGY_CCK_DET_INDEX, 2968 * down to min 0. Otherwise (if gain has been significantly reduced), 2969 * don't change the HD_MIN_ENERGY_CCK_DET_INDEX value. 2970 * 2971 * b) Save a snapshot of the "silence reference". 2972 * 2973 * If actual rate of CCK false alarms (+ plcp_errors) is too low 2974 * (less than 5 for each 204.8 msecs listening), method for increasing 2975 * sensitivity is used only if: 2976 * 2977 * 1a) Previous beacon did not have too many false alarms 2978 * 1b) AND difference between previous "silence reference" and current 2979 * "silence reference" (prev - current) is 2 or more, 2980 * OR 2) 100 or more consecutive beacon periods have had rate of 2981 * less than 5 false alarms per 204.8 milliseconds rx time. 2982 * 2983 * Method for increasing sensitivity: 2984 * 2985 * 1) *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX, 2986 * down to min 125. 2987 * 2988 * 2) *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX, 2989 * down to min 200. 2990 * 2991 * 3) *Add* 2 to value in HD_MIN_ENERGY_CCK_DET_INDEX, up to max 100. 2992 * 2993 * If actual rate of CCK false alarms (+ plcp_errors) is within good range 2994 * (between 5 and 50 for each 204.8 msecs listening): 2995 * 2996 * 1) Save a snapshot of the silence reference. 2997 * 2998 * 2) If previous beacon had too many CCK false alarms (+ plcp_errors), 2999 * give some extra margin to energy threshold by *subtracting* 8 3000 * from value in HD_MIN_ENERGY_CCK_DET_INDEX. 3001 * 3002 * For all cases (too few, too many, good range), make sure that the CCK 3003 * detection threshold (energy) is below the energy level for robust 3004 * detection over the past 10 beacon periods, the "Max cck energy". 3005 * Lower values mean higher energy; this means making sure that the value 3006 * in HD_MIN_ENERGY_CCK_DET_INDEX is at or *above* "Max cck energy". 3007 * 3008 */ 3009 3010 /* 3011 * Table entries in SENSITIVITY_CMD (struct iwl_sensitivity_cmd) 3012 */ 3013 #define HD_TABLE_SIZE (11) /* number of entries */ 3014 #define HD_MIN_ENERGY_CCK_DET_INDEX (0) /* table indexes */ 3015 #define HD_MIN_ENERGY_OFDM_DET_INDEX (1) 3016 #define HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX (2) 3017 #define HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX (3) 3018 #define HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX (4) 3019 #define HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX (5) 3020 #define HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX (6) 3021 #define HD_BARKER_CORR_TH_ADD_MIN_INDEX (7) 3022 #define HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX (8) 3023 #define HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX (9) 3024 #define HD_OFDM_ENERGY_TH_IN_INDEX (10) 3025 3026 /* 3027 * Additional table entries in enhance SENSITIVITY_CMD 3028 */ 3029 #define HD_INA_NON_SQUARE_DET_OFDM_INDEX (11) 3030 #define HD_INA_NON_SQUARE_DET_CCK_INDEX (12) 3031 #define HD_CORR_11_INSTEAD_OF_CORR_9_EN_INDEX (13) 3032 #define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_INDEX (14) 3033 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_INDEX (15) 3034 #define HD_OFDM_NON_SQUARE_DET_SLOPE_INDEX (16) 3035 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_INDEX (17) 3036 #define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_INDEX (18) 3037 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_INDEX (19) 3038 #define HD_CCK_NON_SQUARE_DET_SLOPE_INDEX (20) 3039 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_INDEX (21) 3040 #define HD_RESERVED (22) 3041 3042 /* number of entries for enhanced tbl */ 3043 #define ENHANCE_HD_TABLE_SIZE (23) 3044 3045 /* number of additional entries for enhanced tbl */ 3046 #define ENHANCE_HD_TABLE_ENTRIES (ENHANCE_HD_TABLE_SIZE - HD_TABLE_SIZE) 3047 3048 #define HD_INA_NON_SQUARE_DET_OFDM_DATA_V1 cpu_to_le16(0) 3049 #define HD_INA_NON_SQUARE_DET_CCK_DATA_V1 cpu_to_le16(0) 3050 #define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA_V1 cpu_to_le16(0) 3051 #define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA_V1 cpu_to_le16(668) 3052 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V1 cpu_to_le16(4) 3053 #define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA_V1 cpu_to_le16(486) 3054 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA_V1 cpu_to_le16(37) 3055 #define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA_V1 cpu_to_le16(853) 3056 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V1 cpu_to_le16(4) 3057 #define HD_CCK_NON_SQUARE_DET_SLOPE_DATA_V1 cpu_to_le16(476) 3058 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA_V1 cpu_to_le16(99) 3059 3060 #define HD_INA_NON_SQUARE_DET_OFDM_DATA_V2 cpu_to_le16(1) 3061 #define HD_INA_NON_SQUARE_DET_CCK_DATA_V2 cpu_to_le16(1) 3062 #define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA_V2 cpu_to_le16(1) 3063 #define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA_V2 cpu_to_le16(600) 3064 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V2 cpu_to_le16(40) 3065 #define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA_V2 cpu_to_le16(486) 3066 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA_V2 cpu_to_le16(45) 3067 #define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA_V2 cpu_to_le16(853) 3068 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V2 cpu_to_le16(60) 3069 #define HD_CCK_NON_SQUARE_DET_SLOPE_DATA_V2 cpu_to_le16(476) 3070 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA_V2 cpu_to_le16(99) 3071 3072 3073 /* Control field in struct iwl_sensitivity_cmd */ 3074 #define SENSITIVITY_CMD_CONTROL_DEFAULT_TABLE cpu_to_le16(0) 3075 #define SENSITIVITY_CMD_CONTROL_WORK_TABLE cpu_to_le16(1) 3076 3077 /** 3078 * struct iwl_sensitivity_cmd 3079 * @control: (1) updates working table, (0) updates default table 3080 * @table: energy threshold values, use HD_* as index into table 3081 * 3082 * Always use "1" in "control" to update uCode's working table and DSP. 3083 */ 3084 struct iwl_sensitivity_cmd { 3085 __le16 control; /* always use "1" */ 3086 __le16 table[HD_TABLE_SIZE]; /* use HD_* as index */ 3087 } __packed; 3088 3089 /* 3090 * 3091 */ 3092 struct iwl_enhance_sensitivity_cmd { 3093 __le16 control; /* always use "1" */ 3094 __le16 enhance_table[ENHANCE_HD_TABLE_SIZE]; /* use HD_* as index */ 3095 } __packed; 3096 3097 3098 /** 3099 * REPLY_PHY_CALIBRATION_CMD = 0xb0 (command, has simple generic response) 3100 * 3101 * This command sets the relative gains of agn device's 3 radio receiver chains. 3102 * 3103 * After the first association, driver should accumulate signal and noise 3104 * statistics from the STATISTICS_NOTIFICATIONs that follow the first 20 3105 * beacons from the associated network (don't collect statistics that come 3106 * in from scanning, or any other non-network source). 3107 * 3108 * DISCONNECTED ANTENNA: 3109 * 3110 * Driver should determine which antennas are actually connected, by comparing 3111 * average beacon signal levels for the 3 Rx chains. Accumulate (add) the 3112 * following values over 20 beacons, one accumulator for each of the chains 3113 * a/b/c, from struct statistics_rx_non_phy: 3114 * 3115 * beacon_rssi_[abc] & 0x0FF (unsigned, units in dB) 3116 * 3117 * Find the strongest signal from among a/b/c. Compare the other two to the 3118 * strongest. If any signal is more than 15 dB (times 20, unless you 3119 * divide the accumulated values by 20) below the strongest, the driver 3120 * considers that antenna to be disconnected, and should not try to use that 3121 * antenna/chain for Rx or Tx. If both A and B seem to be disconnected, 3122 * driver should declare the stronger one as connected, and attempt to use it 3123 * (A and B are the only 2 Tx chains!). 3124 * 3125 * 3126 * RX BALANCE: 3127 * 3128 * Driver should balance the 3 receivers (but just the ones that are connected 3129 * to antennas, see above) for gain, by comparing the average signal levels 3130 * detected during the silence after each beacon (background noise). 3131 * Accumulate (add) the following values over 20 beacons, one accumulator for 3132 * each of the chains a/b/c, from struct statistics_rx_non_phy: 3133 * 3134 * beacon_silence_rssi_[abc] & 0x0FF (unsigned, units in dB) 3135 * 3136 * Find the weakest background noise level from among a/b/c. This Rx chain 3137 * will be the reference, with 0 gain adjustment. Attenuate other channels by 3138 * finding noise difference: 3139 * 3140 * (accum_noise[i] - accum_noise[reference]) / 30 3141 * 3142 * The "30" adjusts the dB in the 20 accumulated samples to units of 1.5 dB. 3143 * For use in diff_gain_[abc] fields of struct iwl_calibration_cmd, the 3144 * driver should limit the difference results to a range of 0-3 (0-4.5 dB), 3145 * and set bit 2 to indicate "reduce gain". The value for the reference 3146 * (weakest) chain should be "0". 3147 * 3148 * diff_gain_[abc] bit fields: 3149 * 2: (1) reduce gain, (0) increase gain 3150 * 1-0: amount of gain, units of 1.5 dB 3151 */ 3152 3153 /* Phy calibration command for series */ 3154 /* The default calibrate table size if not specified by firmware */ 3155 #define IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE 18 3156 enum { 3157 IWL_PHY_CALIBRATE_DC_CMD = 8, 3158 IWL_PHY_CALIBRATE_LO_CMD = 9, 3159 IWL_PHY_CALIBRATE_TX_IQ_CMD = 11, 3160 IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD = 15, 3161 IWL_PHY_CALIBRATE_BASE_BAND_CMD = 16, 3162 IWL_PHY_CALIBRATE_TX_IQ_PERD_CMD = 17, 3163 IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD = 18, 3164 IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE = 19, 3165 }; 3166 3167 #define IWL_MAX_PHY_CALIBRATE_TBL_SIZE (253) 3168 3169 /* This enum defines the bitmap of various calibrations to enable in both 3170 * init ucode and runtime ucode through CALIBRATION_CFG_CMD. 3171 */ 3172 enum iwl_ucode_calib_cfg { 3173 IWL_CALIB_CFG_RX_BB_IDX = BIT(0), 3174 IWL_CALIB_CFG_DC_IDX = BIT(1), 3175 IWL_CALIB_CFG_LO_IDX = BIT(2), 3176 IWL_CALIB_CFG_TX_IQ_IDX = BIT(3), 3177 IWL_CALIB_CFG_RX_IQ_IDX = BIT(4), 3178 IWL_CALIB_CFG_NOISE_IDX = BIT(5), 3179 IWL_CALIB_CFG_CRYSTAL_IDX = BIT(6), 3180 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(7), 3181 IWL_CALIB_CFG_PAPD_IDX = BIT(8), 3182 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(9), 3183 IWL_CALIB_CFG_TX_PWR_IDX = BIT(10), 3184 }; 3185 3186 #define IWL_CALIB_INIT_CFG_ALL cpu_to_le32(IWL_CALIB_CFG_RX_BB_IDX | \ 3187 IWL_CALIB_CFG_DC_IDX | \ 3188 IWL_CALIB_CFG_LO_IDX | \ 3189 IWL_CALIB_CFG_TX_IQ_IDX | \ 3190 IWL_CALIB_CFG_RX_IQ_IDX | \ 3191 IWL_CALIB_CFG_CRYSTAL_IDX) 3192 3193 #define IWL_CALIB_RT_CFG_ALL cpu_to_le32(IWL_CALIB_CFG_RX_BB_IDX | \ 3194 IWL_CALIB_CFG_DC_IDX | \ 3195 IWL_CALIB_CFG_LO_IDX | \ 3196 IWL_CALIB_CFG_TX_IQ_IDX | \ 3197 IWL_CALIB_CFG_RX_IQ_IDX | \ 3198 IWL_CALIB_CFG_TEMPERATURE_IDX | \ 3199 IWL_CALIB_CFG_PAPD_IDX | \ 3200 IWL_CALIB_CFG_TX_PWR_IDX | \ 3201 IWL_CALIB_CFG_CRYSTAL_IDX) 3202 3203 #define IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK cpu_to_le32(BIT(0)) 3204 3205 struct iwl_calib_cfg_elmnt_s { 3206 __le32 is_enable; 3207 __le32 start; 3208 __le32 send_res; 3209 __le32 apply_res; 3210 __le32 reserved; 3211 } __packed; 3212 3213 struct iwl_calib_cfg_status_s { 3214 struct iwl_calib_cfg_elmnt_s once; 3215 struct iwl_calib_cfg_elmnt_s perd; 3216 __le32 flags; 3217 } __packed; 3218 3219 struct iwl_calib_cfg_cmd { 3220 struct iwl_calib_cfg_status_s ucd_calib_cfg; 3221 struct iwl_calib_cfg_status_s drv_calib_cfg; 3222 __le32 reserved1; 3223 } __packed; 3224 3225 struct iwl_calib_hdr { 3226 u8 op_code; 3227 u8 first_group; 3228 u8 groups_num; 3229 u8 data_valid; 3230 } __packed; 3231 3232 struct iwl_calib_cmd { 3233 struct iwl_calib_hdr hdr; 3234 u8 data[0]; 3235 } __packed; 3236 3237 struct iwl_calib_xtal_freq_cmd { 3238 struct iwl_calib_hdr hdr; 3239 u8 cap_pin1; 3240 u8 cap_pin2; 3241 u8 pad[2]; 3242 } __packed; 3243 3244 #define DEFAULT_RADIO_SENSOR_OFFSET cpu_to_le16(2700) 3245 struct iwl_calib_temperature_offset_cmd { 3246 struct iwl_calib_hdr hdr; 3247 __le16 radio_sensor_offset; 3248 __le16 reserved; 3249 } __packed; 3250 3251 struct iwl_calib_temperature_offset_v2_cmd { 3252 struct iwl_calib_hdr hdr; 3253 __le16 radio_sensor_offset_high; 3254 __le16 radio_sensor_offset_low; 3255 __le16 burntVoltageRef; 3256 __le16 reserved; 3257 } __packed; 3258 3259 /* IWL_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD */ 3260 struct iwl_calib_chain_noise_reset_cmd { 3261 struct iwl_calib_hdr hdr; 3262 u8 data[0]; 3263 }; 3264 3265 /* IWL_PHY_CALIBRATE_CHAIN_NOISE_GAIN_CMD */ 3266 struct iwl_calib_chain_noise_gain_cmd { 3267 struct iwl_calib_hdr hdr; 3268 u8 delta_gain_1; 3269 u8 delta_gain_2; 3270 u8 pad[2]; 3271 } __packed; 3272 3273 /****************************************************************************** 3274 * (12) 3275 * Miscellaneous Commands: 3276 * 3277 *****************************************************************************/ 3278 3279 /* 3280 * LEDs Command & Response 3281 * REPLY_LEDS_CMD = 0x48 (command, has simple generic response) 3282 * 3283 * For each of 3 possible LEDs (Activity/Link/Tech, selected by "id" field), 3284 * this command turns it on or off, or sets up a periodic blinking cycle. 3285 */ 3286 struct iwl_led_cmd { 3287 __le32 interval; /* "interval" in uSec */ 3288 u8 id; /* 1: Activity, 2: Link, 3: Tech */ 3289 u8 off; /* # intervals off while blinking; 3290 * "0", with >0 "on" value, turns LED on */ 3291 u8 on; /* # intervals on while blinking; 3292 * "0", regardless of "off", turns LED off */ 3293 u8 reserved; 3294 } __packed; 3295 3296 /* 3297 * station priority table entries 3298 * also used as potential "events" value for both 3299 * COEX_MEDIUM_NOTIFICATION and COEX_EVENT_CMD 3300 */ 3301 3302 /* 3303 * COEX events entry flag masks 3304 * RP - Requested Priority 3305 * WP - Win Medium Priority: priority assigned when the contention has been won 3306 */ 3307 #define COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG (0x1) 3308 #define COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG (0x2) 3309 #define COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG (0x4) 3310 3311 #define COEX_CU_UNASSOC_IDLE_RP 4 3312 #define COEX_CU_UNASSOC_MANUAL_SCAN_RP 4 3313 #define COEX_CU_UNASSOC_AUTO_SCAN_RP 4 3314 #define COEX_CU_CALIBRATION_RP 4 3315 #define COEX_CU_PERIODIC_CALIBRATION_RP 4 3316 #define COEX_CU_CONNECTION_ESTAB_RP 4 3317 #define COEX_CU_ASSOCIATED_IDLE_RP 4 3318 #define COEX_CU_ASSOC_MANUAL_SCAN_RP 4 3319 #define COEX_CU_ASSOC_AUTO_SCAN_RP 4 3320 #define COEX_CU_ASSOC_ACTIVE_LEVEL_RP 4 3321 #define COEX_CU_RF_ON_RP 6 3322 #define COEX_CU_RF_OFF_RP 4 3323 #define COEX_CU_STAND_ALONE_DEBUG_RP 6 3324 #define COEX_CU_IPAN_ASSOC_LEVEL_RP 4 3325 #define COEX_CU_RSRVD1_RP 4 3326 #define COEX_CU_RSRVD2_RP 4 3327 3328 #define COEX_CU_UNASSOC_IDLE_WP 3 3329 #define COEX_CU_UNASSOC_MANUAL_SCAN_WP 3 3330 #define COEX_CU_UNASSOC_AUTO_SCAN_WP 3 3331 #define COEX_CU_CALIBRATION_WP 3 3332 #define COEX_CU_PERIODIC_CALIBRATION_WP 3 3333 #define COEX_CU_CONNECTION_ESTAB_WP 3 3334 #define COEX_CU_ASSOCIATED_IDLE_WP 3 3335 #define COEX_CU_ASSOC_MANUAL_SCAN_WP 3 3336 #define COEX_CU_ASSOC_AUTO_SCAN_WP 3 3337 #define COEX_CU_ASSOC_ACTIVE_LEVEL_WP 3 3338 #define COEX_CU_RF_ON_WP 3 3339 #define COEX_CU_RF_OFF_WP 3 3340 #define COEX_CU_STAND_ALONE_DEBUG_WP 6 3341 #define COEX_CU_IPAN_ASSOC_LEVEL_WP 3 3342 #define COEX_CU_RSRVD1_WP 3 3343 #define COEX_CU_RSRVD2_WP 3 3344 3345 #define COEX_UNASSOC_IDLE_FLAGS 0 3346 #define COEX_UNASSOC_MANUAL_SCAN_FLAGS \ 3347 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3348 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) 3349 #define COEX_UNASSOC_AUTO_SCAN_FLAGS \ 3350 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3351 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) 3352 #define COEX_CALIBRATION_FLAGS \ 3353 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3354 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) 3355 #define COEX_PERIODIC_CALIBRATION_FLAGS 0 3356 /* 3357 * COEX_CONNECTION_ESTAB: 3358 * we need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network. 3359 */ 3360 #define COEX_CONNECTION_ESTAB_FLAGS \ 3361 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3362 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \ 3363 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG) 3364 #define COEX_ASSOCIATED_IDLE_FLAGS 0 3365 #define COEX_ASSOC_MANUAL_SCAN_FLAGS \ 3366 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3367 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) 3368 #define COEX_ASSOC_AUTO_SCAN_FLAGS \ 3369 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3370 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) 3371 #define COEX_ASSOC_ACTIVE_LEVEL_FLAGS 0 3372 #define COEX_RF_ON_FLAGS 0 3373 #define COEX_RF_OFF_FLAGS 0 3374 #define COEX_STAND_ALONE_DEBUG_FLAGS \ 3375 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3376 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) 3377 #define COEX_IPAN_ASSOC_LEVEL_FLAGS \ 3378 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3379 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \ 3380 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG) 3381 #define COEX_RSRVD1_FLAGS 0 3382 #define COEX_RSRVD2_FLAGS 0 3383 /* 3384 * COEX_CU_RF_ON is the event wrapping all radio ownership. 3385 * We need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network. 3386 */ 3387 #define COEX_CU_RF_ON_FLAGS \ 3388 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3389 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \ 3390 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG) 3391 3392 3393 enum { 3394 /* un-association part */ 3395 COEX_UNASSOC_IDLE = 0, 3396 COEX_UNASSOC_MANUAL_SCAN = 1, 3397 COEX_UNASSOC_AUTO_SCAN = 2, 3398 /* calibration */ 3399 COEX_CALIBRATION = 3, 3400 COEX_PERIODIC_CALIBRATION = 4, 3401 /* connection */ 3402 COEX_CONNECTION_ESTAB = 5, 3403 /* association part */ 3404 COEX_ASSOCIATED_IDLE = 6, 3405 COEX_ASSOC_MANUAL_SCAN = 7, 3406 COEX_ASSOC_AUTO_SCAN = 8, 3407 COEX_ASSOC_ACTIVE_LEVEL = 9, 3408 /* RF ON/OFF */ 3409 COEX_RF_ON = 10, 3410 COEX_RF_OFF = 11, 3411 COEX_STAND_ALONE_DEBUG = 12, 3412 /* IPAN */ 3413 COEX_IPAN_ASSOC_LEVEL = 13, 3414 /* reserved */ 3415 COEX_RSRVD1 = 14, 3416 COEX_RSRVD2 = 15, 3417 COEX_NUM_OF_EVENTS = 16 3418 }; 3419 3420 /* 3421 * Coexistence WIFI/WIMAX Command 3422 * COEX_PRIORITY_TABLE_CMD = 0x5a 3423 * 3424 */ 3425 struct iwl_wimax_coex_event_entry { 3426 u8 request_prio; 3427 u8 win_medium_prio; 3428 u8 reserved; 3429 u8 flags; 3430 } __packed; 3431 3432 /* COEX flag masks */ 3433 3434 /* Station table is valid */ 3435 #define COEX_FLAGS_STA_TABLE_VALID_MSK (0x1) 3436 /* UnMask wake up src at unassociated sleep */ 3437 #define COEX_FLAGS_UNASSOC_WA_UNMASK_MSK (0x4) 3438 /* UnMask wake up src at associated sleep */ 3439 #define COEX_FLAGS_ASSOC_WA_UNMASK_MSK (0x8) 3440 /* Enable CoEx feature. */ 3441 #define COEX_FLAGS_COEX_ENABLE_MSK (0x80) 3442 3443 struct iwl_wimax_coex_cmd { 3444 u8 flags; 3445 u8 reserved[3]; 3446 struct iwl_wimax_coex_event_entry sta_prio[COEX_NUM_OF_EVENTS]; 3447 } __packed; 3448 3449 /* 3450 * Coexistence MEDIUM NOTIFICATION 3451 * COEX_MEDIUM_NOTIFICATION = 0x5b 3452 * 3453 * notification from uCode to host to indicate medium changes 3454 * 3455 */ 3456 /* 3457 * status field 3458 * bit 0 - 2: medium status 3459 * bit 3: medium change indication 3460 * bit 4 - 31: reserved 3461 */ 3462 /* status option values, (0 - 2 bits) */ 3463 #define COEX_MEDIUM_BUSY (0x0) /* radio belongs to WiMAX */ 3464 #define COEX_MEDIUM_ACTIVE (0x1) /* radio belongs to WiFi */ 3465 #define COEX_MEDIUM_PRE_RELEASE (0x2) /* received radio release */ 3466 #define COEX_MEDIUM_MSK (0x7) 3467 3468 /* send notification status (1 bit) */ 3469 #define COEX_MEDIUM_CHANGED (0x8) 3470 #define COEX_MEDIUM_CHANGED_MSK (0x8) 3471 #define COEX_MEDIUM_SHIFT (3) 3472 3473 struct iwl_coex_medium_notification { 3474 __le32 status; 3475 __le32 events; 3476 } __packed; 3477 3478 /* 3479 * Coexistence EVENT Command 3480 * COEX_EVENT_CMD = 0x5c 3481 * 3482 * send from host to uCode for coex event request. 3483 */ 3484 /* flags options */ 3485 #define COEX_EVENT_REQUEST_MSK (0x1) 3486 3487 struct iwl_coex_event_cmd { 3488 u8 flags; 3489 u8 event; 3490 __le16 reserved; 3491 } __packed; 3492 3493 struct iwl_coex_event_resp { 3494 __le32 status; 3495 } __packed; 3496 3497 3498 /****************************************************************************** 3499 * Bluetooth Coexistence commands 3500 * 3501 *****************************************************************************/ 3502 3503 /* 3504 * BT Status notification 3505 * REPLY_BT_COEX_PROFILE_NOTIF = 0xce 3506 */ 3507 enum iwl_bt_coex_profile_traffic_load { 3508 IWL_BT_COEX_TRAFFIC_LOAD_NONE = 0, 3509 IWL_BT_COEX_TRAFFIC_LOAD_LOW = 1, 3510 IWL_BT_COEX_TRAFFIC_LOAD_HIGH = 2, 3511 IWL_BT_COEX_TRAFFIC_LOAD_CONTINUOUS = 3, 3512 /* 3513 * There are no more even though below is a u8, the 3514 * indication from the BT device only has two bits. 3515 */ 3516 }; 3517 3518 #define BT_SESSION_ACTIVITY_1_UART_MSG 0x1 3519 #define BT_SESSION_ACTIVITY_2_UART_MSG 0x2 3520 3521 /* BT UART message - Share Part (BT -> WiFi) */ 3522 #define BT_UART_MSG_FRAME1MSGTYPE_POS (0) 3523 #define BT_UART_MSG_FRAME1MSGTYPE_MSK \ 3524 (0x7 << BT_UART_MSG_FRAME1MSGTYPE_POS) 3525 #define BT_UART_MSG_FRAME1SSN_POS (3) 3526 #define BT_UART_MSG_FRAME1SSN_MSK \ 3527 (0x3 << BT_UART_MSG_FRAME1SSN_POS) 3528 #define BT_UART_MSG_FRAME1UPDATEREQ_POS (5) 3529 #define BT_UART_MSG_FRAME1UPDATEREQ_MSK \ 3530 (0x1 << BT_UART_MSG_FRAME1UPDATEREQ_POS) 3531 #define BT_UART_MSG_FRAME1RESERVED_POS (6) 3532 #define BT_UART_MSG_FRAME1RESERVED_MSK \ 3533 (0x3 << BT_UART_MSG_FRAME1RESERVED_POS) 3534 3535 #define BT_UART_MSG_FRAME2OPENCONNECTIONS_POS (0) 3536 #define BT_UART_MSG_FRAME2OPENCONNECTIONS_MSK \ 3537 (0x3 << BT_UART_MSG_FRAME2OPENCONNECTIONS_POS) 3538 #define BT_UART_MSG_FRAME2TRAFFICLOAD_POS (2) 3539 #define BT_UART_MSG_FRAME2TRAFFICLOAD_MSK \ 3540 (0x3 << BT_UART_MSG_FRAME2TRAFFICLOAD_POS) 3541 #define BT_UART_MSG_FRAME2CHLSEQN_POS (4) 3542 #define BT_UART_MSG_FRAME2CHLSEQN_MSK \ 3543 (0x1 << BT_UART_MSG_FRAME2CHLSEQN_POS) 3544 #define BT_UART_MSG_FRAME2INBAND_POS (5) 3545 #define BT_UART_MSG_FRAME2INBAND_MSK \ 3546 (0x1 << BT_UART_MSG_FRAME2INBAND_POS) 3547 #define BT_UART_MSG_FRAME2RESERVED_POS (6) 3548 #define BT_UART_MSG_FRAME2RESERVED_MSK \ 3549 (0x3 << BT_UART_MSG_FRAME2RESERVED_POS) 3550 3551 #define BT_UART_MSG_FRAME3SCOESCO_POS (0) 3552 #define BT_UART_MSG_FRAME3SCOESCO_MSK \ 3553 (0x1 << BT_UART_MSG_FRAME3SCOESCO_POS) 3554 #define BT_UART_MSG_FRAME3SNIFF_POS (1) 3555 #define BT_UART_MSG_FRAME3SNIFF_MSK \ 3556 (0x1 << BT_UART_MSG_FRAME3SNIFF_POS) 3557 #define BT_UART_MSG_FRAME3A2DP_POS (2) 3558 #define BT_UART_MSG_FRAME3A2DP_MSK \ 3559 (0x1 << BT_UART_MSG_FRAME3A2DP_POS) 3560 #define BT_UART_MSG_FRAME3ACL_POS (3) 3561 #define BT_UART_MSG_FRAME3ACL_MSK \ 3562 (0x1 << BT_UART_MSG_FRAME3ACL_POS) 3563 #define BT_UART_MSG_FRAME3MASTER_POS (4) 3564 #define BT_UART_MSG_FRAME3MASTER_MSK \ 3565 (0x1 << BT_UART_MSG_FRAME3MASTER_POS) 3566 #define BT_UART_MSG_FRAME3OBEX_POS (5) 3567 #define BT_UART_MSG_FRAME3OBEX_MSK \ 3568 (0x1 << BT_UART_MSG_FRAME3OBEX_POS) 3569 #define BT_UART_MSG_FRAME3RESERVED_POS (6) 3570 #define BT_UART_MSG_FRAME3RESERVED_MSK \ 3571 (0x3 << BT_UART_MSG_FRAME3RESERVED_POS) 3572 3573 #define BT_UART_MSG_FRAME4IDLEDURATION_POS (0) 3574 #define BT_UART_MSG_FRAME4IDLEDURATION_MSK \ 3575 (0x3F << BT_UART_MSG_FRAME4IDLEDURATION_POS) 3576 #define BT_UART_MSG_FRAME4RESERVED_POS (6) 3577 #define BT_UART_MSG_FRAME4RESERVED_MSK \ 3578 (0x3 << BT_UART_MSG_FRAME4RESERVED_POS) 3579 3580 #define BT_UART_MSG_FRAME5TXACTIVITY_POS (0) 3581 #define BT_UART_MSG_FRAME5TXACTIVITY_MSK \ 3582 (0x3 << BT_UART_MSG_FRAME5TXACTIVITY_POS) 3583 #define BT_UART_MSG_FRAME5RXACTIVITY_POS (2) 3584 #define BT_UART_MSG_FRAME5RXACTIVITY_MSK \ 3585 (0x3 << BT_UART_MSG_FRAME5RXACTIVITY_POS) 3586 #define BT_UART_MSG_FRAME5ESCORETRANSMIT_POS (4) 3587 #define BT_UART_MSG_FRAME5ESCORETRANSMIT_MSK \ 3588 (0x3 << BT_UART_MSG_FRAME5ESCORETRANSMIT_POS) 3589 #define BT_UART_MSG_FRAME5RESERVED_POS (6) 3590 #define BT_UART_MSG_FRAME5RESERVED_MSK \ 3591 (0x3 << BT_UART_MSG_FRAME5RESERVED_POS) 3592 3593 #define BT_UART_MSG_FRAME6SNIFFINTERVAL_POS (0) 3594 #define BT_UART_MSG_FRAME6SNIFFINTERVAL_MSK \ 3595 (0x1F << BT_UART_MSG_FRAME6SNIFFINTERVAL_POS) 3596 #define BT_UART_MSG_FRAME6DISCOVERABLE_POS (5) 3597 #define BT_UART_MSG_FRAME6DISCOVERABLE_MSK \ 3598 (0x1 << BT_UART_MSG_FRAME6DISCOVERABLE_POS) 3599 #define BT_UART_MSG_FRAME6RESERVED_POS (6) 3600 #define BT_UART_MSG_FRAME6RESERVED_MSK \ 3601 (0x3 << BT_UART_MSG_FRAME6RESERVED_POS) 3602 3603 #define BT_UART_MSG_FRAME7SNIFFACTIVITY_POS (0) 3604 #define BT_UART_MSG_FRAME7SNIFFACTIVITY_MSK \ 3605 (0x7 << BT_UART_MSG_FRAME7SNIFFACTIVITY_POS) 3606 #define BT_UART_MSG_FRAME7PAGE_POS (3) 3607 #define BT_UART_MSG_FRAME7PAGE_MSK \ 3608 (0x1 << BT_UART_MSG_FRAME7PAGE_POS) 3609 #define BT_UART_MSG_FRAME7INQUIRY_POS (4) 3610 #define BT_UART_MSG_FRAME7INQUIRY_MSK \ 3611 (0x1 << BT_UART_MSG_FRAME7INQUIRY_POS) 3612 #define BT_UART_MSG_FRAME7CONNECTABLE_POS (5) 3613 #define BT_UART_MSG_FRAME7CONNECTABLE_MSK \ 3614 (0x1 << BT_UART_MSG_FRAME7CONNECTABLE_POS) 3615 #define BT_UART_MSG_FRAME7RESERVED_POS (6) 3616 #define BT_UART_MSG_FRAME7RESERVED_MSK \ 3617 (0x3 << BT_UART_MSG_FRAME7RESERVED_POS) 3618 3619 /* BT Session Activity 2 UART message (BT -> WiFi) */ 3620 #define BT_UART_MSG_2_FRAME1RESERVED1_POS (5) 3621 #define BT_UART_MSG_2_FRAME1RESERVED1_MSK \ 3622 (0x1<<BT_UART_MSG_2_FRAME1RESERVED1_POS) 3623 #define BT_UART_MSG_2_FRAME1RESERVED2_POS (6) 3624 #define BT_UART_MSG_2_FRAME1RESERVED2_MSK \ 3625 (0x3<<BT_UART_MSG_2_FRAME1RESERVED2_POS) 3626 3627 #define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS (0) 3628 #define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_MSK \ 3629 (0x3F<<BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS) 3630 #define BT_UART_MSG_2_FRAME2RESERVED_POS (6) 3631 #define BT_UART_MSG_2_FRAME2RESERVED_MSK \ 3632 (0x3<<BT_UART_MSG_2_FRAME2RESERVED_POS) 3633 3634 #define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS (0) 3635 #define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_MSK \ 3636 (0xF<<BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS) 3637 #define BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS (4) 3638 #define BT_UART_MSG_2_FRAME3INQPAGESRMODE_MSK \ 3639 (0x1<<BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS) 3640 #define BT_UART_MSG_2_FRAME3LEMASTER_POS (5) 3641 #define BT_UART_MSG_2_FRAME3LEMASTER_MSK \ 3642 (0x1<<BT_UART_MSG_2_FRAME3LEMASTER_POS) 3643 #define BT_UART_MSG_2_FRAME3RESERVED_POS (6) 3644 #define BT_UART_MSG_2_FRAME3RESERVED_MSK \ 3645 (0x3<<BT_UART_MSG_2_FRAME3RESERVED_POS) 3646 3647 #define BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS (0) 3648 #define BT_UART_MSG_2_FRAME4LELASTTXPOWER_MSK \ 3649 (0xF<<BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS) 3650 #define BT_UART_MSG_2_FRAME4NUMLECONN_POS (4) 3651 #define BT_UART_MSG_2_FRAME4NUMLECONN_MSK \ 3652 (0x3<<BT_UART_MSG_2_FRAME4NUMLECONN_POS) 3653 #define BT_UART_MSG_2_FRAME4RESERVED_POS (6) 3654 #define BT_UART_MSG_2_FRAME4RESERVED_MSK \ 3655 (0x3<<BT_UART_MSG_2_FRAME4RESERVED_POS) 3656 3657 #define BT_UART_MSG_2_FRAME5BTMINRSSI_POS (0) 3658 #define BT_UART_MSG_2_FRAME5BTMINRSSI_MSK \ 3659 (0xF<<BT_UART_MSG_2_FRAME5BTMINRSSI_POS) 3660 #define BT_UART_MSG_2_FRAME5LESCANINITMODE_POS (4) 3661 #define BT_UART_MSG_2_FRAME5LESCANINITMODE_MSK \ 3662 (0x1<<BT_UART_MSG_2_FRAME5LESCANINITMODE_POS) 3663 #define BT_UART_MSG_2_FRAME5LEADVERMODE_POS (5) 3664 #define BT_UART_MSG_2_FRAME5LEADVERMODE_MSK \ 3665 (0x1<<BT_UART_MSG_2_FRAME5LEADVERMODE_POS) 3666 #define BT_UART_MSG_2_FRAME5RESERVED_POS (6) 3667 #define BT_UART_MSG_2_FRAME5RESERVED_MSK \ 3668 (0x3<<BT_UART_MSG_2_FRAME5RESERVED_POS) 3669 3670 #define BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS (0) 3671 #define BT_UART_MSG_2_FRAME6LECONNINTERVAL_MSK \ 3672 (0x1F<<BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS) 3673 #define BT_UART_MSG_2_FRAME6RFU_POS (5) 3674 #define BT_UART_MSG_2_FRAME6RFU_MSK \ 3675 (0x1<<BT_UART_MSG_2_FRAME6RFU_POS) 3676 #define BT_UART_MSG_2_FRAME6RESERVED_POS (6) 3677 #define BT_UART_MSG_2_FRAME6RESERVED_MSK \ 3678 (0x3<<BT_UART_MSG_2_FRAME6RESERVED_POS) 3679 3680 #define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS (0) 3681 #define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_MSK \ 3682 (0x7<<BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS) 3683 #define BT_UART_MSG_2_FRAME7LEPROFILE1_POS (3) 3684 #define BT_UART_MSG_2_FRAME7LEPROFILE1_MSK \ 3685 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE1_POS) 3686 #define BT_UART_MSG_2_FRAME7LEPROFILE2_POS (4) 3687 #define BT_UART_MSG_2_FRAME7LEPROFILE2_MSK \ 3688 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE2_POS) 3689 #define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS (5) 3690 #define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_MSK \ 3691 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS) 3692 #define BT_UART_MSG_2_FRAME7RESERVED_POS (6) 3693 #define BT_UART_MSG_2_FRAME7RESERVED_MSK \ 3694 (0x3<<BT_UART_MSG_2_FRAME7RESERVED_POS) 3695 3696 3697 struct iwl_bt_uart_msg { 3698 u8 header; 3699 u8 frame1; 3700 u8 frame2; 3701 u8 frame3; 3702 u8 frame4; 3703 u8 frame5; 3704 u8 frame6; 3705 u8 frame7; 3706 } __attribute__((packed)); 3707 3708 struct iwl_bt_coex_profile_notif { 3709 struct iwl_bt_uart_msg last_bt_uart_msg; 3710 u8 bt_status; /* 0 - off, 1 - on */ 3711 u8 bt_traffic_load; /* 0 .. 3? */ 3712 u8 bt_ci_compliance; /* 0 - not complied, 1 - complied */ 3713 u8 reserved; 3714 } __attribute__((packed)); 3715 3716 #define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS 0 3717 #define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_MSK 0x1 3718 #define IWL_BT_COEX_PRIO_TBL_PRIO_POS 1 3719 #define IWL_BT_COEX_PRIO_TBL_PRIO_MASK 0x0e 3720 #define IWL_BT_COEX_PRIO_TBL_RESERVED_POS 4 3721 #define IWL_BT_COEX_PRIO_TBL_RESERVED_MASK 0xf0 3722 #define IWL_BT_COEX_PRIO_TBL_PRIO_SHIFT 1 3723 3724 /* 3725 * BT Coexistence Priority table 3726 * REPLY_BT_COEX_PRIO_TABLE = 0xcc 3727 */ 3728 enum bt_coex_prio_table_events { 3729 BT_COEX_PRIO_TBL_EVT_INIT_CALIB1 = 0, 3730 BT_COEX_PRIO_TBL_EVT_INIT_CALIB2 = 1, 3731 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW1 = 2, 3732 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW2 = 3, /* DC calib */ 3733 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH1 = 4, 3734 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH2 = 5, 3735 BT_COEX_PRIO_TBL_EVT_DTIM = 6, 3736 BT_COEX_PRIO_TBL_EVT_SCAN52 = 7, 3737 BT_COEX_PRIO_TBL_EVT_SCAN24 = 8, 3738 BT_COEX_PRIO_TBL_EVT_RESERVED0 = 9, 3739 BT_COEX_PRIO_TBL_EVT_RESERVED1 = 10, 3740 BT_COEX_PRIO_TBL_EVT_RESERVED2 = 11, 3741 BT_COEX_PRIO_TBL_EVT_RESERVED3 = 12, 3742 BT_COEX_PRIO_TBL_EVT_RESERVED4 = 13, 3743 BT_COEX_PRIO_TBL_EVT_RESERVED5 = 14, 3744 BT_COEX_PRIO_TBL_EVT_RESERVED6 = 15, 3745 /* BT_COEX_PRIO_TBL_EVT_MAX should always be last */ 3746 BT_COEX_PRIO_TBL_EVT_MAX, 3747 }; 3748 3749 enum bt_coex_prio_table_priorities { 3750 BT_COEX_PRIO_TBL_DISABLED = 0, 3751 BT_COEX_PRIO_TBL_PRIO_LOW = 1, 3752 BT_COEX_PRIO_TBL_PRIO_HIGH = 2, 3753 BT_COEX_PRIO_TBL_PRIO_BYPASS = 3, 3754 BT_COEX_PRIO_TBL_PRIO_COEX_OFF = 4, 3755 BT_COEX_PRIO_TBL_PRIO_COEX_ON = 5, 3756 BT_COEX_PRIO_TBL_PRIO_RSRVD1 = 6, 3757 BT_COEX_PRIO_TBL_PRIO_RSRVD2 = 7, 3758 BT_COEX_PRIO_TBL_MAX, 3759 }; 3760 3761 struct iwl_bt_coex_prio_table_cmd { 3762 u8 prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX]; 3763 } __attribute__((packed)); 3764 3765 #define IWL_BT_COEX_ENV_CLOSE 0 3766 #define IWL_BT_COEX_ENV_OPEN 1 3767 /* 3768 * BT Protection Envelope 3769 * REPLY_BT_COEX_PROT_ENV = 0xcd 3770 */ 3771 struct iwl_bt_coex_prot_env_cmd { 3772 u8 action; /* 0 = closed, 1 = open */ 3773 u8 type; /* 0 .. 15 */ 3774 u8 reserved[2]; 3775 } __attribute__((packed)); 3776 3777 /* 3778 * REPLY_D3_CONFIG 3779 */ 3780 enum iwlagn_d3_wakeup_filters { 3781 IWLAGN_D3_WAKEUP_RFKILL = BIT(0), 3782 IWLAGN_D3_WAKEUP_SYSASSERT = BIT(1), 3783 }; 3784 3785 struct iwlagn_d3_config_cmd { 3786 __le32 min_sleep_time; 3787 __le32 wakeup_flags; 3788 } __packed; 3789 3790 /* 3791 * REPLY_WOWLAN_PATTERNS 3792 */ 3793 #define IWLAGN_WOWLAN_MIN_PATTERN_LEN 16 3794 #define IWLAGN_WOWLAN_MAX_PATTERN_LEN 128 3795 3796 struct iwlagn_wowlan_pattern { 3797 u8 mask[IWLAGN_WOWLAN_MAX_PATTERN_LEN / 8]; 3798 u8 pattern[IWLAGN_WOWLAN_MAX_PATTERN_LEN]; 3799 u8 mask_size; 3800 u8 pattern_size; 3801 __le16 reserved; 3802 } __packed; 3803 3804 #define IWLAGN_WOWLAN_MAX_PATTERNS 20 3805 3806 struct iwlagn_wowlan_patterns_cmd { 3807 __le32 n_patterns; 3808 struct iwlagn_wowlan_pattern patterns[]; 3809 } __packed; 3810 3811 /* 3812 * REPLY_WOWLAN_WAKEUP_FILTER 3813 */ 3814 enum iwlagn_wowlan_wakeup_filters { 3815 IWLAGN_WOWLAN_WAKEUP_MAGIC_PACKET = BIT(0), 3816 IWLAGN_WOWLAN_WAKEUP_PATTERN_MATCH = BIT(1), 3817 IWLAGN_WOWLAN_WAKEUP_BEACON_MISS = BIT(2), 3818 IWLAGN_WOWLAN_WAKEUP_LINK_CHANGE = BIT(3), 3819 IWLAGN_WOWLAN_WAKEUP_GTK_REKEY_FAIL = BIT(4), 3820 IWLAGN_WOWLAN_WAKEUP_EAP_IDENT_REQ = BIT(5), 3821 IWLAGN_WOWLAN_WAKEUP_4WAY_HANDSHAKE = BIT(6), 3822 IWLAGN_WOWLAN_WAKEUP_ALWAYS = BIT(7), 3823 IWLAGN_WOWLAN_WAKEUP_ENABLE_NET_DETECT = BIT(8), 3824 }; 3825 3826 struct iwlagn_wowlan_wakeup_filter_cmd { 3827 __le32 enabled; 3828 __le16 non_qos_seq; 3829 __le16 reserved; 3830 __le16 qos_seq[8]; 3831 }; 3832 3833 /* 3834 * REPLY_WOWLAN_TSC_RSC_PARAMS 3835 */ 3836 #define IWLAGN_NUM_RSC 16 3837 3838 struct tkip_sc { 3839 __le16 iv16; 3840 __le16 pad; 3841 __le32 iv32; 3842 } __packed; 3843 3844 struct iwlagn_tkip_rsc_tsc { 3845 struct tkip_sc unicast_rsc[IWLAGN_NUM_RSC]; 3846 struct tkip_sc multicast_rsc[IWLAGN_NUM_RSC]; 3847 struct tkip_sc tsc; 3848 } __packed; 3849 3850 struct aes_sc { 3851 __le64 pn; 3852 } __packed; 3853 3854 struct iwlagn_aes_rsc_tsc { 3855 struct aes_sc unicast_rsc[IWLAGN_NUM_RSC]; 3856 struct aes_sc multicast_rsc[IWLAGN_NUM_RSC]; 3857 struct aes_sc tsc; 3858 } __packed; 3859 3860 union iwlagn_all_tsc_rsc { 3861 struct iwlagn_tkip_rsc_tsc tkip; 3862 struct iwlagn_aes_rsc_tsc aes; 3863 }; 3864 3865 struct iwlagn_wowlan_rsc_tsc_params_cmd { 3866 union iwlagn_all_tsc_rsc all_tsc_rsc; 3867 } __packed; 3868 3869 /* 3870 * REPLY_WOWLAN_TKIP_PARAMS 3871 */ 3872 #define IWLAGN_MIC_KEY_SIZE 8 3873 #define IWLAGN_P1K_SIZE 5 3874 struct iwlagn_mic_keys { 3875 u8 tx[IWLAGN_MIC_KEY_SIZE]; 3876 u8 rx_unicast[IWLAGN_MIC_KEY_SIZE]; 3877 u8 rx_mcast[IWLAGN_MIC_KEY_SIZE]; 3878 } __packed; 3879 3880 struct iwlagn_p1k_cache { 3881 __le16 p1k[IWLAGN_P1K_SIZE]; 3882 } __packed; 3883 3884 #define IWLAGN_NUM_RX_P1K_CACHE 2 3885 3886 struct iwlagn_wowlan_tkip_params_cmd { 3887 struct iwlagn_mic_keys mic_keys; 3888 struct iwlagn_p1k_cache tx; 3889 struct iwlagn_p1k_cache rx_uni[IWLAGN_NUM_RX_P1K_CACHE]; 3890 struct iwlagn_p1k_cache rx_multi[IWLAGN_NUM_RX_P1K_CACHE]; 3891 } __packed; 3892 3893 /* 3894 * REPLY_WOWLAN_KEK_KCK_MATERIAL 3895 */ 3896 3897 #define IWLAGN_KCK_MAX_SIZE 32 3898 #define IWLAGN_KEK_MAX_SIZE 32 3899 3900 struct iwlagn_wowlan_kek_kck_material_cmd { 3901 u8 kck[IWLAGN_KCK_MAX_SIZE]; 3902 u8 kek[IWLAGN_KEK_MAX_SIZE]; 3903 __le16 kck_len; 3904 __le16 kek_len; 3905 __le64 replay_ctr; 3906 } __packed; 3907 3908 /****************************************************************************** 3909 * (13) 3910 * Union of all expected notifications/responses: 3911 * 3912 *****************************************************************************/ 3913 #define FH_RSCSR_FRAME_SIZE_MSK (0x00003FFF) /* bits 0-13 */ 3914 3915 struct iwl_rx_packet { 3916 /* 3917 * The first 4 bytes of the RX frame header contain both the RX frame 3918 * size and some flags. 3919 * Bit fields: 3920 * 31: flag flush RB request 3921 * 30: flag ignore TC (terminal counter) request 3922 * 29: flag fast IRQ request 3923 * 28-14: Reserved 3924 * 13-00: RX frame size 3925 */ 3926 __le32 len_n_flags; 3927 struct iwl_cmd_header hdr; 3928 union { 3929 struct iwl_alive_resp alive_frame; 3930 struct iwl_spectrum_notification spectrum_notif; 3931 struct iwl_csa_notification csa_notif; 3932 struct iwl_error_resp err_resp; 3933 struct iwl_card_state_notif card_state_notif; 3934 struct iwl_add_sta_resp add_sta; 3935 struct iwl_rem_sta_resp rem_sta; 3936 struct iwl_sleep_notification sleep_notif; 3937 struct iwl_spectrum_resp spectrum; 3938 struct iwl_notif_statistics stats; 3939 struct iwl_bt_notif_statistics stats_bt; 3940 struct iwl_compressed_ba_resp compressed_ba; 3941 struct iwl_missed_beacon_notif missed_beacon; 3942 struct iwl_coex_medium_notification coex_medium_notif; 3943 struct iwl_coex_event_resp coex_event; 3944 struct iwl_bt_coex_profile_notif bt_coex_profile_notif; 3945 __le32 status; 3946 u8 raw[0]; 3947 } u; 3948 } __packed; 3949 3950 int iwl_agn_check_rxon_cmd(struct iwl_priv *priv); 3951 3952 /* 3953 * REPLY_WIPAN_PARAMS = 0xb2 (Commands and Notification) 3954 */ 3955 3956 /* 3957 * Minimum slot time in TU 3958 */ 3959 #define IWL_MIN_SLOT_TIME 20 3960 3961 /** 3962 * struct iwl_wipan_slot 3963 * @width: Time in TU 3964 * @type: 3965 * 0 - BSS 3966 * 1 - PAN 3967 */ 3968 struct iwl_wipan_slot { 3969 __le16 width; 3970 u8 type; 3971 u8 reserved; 3972 } __packed; 3973 3974 #define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_CTS BIT(1) /* reserved */ 3975 #define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_QUIET BIT(2) /* reserved */ 3976 #define IWL_WIPAN_PARAMS_FLG_SLOTTED_MODE BIT(3) /* reserved */ 3977 #define IWL_WIPAN_PARAMS_FLG_FILTER_BEACON_NOTIF BIT(4) 3978 #define IWL_WIPAN_PARAMS_FLG_FULL_SLOTTED_MODE BIT(5) 3979 3980 /** 3981 * struct iwl_wipan_params_cmd 3982 * @flags: 3983 * bit0: reserved 3984 * bit1: CP leave channel with CTS 3985 * bit2: CP leave channel qith Quiet 3986 * bit3: slotted mode 3987 * 1 - work in slotted mode 3988 * 0 - work in non slotted mode 3989 * bit4: filter beacon notification 3990 * bit5: full tx slotted mode. if this flag is set, 3991 * uCode will perform leaving channel methods in context switch 3992 * also when working in same channel mode 3993 * @num_slots: 1 - 10 3994 */ 3995 struct iwl_wipan_params_cmd { 3996 __le16 flags; 3997 u8 reserved; 3998 u8 num_slots; 3999 struct iwl_wipan_slot slots[10]; 4000 } __packed; 4001 4002 /* 4003 * REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9 4004 * 4005 * TODO: Figure out what this is used for, 4006 * it can only switch between 2.4 GHz 4007 * channels!! 4008 */ 4009 4010 struct iwl_wipan_p2p_channel_switch_cmd { 4011 __le16 channel; 4012 __le16 reserved; 4013 }; 4014 4015 /* 4016 * REPLY_WIPAN_NOA_NOTIFICATION = 0xbc 4017 * 4018 * This is used by the device to notify us of the 4019 * NoA schedule it determined so we can forward it 4020 * to userspace for inclusion in probe responses. 4021 * 4022 * In beacons, the NoA schedule is simply appended 4023 * to the frame we give the device. 4024 */ 4025 4026 struct iwl_wipan_noa_descriptor { 4027 u8 count; 4028 __le32 duration; 4029 __le32 interval; 4030 __le32 starttime; 4031 } __packed; 4032 4033 struct iwl_wipan_noa_attribute { 4034 u8 id; 4035 __le16 length; 4036 u8 index; 4037 u8 ct_window; 4038 struct iwl_wipan_noa_descriptor descr0, descr1; 4039 u8 reserved; 4040 } __packed; 4041 4042 struct iwl_wipan_noa_notification { 4043 u32 noa_active; 4044 struct iwl_wipan_noa_attribute noa_attribute; 4045 } __packed; 4046 4047 #endif /* __iwl_commands_h__ */ 4048