1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2011 Solarflare Communications Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
10
11 #include <linux/socket.h>
12 #include <linux/in.h>
13 #include <linux/slab.h>
14 #include <linux/ip.h>
15 #include <linux/tcp.h>
16 #include <linux/udp.h>
17 #include <linux/prefetch.h>
18 #include <linux/moduleparam.h>
19 #include <net/ip.h>
20 #include <net/checksum.h>
21 #include "net_driver.h"
22 #include "efx.h"
23 #include "nic.h"
24 #include "selftest.h"
25 #include "workarounds.h"
26
27 /* Number of RX descriptors pushed at once. */
28 #define EFX_RX_BATCH 8
29
30 /* Maximum size of a buffer sharing a page */
31 #define EFX_RX_HALF_PAGE ((PAGE_SIZE >> 1) - sizeof(struct efx_rx_page_state))
32
33 /* Size of buffer allocated for skb header area. */
34 #define EFX_SKB_HEADERS 64u
35
36 /*
37 * rx_alloc_method - RX buffer allocation method
38 *
39 * This driver supports two methods for allocating and using RX buffers:
40 * each RX buffer may be backed by an skb or by an order-n page.
41 *
42 * When GRO is in use then the second method has a lower overhead,
43 * since we don't have to allocate then free skbs on reassembled frames.
44 *
45 * Values:
46 * - RX_ALLOC_METHOD_AUTO = 0
47 * - RX_ALLOC_METHOD_SKB = 1
48 * - RX_ALLOC_METHOD_PAGE = 2
49 *
50 * The heuristic for %RX_ALLOC_METHOD_AUTO is a simple hysteresis count
51 * controlled by the parameters below.
52 *
53 * - Since pushing and popping descriptors are separated by the rx_queue
54 * size, so the watermarks should be ~rxd_size.
55 * - The performance win by using page-based allocation for GRO is less
56 * than the performance hit of using page-based allocation of non-GRO,
57 * so the watermarks should reflect this.
58 *
59 * Per channel we maintain a single variable, updated by each channel:
60 *
61 * rx_alloc_level += (gro_performed ? RX_ALLOC_FACTOR_GRO :
62 * RX_ALLOC_FACTOR_SKB)
63 * Per NAPI poll interval, we constrain rx_alloc_level to 0..MAX (which
64 * limits the hysteresis), and update the allocation strategy:
65 *
66 * rx_alloc_method = (rx_alloc_level > RX_ALLOC_LEVEL_GRO ?
67 * RX_ALLOC_METHOD_PAGE : RX_ALLOC_METHOD_SKB)
68 */
69 static int rx_alloc_method = RX_ALLOC_METHOD_AUTO;
70
71 #define RX_ALLOC_LEVEL_GRO 0x2000
72 #define RX_ALLOC_LEVEL_MAX 0x3000
73 #define RX_ALLOC_FACTOR_GRO 1
74 #define RX_ALLOC_FACTOR_SKB (-2)
75
76 /* This is the percentage fill level below which new RX descriptors
77 * will be added to the RX descriptor ring.
78 */
79 static unsigned int rx_refill_threshold = 90;
80
81 /* This is the percentage fill level to which an RX queue will be refilled
82 * when the "RX refill threshold" is reached.
83 */
84 static unsigned int rx_refill_limit = 95;
85
86 /*
87 * RX maximum head room required.
88 *
89 * This must be at least 1 to prevent overflow and at least 2 to allow
90 * pipelined receives.
91 */
92 #define EFX_RXD_HEAD_ROOM 2
93
94 /* Offset of ethernet header within page */
efx_rx_buf_offset(struct efx_nic * efx,struct efx_rx_buffer * buf)95 static inline unsigned int efx_rx_buf_offset(struct efx_nic *efx,
96 struct efx_rx_buffer *buf)
97 {
98 /* Offset is always within one page, so we don't need to consider
99 * the page order.
100 */
101 return (((__force unsigned long) buf->dma_addr & (PAGE_SIZE - 1)) +
102 efx->type->rx_buffer_hash_size);
103 }
efx_rx_buf_size(struct efx_nic * efx)104 static inline unsigned int efx_rx_buf_size(struct efx_nic *efx)
105 {
106 return PAGE_SIZE << efx->rx_buffer_order;
107 }
108
efx_rx_buf_eh(struct efx_nic * efx,struct efx_rx_buffer * buf)109 static u8 *efx_rx_buf_eh(struct efx_nic *efx, struct efx_rx_buffer *buf)
110 {
111 if (buf->is_page)
112 return page_address(buf->u.page) + efx_rx_buf_offset(efx, buf);
113 else
114 return ((u8 *)buf->u.skb->data +
115 efx->type->rx_buffer_hash_size);
116 }
117
efx_rx_buf_hash(const u8 * eh)118 static inline u32 efx_rx_buf_hash(const u8 *eh)
119 {
120 /* The ethernet header is always directly after any hash. */
121 #if defined(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS) || NET_IP_ALIGN % 4 == 0
122 return __le32_to_cpup((const __le32 *)(eh - 4));
123 #else
124 const u8 *data = eh - 4;
125 return ((u32)data[0] |
126 (u32)data[1] << 8 |
127 (u32)data[2] << 16 |
128 (u32)data[3] << 24);
129 #endif
130 }
131
132 /**
133 * efx_init_rx_buffers_skb - create EFX_RX_BATCH skb-based RX buffers
134 *
135 * @rx_queue: Efx RX queue
136 *
137 * This allocates EFX_RX_BATCH skbs, maps them for DMA, and populates a
138 * struct efx_rx_buffer for each one. Return a negative error code or 0
139 * on success. May fail having only inserted fewer than EFX_RX_BATCH
140 * buffers.
141 */
efx_init_rx_buffers_skb(struct efx_rx_queue * rx_queue)142 static int efx_init_rx_buffers_skb(struct efx_rx_queue *rx_queue)
143 {
144 struct efx_nic *efx = rx_queue->efx;
145 struct net_device *net_dev = efx->net_dev;
146 struct efx_rx_buffer *rx_buf;
147 struct sk_buff *skb;
148 int skb_len = efx->rx_buffer_len;
149 unsigned index, count;
150
151 for (count = 0; count < EFX_RX_BATCH; ++count) {
152 index = rx_queue->added_count & rx_queue->ptr_mask;
153 rx_buf = efx_rx_buffer(rx_queue, index);
154
155 rx_buf->u.skb = skb = netdev_alloc_skb(net_dev, skb_len);
156 if (unlikely(!skb))
157 return -ENOMEM;
158
159 /* Adjust the SKB for padding */
160 skb_reserve(skb, NET_IP_ALIGN);
161 rx_buf->len = skb_len - NET_IP_ALIGN;
162 rx_buf->is_page = false;
163
164 rx_buf->dma_addr = pci_map_single(efx->pci_dev,
165 skb->data, rx_buf->len,
166 PCI_DMA_FROMDEVICE);
167 if (unlikely(pci_dma_mapping_error(efx->pci_dev,
168 rx_buf->dma_addr))) {
169 dev_kfree_skb_any(skb);
170 rx_buf->u.skb = NULL;
171 return -EIO;
172 }
173
174 ++rx_queue->added_count;
175 ++rx_queue->alloc_skb_count;
176 }
177
178 return 0;
179 }
180
181 /**
182 * efx_init_rx_buffers_page - create EFX_RX_BATCH page-based RX buffers
183 *
184 * @rx_queue: Efx RX queue
185 *
186 * This allocates memory for EFX_RX_BATCH receive buffers, maps them for DMA,
187 * and populates struct efx_rx_buffers for each one. Return a negative error
188 * code or 0 on success. If a single page can be split between two buffers,
189 * then the page will either be inserted fully, or not at at all.
190 */
efx_init_rx_buffers_page(struct efx_rx_queue * rx_queue)191 static int efx_init_rx_buffers_page(struct efx_rx_queue *rx_queue)
192 {
193 struct efx_nic *efx = rx_queue->efx;
194 struct efx_rx_buffer *rx_buf;
195 struct page *page;
196 void *page_addr;
197 struct efx_rx_page_state *state;
198 dma_addr_t dma_addr;
199 unsigned index, count;
200
201 /* We can split a page between two buffers */
202 BUILD_BUG_ON(EFX_RX_BATCH & 1);
203
204 for (count = 0; count < EFX_RX_BATCH; ++count) {
205 page = alloc_pages(__GFP_COLD | __GFP_COMP | GFP_ATOMIC,
206 efx->rx_buffer_order);
207 if (unlikely(page == NULL))
208 return -ENOMEM;
209 dma_addr = pci_map_page(efx->pci_dev, page, 0,
210 efx_rx_buf_size(efx),
211 PCI_DMA_FROMDEVICE);
212 if (unlikely(pci_dma_mapping_error(efx->pci_dev, dma_addr))) {
213 __free_pages(page, efx->rx_buffer_order);
214 return -EIO;
215 }
216 page_addr = page_address(page);
217 state = page_addr;
218 state->refcnt = 0;
219 state->dma_addr = dma_addr;
220
221 page_addr += sizeof(struct efx_rx_page_state);
222 dma_addr += sizeof(struct efx_rx_page_state);
223
224 split:
225 index = rx_queue->added_count & rx_queue->ptr_mask;
226 rx_buf = efx_rx_buffer(rx_queue, index);
227 rx_buf->dma_addr = dma_addr + EFX_PAGE_IP_ALIGN;
228 rx_buf->u.page = page;
229 rx_buf->len = efx->rx_buffer_len - EFX_PAGE_IP_ALIGN;
230 rx_buf->is_page = true;
231 ++rx_queue->added_count;
232 ++rx_queue->alloc_page_count;
233 ++state->refcnt;
234
235 if ((~count & 1) && (efx->rx_buffer_len <= EFX_RX_HALF_PAGE)) {
236 /* Use the second half of the page */
237 get_page(page);
238 dma_addr += (PAGE_SIZE >> 1);
239 page_addr += (PAGE_SIZE >> 1);
240 ++count;
241 goto split;
242 }
243 }
244
245 return 0;
246 }
247
efx_unmap_rx_buffer(struct efx_nic * efx,struct efx_rx_buffer * rx_buf)248 static void efx_unmap_rx_buffer(struct efx_nic *efx,
249 struct efx_rx_buffer *rx_buf)
250 {
251 if (rx_buf->is_page && rx_buf->u.page) {
252 struct efx_rx_page_state *state;
253
254 state = page_address(rx_buf->u.page);
255 if (--state->refcnt == 0) {
256 pci_unmap_page(efx->pci_dev,
257 state->dma_addr,
258 efx_rx_buf_size(efx),
259 PCI_DMA_FROMDEVICE);
260 }
261 } else if (!rx_buf->is_page && rx_buf->u.skb) {
262 pci_unmap_single(efx->pci_dev, rx_buf->dma_addr,
263 rx_buf->len, PCI_DMA_FROMDEVICE);
264 }
265 }
266
efx_free_rx_buffer(struct efx_nic * efx,struct efx_rx_buffer * rx_buf)267 static void efx_free_rx_buffer(struct efx_nic *efx,
268 struct efx_rx_buffer *rx_buf)
269 {
270 if (rx_buf->is_page && rx_buf->u.page) {
271 __free_pages(rx_buf->u.page, efx->rx_buffer_order);
272 rx_buf->u.page = NULL;
273 } else if (!rx_buf->is_page && rx_buf->u.skb) {
274 dev_kfree_skb_any(rx_buf->u.skb);
275 rx_buf->u.skb = NULL;
276 }
277 }
278
efx_fini_rx_buffer(struct efx_rx_queue * rx_queue,struct efx_rx_buffer * rx_buf)279 static void efx_fini_rx_buffer(struct efx_rx_queue *rx_queue,
280 struct efx_rx_buffer *rx_buf)
281 {
282 efx_unmap_rx_buffer(rx_queue->efx, rx_buf);
283 efx_free_rx_buffer(rx_queue->efx, rx_buf);
284 }
285
286 /* Attempt to resurrect the other receive buffer that used to share this page,
287 * which had previously been passed up to the kernel and freed. */
efx_resurrect_rx_buffer(struct efx_rx_queue * rx_queue,struct efx_rx_buffer * rx_buf)288 static void efx_resurrect_rx_buffer(struct efx_rx_queue *rx_queue,
289 struct efx_rx_buffer *rx_buf)
290 {
291 struct efx_rx_page_state *state = page_address(rx_buf->u.page);
292 struct efx_rx_buffer *new_buf;
293 unsigned fill_level, index;
294
295 /* +1 because efx_rx_packet() incremented removed_count. +1 because
296 * we'd like to insert an additional descriptor whilst leaving
297 * EFX_RXD_HEAD_ROOM for the non-recycle path */
298 fill_level = (rx_queue->added_count - rx_queue->removed_count + 2);
299 if (unlikely(fill_level > rx_queue->max_fill)) {
300 /* We could place "state" on a list, and drain the list in
301 * efx_fast_push_rx_descriptors(). For now, this will do. */
302 return;
303 }
304
305 ++state->refcnt;
306 get_page(rx_buf->u.page);
307
308 index = rx_queue->added_count & rx_queue->ptr_mask;
309 new_buf = efx_rx_buffer(rx_queue, index);
310 new_buf->dma_addr = rx_buf->dma_addr ^ (PAGE_SIZE >> 1);
311 new_buf->u.page = rx_buf->u.page;
312 new_buf->len = rx_buf->len;
313 new_buf->is_page = true;
314 ++rx_queue->added_count;
315 }
316
317 /* Recycle the given rx buffer directly back into the rx_queue. There is
318 * always room to add this buffer, because we've just popped a buffer. */
efx_recycle_rx_buffer(struct efx_channel * channel,struct efx_rx_buffer * rx_buf)319 static void efx_recycle_rx_buffer(struct efx_channel *channel,
320 struct efx_rx_buffer *rx_buf)
321 {
322 struct efx_nic *efx = channel->efx;
323 struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
324 struct efx_rx_buffer *new_buf;
325 unsigned index;
326
327 if (rx_buf->is_page && efx->rx_buffer_len <= EFX_RX_HALF_PAGE &&
328 page_count(rx_buf->u.page) == 1)
329 efx_resurrect_rx_buffer(rx_queue, rx_buf);
330
331 index = rx_queue->added_count & rx_queue->ptr_mask;
332 new_buf = efx_rx_buffer(rx_queue, index);
333
334 memcpy(new_buf, rx_buf, sizeof(*new_buf));
335 rx_buf->u.page = NULL;
336 ++rx_queue->added_count;
337 }
338
339 /**
340 * efx_fast_push_rx_descriptors - push new RX descriptors quickly
341 * @rx_queue: RX descriptor queue
342 * This will aim to fill the RX descriptor queue up to
343 * @rx_queue->@fast_fill_limit. If there is insufficient atomic
344 * memory to do so, a slow fill will be scheduled.
345 *
346 * The caller must provide serialisation (none is used here). In practise,
347 * this means this function must run from the NAPI handler, or be called
348 * when NAPI is disabled.
349 */
efx_fast_push_rx_descriptors(struct efx_rx_queue * rx_queue)350 void efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue)
351 {
352 struct efx_channel *channel = efx_rx_queue_channel(rx_queue);
353 unsigned fill_level;
354 int space, rc = 0;
355
356 /* Calculate current fill level, and exit if we don't need to fill */
357 fill_level = (rx_queue->added_count - rx_queue->removed_count);
358 EFX_BUG_ON_PARANOID(fill_level > rx_queue->efx->rxq_entries);
359 if (fill_level >= rx_queue->fast_fill_trigger)
360 goto out;
361
362 /* Record minimum fill level */
363 if (unlikely(fill_level < rx_queue->min_fill)) {
364 if (fill_level)
365 rx_queue->min_fill = fill_level;
366 }
367
368 space = rx_queue->fast_fill_limit - fill_level;
369 if (space < EFX_RX_BATCH)
370 goto out;
371
372 netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
373 "RX queue %d fast-filling descriptor ring from"
374 " level %d to level %d using %s allocation\n",
375 efx_rx_queue_index(rx_queue), fill_level,
376 rx_queue->fast_fill_limit,
377 channel->rx_alloc_push_pages ? "page" : "skb");
378
379 do {
380 if (channel->rx_alloc_push_pages)
381 rc = efx_init_rx_buffers_page(rx_queue);
382 else
383 rc = efx_init_rx_buffers_skb(rx_queue);
384 if (unlikely(rc)) {
385 /* Ensure that we don't leave the rx queue empty */
386 if (rx_queue->added_count == rx_queue->removed_count)
387 efx_schedule_slow_fill(rx_queue);
388 goto out;
389 }
390 } while ((space -= EFX_RX_BATCH) >= EFX_RX_BATCH);
391
392 netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
393 "RX queue %d fast-filled descriptor ring "
394 "to level %d\n", efx_rx_queue_index(rx_queue),
395 rx_queue->added_count - rx_queue->removed_count);
396
397 out:
398 if (rx_queue->notified_count != rx_queue->added_count)
399 efx_nic_notify_rx_desc(rx_queue);
400 }
401
efx_rx_slow_fill(unsigned long context)402 void efx_rx_slow_fill(unsigned long context)
403 {
404 struct efx_rx_queue *rx_queue = (struct efx_rx_queue *)context;
405 struct efx_channel *channel = efx_rx_queue_channel(rx_queue);
406
407 /* Post an event to cause NAPI to run and refill the queue */
408 efx_nic_generate_fill_event(channel);
409 ++rx_queue->slow_fill_count;
410 }
411
efx_rx_packet__check_len(struct efx_rx_queue * rx_queue,struct efx_rx_buffer * rx_buf,int len,bool * discard,bool * leak_packet)412 static void efx_rx_packet__check_len(struct efx_rx_queue *rx_queue,
413 struct efx_rx_buffer *rx_buf,
414 int len, bool *discard,
415 bool *leak_packet)
416 {
417 struct efx_nic *efx = rx_queue->efx;
418 unsigned max_len = rx_buf->len - efx->type->rx_buffer_padding;
419
420 if (likely(len <= max_len))
421 return;
422
423 /* The packet must be discarded, but this is only a fatal error
424 * if the caller indicated it was
425 */
426 *discard = true;
427
428 if ((len > rx_buf->len) && EFX_WORKAROUND_8071(efx)) {
429 if (net_ratelimit())
430 netif_err(efx, rx_err, efx->net_dev,
431 " RX queue %d seriously overlength "
432 "RX event (0x%x > 0x%x+0x%x). Leaking\n",
433 efx_rx_queue_index(rx_queue), len, max_len,
434 efx->type->rx_buffer_padding);
435 /* If this buffer was skb-allocated, then the meta
436 * data at the end of the skb will be trashed. So
437 * we have no choice but to leak the fragment.
438 */
439 *leak_packet = !rx_buf->is_page;
440 efx_schedule_reset(efx, RESET_TYPE_RX_RECOVERY);
441 } else {
442 if (net_ratelimit())
443 netif_err(efx, rx_err, efx->net_dev,
444 " RX queue %d overlength RX event "
445 "(0x%x > 0x%x)\n",
446 efx_rx_queue_index(rx_queue), len, max_len);
447 }
448
449 efx_rx_queue_channel(rx_queue)->n_rx_overlength++;
450 }
451
452 /* Pass a received packet up through the generic GRO stack
453 *
454 * Handles driverlink veto, and passes the fragment up via
455 * the appropriate GRO method
456 */
efx_rx_packet_gro(struct efx_channel * channel,struct efx_rx_buffer * rx_buf,const u8 * eh,bool checksummed)457 static void efx_rx_packet_gro(struct efx_channel *channel,
458 struct efx_rx_buffer *rx_buf,
459 const u8 *eh, bool checksummed)
460 {
461 struct napi_struct *napi = &channel->napi_str;
462 gro_result_t gro_result;
463
464 /* Pass the skb/page into the GRO engine */
465 if (rx_buf->is_page) {
466 struct efx_nic *efx = channel->efx;
467 struct page *page = rx_buf->u.page;
468 struct sk_buff *skb;
469
470 rx_buf->u.page = NULL;
471
472 skb = napi_get_frags(napi);
473 if (!skb) {
474 put_page(page);
475 return;
476 }
477
478 if (efx->net_dev->features & NETIF_F_RXHASH)
479 skb->rxhash = efx_rx_buf_hash(eh);
480
481 skb_fill_page_desc(skb, 0, page,
482 efx_rx_buf_offset(efx, rx_buf), rx_buf->len);
483
484 skb->len = rx_buf->len;
485 skb->data_len = rx_buf->len;
486 skb->truesize += rx_buf->len;
487 skb->ip_summed =
488 checksummed ? CHECKSUM_UNNECESSARY : CHECKSUM_NONE;
489
490 skb_record_rx_queue(skb, channel->channel);
491
492 gro_result = napi_gro_frags(napi);
493 } else {
494 struct sk_buff *skb = rx_buf->u.skb;
495
496 EFX_BUG_ON_PARANOID(!checksummed);
497 rx_buf->u.skb = NULL;
498 skb->ip_summed = CHECKSUM_UNNECESSARY;
499
500 gro_result = napi_gro_receive(napi, skb);
501 }
502
503 if (gro_result == GRO_NORMAL) {
504 channel->rx_alloc_level += RX_ALLOC_FACTOR_SKB;
505 } else if (gro_result != GRO_DROP) {
506 channel->rx_alloc_level += RX_ALLOC_FACTOR_GRO;
507 channel->irq_mod_score += 2;
508 }
509 }
510
efx_rx_packet(struct efx_rx_queue * rx_queue,unsigned int index,unsigned int len,bool checksummed,bool discard)511 void efx_rx_packet(struct efx_rx_queue *rx_queue, unsigned int index,
512 unsigned int len, bool checksummed, bool discard)
513 {
514 struct efx_nic *efx = rx_queue->efx;
515 struct efx_channel *channel = efx_rx_queue_channel(rx_queue);
516 struct efx_rx_buffer *rx_buf;
517 bool leak_packet = false;
518
519 rx_buf = efx_rx_buffer(rx_queue, index);
520
521 /* This allows the refill path to post another buffer.
522 * EFX_RXD_HEAD_ROOM ensures that the slot we are using
523 * isn't overwritten yet.
524 */
525 rx_queue->removed_count++;
526
527 /* Validate the length encoded in the event vs the descriptor pushed */
528 efx_rx_packet__check_len(rx_queue, rx_buf, len,
529 &discard, &leak_packet);
530
531 netif_vdbg(efx, rx_status, efx->net_dev,
532 "RX queue %d received id %x at %llx+%x %s%s\n",
533 efx_rx_queue_index(rx_queue), index,
534 (unsigned long long)rx_buf->dma_addr, len,
535 (checksummed ? " [SUMMED]" : ""),
536 (discard ? " [DISCARD]" : ""));
537
538 /* Discard packet, if instructed to do so */
539 if (unlikely(discard)) {
540 if (unlikely(leak_packet))
541 channel->n_skbuff_leaks++;
542 else
543 efx_recycle_rx_buffer(channel, rx_buf);
544
545 /* Don't hold off the previous receive */
546 rx_buf = NULL;
547 goto out;
548 }
549
550 /* Release card resources - assumes all RX buffers consumed in-order
551 * per RX queue
552 */
553 efx_unmap_rx_buffer(efx, rx_buf);
554
555 /* Prefetch nice and early so data will (hopefully) be in cache by
556 * the time we look at it.
557 */
558 prefetch(efx_rx_buf_eh(efx, rx_buf));
559
560 /* Pipeline receives so that we give time for packet headers to be
561 * prefetched into cache.
562 */
563 rx_buf->len = len - efx->type->rx_buffer_hash_size;
564 out:
565 if (channel->rx_pkt)
566 __efx_rx_packet(channel,
567 channel->rx_pkt, channel->rx_pkt_csummed);
568 channel->rx_pkt = rx_buf;
569 channel->rx_pkt_csummed = checksummed;
570 }
571
572 /* Handle a received packet. Second half: Touches packet payload. */
__efx_rx_packet(struct efx_channel * channel,struct efx_rx_buffer * rx_buf,bool checksummed)573 void __efx_rx_packet(struct efx_channel *channel,
574 struct efx_rx_buffer *rx_buf, bool checksummed)
575 {
576 struct efx_nic *efx = channel->efx;
577 struct sk_buff *skb;
578 u8 *eh = efx_rx_buf_eh(efx, rx_buf);
579
580 /* If we're in loopback test, then pass the packet directly to the
581 * loopback layer, and free the rx_buf here
582 */
583 if (unlikely(efx->loopback_selftest)) {
584 efx_loopback_rx_packet(efx, eh, rx_buf->len);
585 efx_free_rx_buffer(efx, rx_buf);
586 return;
587 }
588
589 if (!rx_buf->is_page) {
590 skb = rx_buf->u.skb;
591
592 prefetch(skb_shinfo(skb));
593
594 skb_reserve(skb, efx->type->rx_buffer_hash_size);
595 skb_put(skb, rx_buf->len);
596
597 if (efx->net_dev->features & NETIF_F_RXHASH)
598 skb->rxhash = efx_rx_buf_hash(eh);
599
600 /* Move past the ethernet header. rx_buf->data still points
601 * at the ethernet header */
602 skb->protocol = eth_type_trans(skb, efx->net_dev);
603
604 skb_record_rx_queue(skb, channel->channel);
605 }
606
607 if (unlikely(!(efx->net_dev->features & NETIF_F_RXCSUM)))
608 checksummed = false;
609
610 if (likely(checksummed || rx_buf->is_page)) {
611 efx_rx_packet_gro(channel, rx_buf, eh, checksummed);
612 return;
613 }
614
615 /* We now own the SKB */
616 skb = rx_buf->u.skb;
617 rx_buf->u.skb = NULL;
618
619 /* Set the SKB flags */
620 skb_checksum_none_assert(skb);
621
622 /* Pass the packet up */
623 netif_receive_skb(skb);
624
625 /* Update allocation strategy method */
626 channel->rx_alloc_level += RX_ALLOC_FACTOR_SKB;
627 }
628
efx_rx_strategy(struct efx_channel * channel)629 void efx_rx_strategy(struct efx_channel *channel)
630 {
631 enum efx_rx_alloc_method method = rx_alloc_method;
632
633 /* Only makes sense to use page based allocation if GRO is enabled */
634 if (!(channel->efx->net_dev->features & NETIF_F_GRO)) {
635 method = RX_ALLOC_METHOD_SKB;
636 } else if (method == RX_ALLOC_METHOD_AUTO) {
637 /* Constrain the rx_alloc_level */
638 if (channel->rx_alloc_level < 0)
639 channel->rx_alloc_level = 0;
640 else if (channel->rx_alloc_level > RX_ALLOC_LEVEL_MAX)
641 channel->rx_alloc_level = RX_ALLOC_LEVEL_MAX;
642
643 /* Decide on the allocation method */
644 method = ((channel->rx_alloc_level > RX_ALLOC_LEVEL_GRO) ?
645 RX_ALLOC_METHOD_PAGE : RX_ALLOC_METHOD_SKB);
646 }
647
648 /* Push the option */
649 channel->rx_alloc_push_pages = (method == RX_ALLOC_METHOD_PAGE);
650 }
651
efx_probe_rx_queue(struct efx_rx_queue * rx_queue)652 int efx_probe_rx_queue(struct efx_rx_queue *rx_queue)
653 {
654 struct efx_nic *efx = rx_queue->efx;
655 unsigned int entries;
656 int rc;
657
658 /* Create the smallest power-of-two aligned ring */
659 entries = max(roundup_pow_of_two(efx->rxq_entries), EFX_MIN_DMAQ_SIZE);
660 EFX_BUG_ON_PARANOID(entries > EFX_MAX_DMAQ_SIZE);
661 rx_queue->ptr_mask = entries - 1;
662
663 netif_dbg(efx, probe, efx->net_dev,
664 "creating RX queue %d size %#x mask %#x\n",
665 efx_rx_queue_index(rx_queue), efx->rxq_entries,
666 rx_queue->ptr_mask);
667
668 /* Allocate RX buffers */
669 rx_queue->buffer = kcalloc(entries, sizeof(*rx_queue->buffer),
670 GFP_KERNEL);
671 if (!rx_queue->buffer)
672 return -ENOMEM;
673
674 rc = efx_nic_probe_rx(rx_queue);
675 if (rc) {
676 kfree(rx_queue->buffer);
677 rx_queue->buffer = NULL;
678 }
679 return rc;
680 }
681
efx_init_rx_queue(struct efx_rx_queue * rx_queue)682 void efx_init_rx_queue(struct efx_rx_queue *rx_queue)
683 {
684 struct efx_nic *efx = rx_queue->efx;
685 unsigned int max_fill, trigger, limit;
686
687 netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
688 "initialising RX queue %d\n", efx_rx_queue_index(rx_queue));
689
690 /* Initialise ptr fields */
691 rx_queue->added_count = 0;
692 rx_queue->notified_count = 0;
693 rx_queue->removed_count = 0;
694 rx_queue->min_fill = -1U;
695
696 /* Initialise limit fields */
697 max_fill = efx->rxq_entries - EFX_RXD_HEAD_ROOM;
698 trigger = max_fill * min(rx_refill_threshold, 100U) / 100U;
699 limit = max_fill * min(rx_refill_limit, 100U) / 100U;
700
701 rx_queue->max_fill = max_fill;
702 rx_queue->fast_fill_trigger = trigger;
703 rx_queue->fast_fill_limit = limit;
704
705 /* Set up RX descriptor ring */
706 efx_nic_init_rx(rx_queue);
707 }
708
efx_fini_rx_queue(struct efx_rx_queue * rx_queue)709 void efx_fini_rx_queue(struct efx_rx_queue *rx_queue)
710 {
711 int i;
712 struct efx_rx_buffer *rx_buf;
713
714 netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
715 "shutting down RX queue %d\n", efx_rx_queue_index(rx_queue));
716
717 del_timer_sync(&rx_queue->slow_fill);
718 efx_nic_fini_rx(rx_queue);
719
720 /* Release RX buffers NB start at index 0 not current HW ptr */
721 if (rx_queue->buffer) {
722 for (i = 0; i <= rx_queue->ptr_mask; i++) {
723 rx_buf = efx_rx_buffer(rx_queue, i);
724 efx_fini_rx_buffer(rx_queue, rx_buf);
725 }
726 }
727 }
728
efx_remove_rx_queue(struct efx_rx_queue * rx_queue)729 void efx_remove_rx_queue(struct efx_rx_queue *rx_queue)
730 {
731 netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
732 "destroying RX queue %d\n", efx_rx_queue_index(rx_queue));
733
734 efx_nic_remove_rx(rx_queue);
735
736 kfree(rx_queue->buffer);
737 rx_queue->buffer = NULL;
738 }
739
740
741 module_param(rx_alloc_method, int, 0644);
742 MODULE_PARM_DESC(rx_alloc_method, "Allocation method used for RX buffers");
743
744 module_param(rx_refill_threshold, uint, 0444);
745 MODULE_PARM_DESC(rx_refill_threshold,
746 "RX descriptor ring fast/slow fill threshold (%)");
747
748