1 /* 2 * drivers/mtd/nandids.c 3 * 4 * Copyright (C) 2002 Thomas Gleixner (tglx@linutronix.de) 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 */ 11 #include <linux/module.h> 12 #include <linux/mtd/nand.h> 13 /* 14 * Chip ID list 15 * 16 * Name. ID code, pagesize, chipsize in MegaByte, eraseblock size, 17 * options 18 * 19 * Pagesize; 0, 256, 512 20 * 0 get this information from the extended chip ID 21 + 256 256 Byte page size 22 * 512 512 Byte page size 23 */ 24 struct nand_flash_dev nand_flash_ids[] = { 25 26 #ifdef CONFIG_MTD_NAND_MUSEUM_IDS 27 {"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, 0}, 28 {"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, 0}, 29 {"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, 0}, 30 {"NAND 1MiB 3,3V 8-bit", 0xe8, 256, 1, 0x1000, 0}, 31 {"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, 0}, 32 {"NAND 2MiB 3,3V 8-bit", 0xea, 256, 2, 0x1000, 0}, 33 {"NAND 4MiB 3,3V 8-bit", 0xd5, 512, 4, 0x2000, 0}, 34 {"NAND 4MiB 3,3V 8-bit", 0xe3, 512, 4, 0x2000, 0}, 35 {"NAND 4MiB 3,3V 8-bit", 0xe5, 512, 4, 0x2000, 0}, 36 {"NAND 8MiB 3,3V 8-bit", 0xd6, 512, 8, 0x2000, 0}, 37 38 {"NAND 8MiB 1,8V 8-bit", 0x39, 512, 8, 0x2000, 0}, 39 {"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, 0}, 40 {"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16}, 41 {"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16}, 42 #endif 43 44 {"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, 0}, 45 {"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, 0}, 46 {"NAND 16MiB 1,8V 16-bit", 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16}, 47 {"NAND 16MiB 3,3V 16-bit", 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16}, 48 49 {"NAND 32MiB 1,8V 8-bit", 0x35, 512, 32, 0x4000, 0}, 50 {"NAND 32MiB 3,3V 8-bit", 0x75, 512, 32, 0x4000, 0}, 51 {"NAND 32MiB 1,8V 16-bit", 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16}, 52 {"NAND 32MiB 3,3V 16-bit", 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16}, 53 54 {"NAND 64MiB 1,8V 8-bit", 0x36, 512, 64, 0x4000, 0}, 55 {"NAND 64MiB 3,3V 8-bit", 0x76, 512, 64, 0x4000, 0}, 56 {"NAND 64MiB 1,8V 16-bit", 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16}, 57 {"NAND 64MiB 3,3V 16-bit", 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16}, 58 59 {"NAND 128MiB 1,8V 8-bit", 0x78, 512, 128, 0x4000, 0}, 60 {"NAND 128MiB 1,8V 8-bit", 0x39, 512, 128, 0x4000, 0}, 61 {"NAND 128MiB 3,3V 8-bit", 0x79, 512, 128, 0x4000, 0}, 62 {"NAND 128MiB 1,8V 16-bit", 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16}, 63 {"NAND 128MiB 1,8V 16-bit", 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16}, 64 {"NAND 128MiB 3,3V 16-bit", 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16}, 65 {"NAND 128MiB 3,3V 16-bit", 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16}, 66 67 {"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, 0}, 68 69 /* 70 * These are the new chips with large page size. The pagesize and the 71 * erasesize is determined from the extended id bytes 72 */ 73 #define LP_OPTIONS (NAND_SAMSUNG_LP_OPTIONS | NAND_NO_READRDY | NAND_NO_AUTOINCR) 74 #define LP_OPTIONS16 (LP_OPTIONS | NAND_BUSWIDTH_16) 75 76 /* 512 Megabit */ 77 {"NAND 64MiB 1,8V 8-bit", 0xA2, 0, 64, 0, LP_OPTIONS}, 78 {"NAND 64MiB 1,8V 8-bit", 0xA0, 0, 64, 0, LP_OPTIONS}, 79 {"NAND 64MiB 3,3V 8-bit", 0xF2, 0, 64, 0, LP_OPTIONS}, 80 {"NAND 64MiB 3,3V 8-bit", 0xD0, 0, 64, 0, LP_OPTIONS}, 81 {"NAND 64MiB 3,3V 8-bit", 0xF0, 0, 64, 0, LP_OPTIONS}, 82 {"NAND 64MiB 1,8V 16-bit", 0xB2, 0, 64, 0, LP_OPTIONS16}, 83 {"NAND 64MiB 1,8V 16-bit", 0xB0, 0, 64, 0, LP_OPTIONS16}, 84 {"NAND 64MiB 3,3V 16-bit", 0xC2, 0, 64, 0, LP_OPTIONS16}, 85 {"NAND 64MiB 3,3V 16-bit", 0xC0, 0, 64, 0, LP_OPTIONS16}, 86 87 /* 1 Gigabit */ 88 {"NAND 128MiB 1,8V 8-bit", 0xA1, 0, 128, 0, LP_OPTIONS}, 89 {"NAND 128MiB 3,3V 8-bit", 0xF1, 0, 128, 0, LP_OPTIONS}, 90 {"NAND 128MiB 3,3V 8-bit", 0xD1, 0, 128, 0, LP_OPTIONS}, 91 {"NAND 128MiB 1,8V 16-bit", 0xB1, 0, 128, 0, LP_OPTIONS16}, 92 {"NAND 128MiB 3,3V 16-bit", 0xC1, 0, 128, 0, LP_OPTIONS16}, 93 {"NAND 128MiB 1,8V 16-bit", 0xAD, 0, 128, 0, LP_OPTIONS16}, 94 95 /* 2 Gigabit */ 96 {"NAND 256MiB 1,8V 8-bit", 0xAA, 0, 256, 0, LP_OPTIONS}, 97 {"NAND 256MiB 3,3V 8-bit", 0xDA, 0, 256, 0, LP_OPTIONS}, 98 {"NAND 256MiB 1,8V 16-bit", 0xBA, 0, 256, 0, LP_OPTIONS16}, 99 {"NAND 256MiB 3,3V 16-bit", 0xCA, 0, 256, 0, LP_OPTIONS16}, 100 101 /* 4 Gigabit */ 102 {"NAND 512MiB 1,8V 8-bit", 0xAC, 0, 512, 0, LP_OPTIONS}, 103 {"NAND 512MiB 3,3V 8-bit", 0xDC, 0, 512, 0, LP_OPTIONS}, 104 {"NAND 512MiB 1,8V 16-bit", 0xBC, 0, 512, 0, LP_OPTIONS16}, 105 {"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, LP_OPTIONS16}, 106 107 /* 8 Gigabit */ 108 {"NAND 1GiB 1,8V 8-bit", 0xA3, 0, 1024, 0, LP_OPTIONS}, 109 {"NAND 1GiB 3,3V 8-bit", 0xD3, 0, 1024, 0, LP_OPTIONS}, 110 {"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, LP_OPTIONS16}, 111 {"NAND 1GiB 3,3V 16-bit", 0xC3, 0, 1024, 0, LP_OPTIONS16}, 112 113 /* 16 Gigabit */ 114 {"NAND 2GiB 1,8V 8-bit", 0xA5, 0, 2048, 0, LP_OPTIONS}, 115 {"NAND 2GiB 3,3V 8-bit", 0xD5, 0, 2048, 0, LP_OPTIONS}, 116 {"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, LP_OPTIONS16}, 117 {"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16}, 118 119 /* 32 Gigabit */ 120 {"NAND 4GiB 1,8V 8-bit", 0xA7, 0, 4096, 0, LP_OPTIONS}, 121 {"NAND 4GiB 3,3V 8-bit", 0xD7, 0, 4096, 0, LP_OPTIONS}, 122 {"NAND 4GiB 1,8V 16-bit", 0xB7, 0, 4096, 0, LP_OPTIONS16}, 123 {"NAND 4GiB 3,3V 16-bit", 0xC7, 0, 4096, 0, LP_OPTIONS16}, 124 125 /* 64 Gigabit */ 126 {"NAND 8GiB 1,8V 8-bit", 0xAE, 0, 8192, 0, LP_OPTIONS}, 127 {"NAND 8GiB 3,3V 8-bit", 0xDE, 0, 8192, 0, LP_OPTIONS}, 128 {"NAND 8GiB 1,8V 16-bit", 0xBE, 0, 8192, 0, LP_OPTIONS16}, 129 {"NAND 8GiB 3,3V 16-bit", 0xCE, 0, 8192, 0, LP_OPTIONS16}, 130 131 /* 128 Gigabit */ 132 {"NAND 16GiB 1,8V 8-bit", 0x1A, 0, 16384, 0, LP_OPTIONS}, 133 {"NAND 16GiB 3,3V 8-bit", 0x3A, 0, 16384, 0, LP_OPTIONS}, 134 {"NAND 16GiB 1,8V 16-bit", 0x2A, 0, 16384, 0, LP_OPTIONS16}, 135 {"NAND 16GiB 3,3V 16-bit", 0x4A, 0, 16384, 0, LP_OPTIONS16}, 136 137 /* 256 Gigabit */ 138 {"NAND 32GiB 1,8V 8-bit", 0x1C, 0, 32768, 0, LP_OPTIONS}, 139 {"NAND 32GiB 3,3V 8-bit", 0x3C, 0, 32768, 0, LP_OPTIONS}, 140 {"NAND 32GiB 1,8V 16-bit", 0x2C, 0, 32768, 0, LP_OPTIONS16}, 141 {"NAND 32GiB 3,3V 16-bit", 0x4C, 0, 32768, 0, LP_OPTIONS16}, 142 143 /* 512 Gigabit */ 144 {"NAND 64GiB 1,8V 8-bit", 0x1E, 0, 65536, 0, LP_OPTIONS}, 145 {"NAND 64GiB 3,3V 8-bit", 0x3E, 0, 65536, 0, LP_OPTIONS}, 146 {"NAND 64GiB 1,8V 16-bit", 0x2E, 0, 65536, 0, LP_OPTIONS16}, 147 {"NAND 64GiB 3,3V 16-bit", 0x4E, 0, 65536, 0, LP_OPTIONS16}, 148 149 /* 150 * Renesas AND 1 Gigabit. Those chips do not support extended id and 151 * have a strange page/block layout ! The chosen minimum erasesize is 152 * 4 * 2 * 2048 = 16384 Byte, as those chips have an array of 4 page 153 * planes 1 block = 2 pages, but due to plane arrangement the blocks 154 * 0-3 consists of page 0 + 4,1 + 5, 2 + 6, 3 + 7 Anyway JFFS2 would 155 * increase the eraseblock size so we chose a combined one which can be 156 * erased in one go There are more speed improvements for reads and 157 * writes possible, but not implemented now 158 */ 159 {"AND 128MiB 3,3V 8-bit", 0x01, 2048, 128, 0x4000, 160 NAND_IS_AND | NAND_NO_AUTOINCR |NAND_NO_READRDY | NAND_4PAGE_ARRAY | 161 BBT_AUTO_REFRESH 162 }, 163 164 {NULL,} 165 }; 166 167 /* 168 * Manufacturer ID list 169 */ 170 struct nand_manufacturers nand_manuf_ids[] = { 171 {NAND_MFR_TOSHIBA, "Toshiba"}, 172 {NAND_MFR_SAMSUNG, "Samsung"}, 173 {NAND_MFR_FUJITSU, "Fujitsu"}, 174 {NAND_MFR_NATIONAL, "National"}, 175 {NAND_MFR_RENESAS, "Renesas"}, 176 {NAND_MFR_STMICRO, "ST Micro"}, 177 {NAND_MFR_HYNIX, "Hynix"}, 178 {NAND_MFR_MICRON, "Micron"}, 179 {NAND_MFR_AMD, "AMD"}, 180 {NAND_MFR_MACRONIX, "Macronix"}, 181 {0x0, "Unknown"} 182 }; 183 184 EXPORT_SYMBOL(nand_manuf_ids); 185 EXPORT_SYMBOL(nand_flash_ids); 186 187 MODULE_LICENSE("GPL"); 188 MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>"); 189 MODULE_DESCRIPTION("Nand device & manufacturer IDs"); 190