1 /*
2 * SDHCI support for CNS3xxx SoC
3 *
4 * Copyright 2008 Cavium Networks
5 * Copyright 2010 MontaVista Software, LLC.
6 *
7 * Authors: Scott Shu
8 * Anton Vorontsov <avorontsov@mvista.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15 #include <linux/delay.h>
16 #include <linux/device.h>
17 #include <linux/mmc/host.h>
18 #include <linux/module.h>
19 #include <mach/cns3xxx.h>
20 #include "sdhci-pltfm.h"
21
sdhci_cns3xxx_get_max_clk(struct sdhci_host * host)22 static unsigned int sdhci_cns3xxx_get_max_clk(struct sdhci_host *host)
23 {
24 return 150000000;
25 }
26
sdhci_cns3xxx_set_clock(struct sdhci_host * host,unsigned int clock)27 static void sdhci_cns3xxx_set_clock(struct sdhci_host *host, unsigned int clock)
28 {
29 struct device *dev = mmc_dev(host->mmc);
30 int div = 1;
31 u16 clk;
32 unsigned long timeout;
33
34 if (clock == host->clock)
35 return;
36
37 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
38
39 if (clock == 0)
40 goto out;
41
42 while (host->max_clk / div > clock) {
43 /*
44 * On CNS3xxx divider grows linearly up to 4, and then
45 * exponentially up to 256.
46 */
47 if (div < 4)
48 div += 1;
49 else if (div < 256)
50 div *= 2;
51 else
52 break;
53 }
54
55 dev_dbg(dev, "desired SD clock: %d, actual: %d\n",
56 clock, host->max_clk / div);
57
58 /* Divide by 3 is special. */
59 if (div != 3)
60 div >>= 1;
61
62 clk = div << SDHCI_DIVIDER_SHIFT;
63 clk |= SDHCI_CLOCK_INT_EN;
64 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
65
66 timeout = 20;
67 while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))
68 & SDHCI_CLOCK_INT_STABLE)) {
69 if (timeout == 0) {
70 dev_warn(dev, "clock is unstable");
71 break;
72 }
73 timeout--;
74 mdelay(1);
75 }
76
77 clk |= SDHCI_CLOCK_CARD_EN;
78 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
79 out:
80 host->clock = clock;
81 }
82
83 static struct sdhci_ops sdhci_cns3xxx_ops = {
84 .get_max_clock = sdhci_cns3xxx_get_max_clk,
85 .set_clock = sdhci_cns3xxx_set_clock,
86 };
87
88 static struct sdhci_pltfm_data sdhci_cns3xxx_pdata = {
89 .ops = &sdhci_cns3xxx_ops,
90 .quirks = SDHCI_QUIRK_BROKEN_DMA |
91 SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |
92 SDHCI_QUIRK_INVERTED_WRITE_PROTECT |
93 SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN |
94 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL |
95 SDHCI_QUIRK_NONSTANDARD_CLOCK,
96 };
97
sdhci_cns3xxx_probe(struct platform_device * pdev)98 static int __devinit sdhci_cns3xxx_probe(struct platform_device *pdev)
99 {
100 return sdhci_pltfm_register(pdev, &sdhci_cns3xxx_pdata);
101 }
102
sdhci_cns3xxx_remove(struct platform_device * pdev)103 static int __devexit sdhci_cns3xxx_remove(struct platform_device *pdev)
104 {
105 return sdhci_pltfm_unregister(pdev);
106 }
107
108 static struct platform_driver sdhci_cns3xxx_driver = {
109 .driver = {
110 .name = "sdhci-cns3xxx",
111 .owner = THIS_MODULE,
112 .pm = SDHCI_PLTFM_PMOPS,
113 },
114 .probe = sdhci_cns3xxx_probe,
115 .remove = __devexit_p(sdhci_cns3xxx_remove),
116 };
117
118 module_platform_driver(sdhci_cns3xxx_driver);
119
120 MODULE_DESCRIPTION("SDHCI driver for CNS3xxx");
121 MODULE_AUTHOR("Scott Shu, "
122 "Anton Vorontsov <avorontsov@mvista.com>");
123 MODULE_LICENSE("GPL v2");
124