1 /* Texas Instruments Triple 8-/10-BIT 165-/110-MSPS Video and Graphics
2 * Digitizer with Horizontal PLL registers
3 *
4 * Copyright (C) 2009 Texas Instruments Inc
5 * Author: Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>
6 *
7 * This code is partially based upon the TVP5150 driver
8 * written by Mauro Carvalho Chehab (mchehab@infradead.org),
9 * the TVP514x driver written by Vaibhav Hiremath <hvaibhav@ti.com>
10 * and the TVP7002 driver in the TI LSP 2.10.00.14. Revisions by
11 * Muralidharan Karicheri and Snehaprabha Narnakaje (TI).
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27 #include <linux/delay.h>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/videodev2.h>
31 #include <linux/module.h>
32 #include <media/tvp7002.h>
33 #include <media/v4l2-device.h>
34 #include <media/v4l2-chip-ident.h>
35 #include <media/v4l2-common.h>
36 #include <media/v4l2-ctrls.h>
37 #include "tvp7002_reg.h"
38
39 MODULE_DESCRIPTION("TI TVP7002 Video and Graphics Digitizer driver");
40 MODULE_AUTHOR("Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>");
41 MODULE_LICENSE("GPL");
42
43 /* Module Name */
44 #define TVP7002_MODULE_NAME "tvp7002"
45
46 /* I2C retry attempts */
47 #define I2C_RETRY_COUNT (5)
48
49 /* End of registers */
50 #define TVP7002_EOR 0x5c
51
52 /* Read write definition for registers */
53 #define TVP7002_READ 0
54 #define TVP7002_WRITE 1
55 #define TVP7002_RESERVED 2
56
57 /* Interlaced vs progressive mask and shift */
58 #define TVP7002_IP_SHIFT 5
59 #define TVP7002_INPR_MASK (0x01 << TVP7002_IP_SHIFT)
60
61 /* Shift for CPL and LPF registers */
62 #define TVP7002_CL_SHIFT 8
63 #define TVP7002_CL_MASK 0x0f
64
65 /* Debug functions */
66 static bool debug;
67 module_param(debug, bool, 0644);
68 MODULE_PARM_DESC(debug, "Debug level (0-2)");
69
70 /* Structure for register values */
71 struct i2c_reg_value {
72 u8 reg;
73 u8 value;
74 u8 type;
75 };
76
77 /*
78 * Register default values (according to tvp7002 datasheet)
79 * In the case of read-only registers, the value (0xff) is
80 * never written. R/W functionality is controlled by the
81 * writable bit in the register struct definition.
82 */
83 static const struct i2c_reg_value tvp7002_init_default[] = {
84 { TVP7002_CHIP_REV, 0xff, TVP7002_READ },
85 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE },
86 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x20, TVP7002_WRITE },
87 { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE },
88 { TVP7002_HPLL_PHASE_SEL, 0x80, TVP7002_WRITE },
89 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
90 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
91 { TVP7002_HSYNC_OUT_W, 0x60, TVP7002_WRITE },
92 { TVP7002_B_FINE_GAIN, 0x00, TVP7002_WRITE },
93 { TVP7002_G_FINE_GAIN, 0x00, TVP7002_WRITE },
94 { TVP7002_R_FINE_GAIN, 0x00, TVP7002_WRITE },
95 { TVP7002_B_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
96 { TVP7002_G_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
97 { TVP7002_R_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
98 { TVP7002_SYNC_CTL_1, 0x20, TVP7002_WRITE },
99 { TVP7002_HPLL_AND_CLAMP_CTL, 0x2e, TVP7002_WRITE },
100 { TVP7002_SYNC_ON_G_THRS, 0x5d, TVP7002_WRITE },
101 { TVP7002_SYNC_SEPARATOR_THRS, 0x47, TVP7002_WRITE },
102 { TVP7002_HPLL_PRE_COAST, 0x00, TVP7002_WRITE },
103 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
104 { TVP7002_SYNC_DETECT_STAT, 0xff, TVP7002_READ },
105 { TVP7002_OUT_FORMATTER, 0x47, TVP7002_WRITE },
106 { TVP7002_MISC_CTL_1, 0x01, TVP7002_WRITE },
107 { TVP7002_MISC_CTL_2, 0x00, TVP7002_WRITE },
108 { TVP7002_MISC_CTL_3, 0x01, TVP7002_WRITE },
109 { TVP7002_IN_MUX_SEL_1, 0x00, TVP7002_WRITE },
110 { TVP7002_IN_MUX_SEL_2, 0x67, TVP7002_WRITE },
111 { TVP7002_B_AND_G_COARSE_GAIN, 0x77, TVP7002_WRITE },
112 { TVP7002_R_COARSE_GAIN, 0x07, TVP7002_WRITE },
113 { TVP7002_FINE_OFF_LSBS, 0x00, TVP7002_WRITE },
114 { TVP7002_B_COARSE_OFF, 0x10, TVP7002_WRITE },
115 { TVP7002_G_COARSE_OFF, 0x10, TVP7002_WRITE },
116 { TVP7002_R_COARSE_OFF, 0x10, TVP7002_WRITE },
117 { TVP7002_HSOUT_OUT_START, 0x08, TVP7002_WRITE },
118 { TVP7002_MISC_CTL_4, 0x00, TVP7002_WRITE },
119 { TVP7002_B_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
120 { TVP7002_G_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
121 { TVP7002_R_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
122 { TVP7002_AUTO_LVL_CTL_ENABLE, 0x80, TVP7002_WRITE },
123 { TVP7002_DGTL_ALC_OUT_MSBS, 0xff, TVP7002_READ },
124 { TVP7002_AUTO_LVL_CTL_FILTER, 0x53, TVP7002_WRITE },
125 { 0x29, 0x08, TVP7002_RESERVED },
126 { TVP7002_FINE_CLAMP_CTL, 0x07, TVP7002_WRITE },
127 /* PWR_CTL is controlled only by the probe and reset functions */
128 { TVP7002_PWR_CTL, 0x00, TVP7002_RESERVED },
129 { TVP7002_ADC_SETUP, 0x50, TVP7002_WRITE },
130 { TVP7002_COARSE_CLAMP_CTL, 0x00, TVP7002_WRITE },
131 { TVP7002_SOG_CLAMP, 0x80, TVP7002_WRITE },
132 { TVP7002_RGB_COARSE_CLAMP_CTL, 0x8c, TVP7002_WRITE },
133 { TVP7002_SOG_COARSE_CLAMP_CTL, 0x04, TVP7002_WRITE },
134 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
135 { 0x32, 0x18, TVP7002_RESERVED },
136 { 0x33, 0x60, TVP7002_RESERVED },
137 { TVP7002_MVIS_STRIPPER_W, 0xff, TVP7002_RESERVED },
138 { TVP7002_VSYNC_ALGN, 0x10, TVP7002_WRITE },
139 { TVP7002_SYNC_BYPASS, 0x00, TVP7002_WRITE },
140 { TVP7002_L_FRAME_STAT_LSBS, 0xff, TVP7002_READ },
141 { TVP7002_L_FRAME_STAT_MSBS, 0xff, TVP7002_READ },
142 { TVP7002_CLK_L_STAT_LSBS, 0xff, TVP7002_READ },
143 { TVP7002_CLK_L_STAT_MSBS, 0xff, TVP7002_READ },
144 { TVP7002_HSYNC_W, 0xff, TVP7002_READ },
145 { TVP7002_VSYNC_W, 0xff, TVP7002_READ },
146 { TVP7002_L_LENGTH_TOL, 0x03, TVP7002_WRITE },
147 { 0x3e, 0x60, TVP7002_RESERVED },
148 { TVP7002_VIDEO_BWTH_CTL, 0x01, TVP7002_WRITE },
149 { TVP7002_AVID_START_PIXEL_LSBS, 0x01, TVP7002_WRITE },
150 { TVP7002_AVID_START_PIXEL_MSBS, 0x2c, TVP7002_WRITE },
151 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x06, TVP7002_WRITE },
152 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x2c, TVP7002_WRITE },
153 { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
154 { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
155 { TVP7002_VBLK_F_0_DURATION, 0x1e, TVP7002_WRITE },
156 { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
157 { TVP7002_FBIT_F_0_START_L_OFF, 0x00, TVP7002_WRITE },
158 { TVP7002_FBIT_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
159 { TVP7002_YUV_Y_G_COEF_LSBS, 0xe3, TVP7002_WRITE },
160 { TVP7002_YUV_Y_G_COEF_MSBS, 0x16, TVP7002_WRITE },
161 { TVP7002_YUV_Y_B_COEF_LSBS, 0x4f, TVP7002_WRITE },
162 { TVP7002_YUV_Y_B_COEF_MSBS, 0x02, TVP7002_WRITE },
163 { TVP7002_YUV_Y_R_COEF_LSBS, 0xce, TVP7002_WRITE },
164 { TVP7002_YUV_Y_R_COEF_MSBS, 0x06, TVP7002_WRITE },
165 { TVP7002_YUV_U_G_COEF_LSBS, 0xab, TVP7002_WRITE },
166 { TVP7002_YUV_U_G_COEF_MSBS, 0xf3, TVP7002_WRITE },
167 { TVP7002_YUV_U_B_COEF_LSBS, 0x00, TVP7002_WRITE },
168 { TVP7002_YUV_U_B_COEF_MSBS, 0x10, TVP7002_WRITE },
169 { TVP7002_YUV_U_R_COEF_LSBS, 0x55, TVP7002_WRITE },
170 { TVP7002_YUV_U_R_COEF_MSBS, 0xfc, TVP7002_WRITE },
171 { TVP7002_YUV_V_G_COEF_LSBS, 0x78, TVP7002_WRITE },
172 { TVP7002_YUV_V_G_COEF_MSBS, 0xf1, TVP7002_WRITE },
173 { TVP7002_YUV_V_B_COEF_LSBS, 0x88, TVP7002_WRITE },
174 { TVP7002_YUV_V_B_COEF_MSBS, 0xfe, TVP7002_WRITE },
175 { TVP7002_YUV_V_R_COEF_LSBS, 0x00, TVP7002_WRITE },
176 { TVP7002_YUV_V_R_COEF_MSBS, 0x10, TVP7002_WRITE },
177 /* This signals end of register values */
178 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
179 };
180
181 /* Register parameters for 480P */
182 static const struct i2c_reg_value tvp7002_parms_480P[] = {
183 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x35, TVP7002_WRITE },
184 { TVP7002_HPLL_FDBK_DIV_LSBS, 0xa0, TVP7002_WRITE },
185 { TVP7002_HPLL_CRTL, 0x02, TVP7002_WRITE },
186 { TVP7002_AVID_START_PIXEL_LSBS, 0x91, TVP7002_WRITE },
187 { TVP7002_AVID_START_PIXEL_MSBS, 0x00, TVP7002_WRITE },
188 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x0B, TVP7002_WRITE },
189 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x00, TVP7002_WRITE },
190 { TVP7002_VBLK_F_0_START_L_OFF, 0x03, TVP7002_WRITE },
191 { TVP7002_VBLK_F_1_START_L_OFF, 0x01, TVP7002_WRITE },
192 { TVP7002_VBLK_F_0_DURATION, 0x13, TVP7002_WRITE },
193 { TVP7002_VBLK_F_1_DURATION, 0x13, TVP7002_WRITE },
194 { TVP7002_ALC_PLACEMENT, 0x18, TVP7002_WRITE },
195 { TVP7002_CLAMP_START, 0x06, TVP7002_WRITE },
196 { TVP7002_CLAMP_W, 0x10, TVP7002_WRITE },
197 { TVP7002_HPLL_PRE_COAST, 0x03, TVP7002_WRITE },
198 { TVP7002_HPLL_POST_COAST, 0x03, TVP7002_WRITE },
199 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
200 };
201
202 /* Register parameters for 576P */
203 static const struct i2c_reg_value tvp7002_parms_576P[] = {
204 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x36, TVP7002_WRITE },
205 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x00, TVP7002_WRITE },
206 { TVP7002_HPLL_CRTL, 0x18, TVP7002_WRITE },
207 { TVP7002_AVID_START_PIXEL_LSBS, 0x9B, TVP7002_WRITE },
208 { TVP7002_AVID_START_PIXEL_MSBS, 0x00, TVP7002_WRITE },
209 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x0F, TVP7002_WRITE },
210 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x00, TVP7002_WRITE },
211 { TVP7002_VBLK_F_0_START_L_OFF, 0x00, TVP7002_WRITE },
212 { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
213 { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
214 { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
215 { TVP7002_ALC_PLACEMENT, 0x18, TVP7002_WRITE },
216 { TVP7002_CLAMP_START, 0x06, TVP7002_WRITE },
217 { TVP7002_CLAMP_W, 0x10, TVP7002_WRITE },
218 { TVP7002_HPLL_PRE_COAST, 0x03, TVP7002_WRITE },
219 { TVP7002_HPLL_POST_COAST, 0x03, TVP7002_WRITE },
220 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
221 };
222
223 /* Register parameters for 1080I60 */
224 static const struct i2c_reg_value tvp7002_parms_1080I60[] = {
225 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE },
226 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x80, TVP7002_WRITE },
227 { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
228 { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
229 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
230 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
231 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
232 { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
233 { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
234 { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
235 { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
236 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
237 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
238 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
239 { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
240 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
241 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
242 };
243
244 /* Register parameters for 1080P60 */
245 static const struct i2c_reg_value tvp7002_parms_1080P60[] = {
246 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE },
247 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x80, TVP7002_WRITE },
248 { TVP7002_HPLL_CRTL, 0xE0, TVP7002_WRITE },
249 { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
250 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
251 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
252 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
253 { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
254 { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
255 { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
256 { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
257 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
258 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
259 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
260 { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
261 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
262 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
263 };
264
265 /* Register parameters for 1080I50 */
266 static const struct i2c_reg_value tvp7002_parms_1080I50[] = {
267 { TVP7002_HPLL_FDBK_DIV_MSBS, 0xa5, TVP7002_WRITE },
268 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x00, TVP7002_WRITE },
269 { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
270 { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
271 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
272 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
273 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
274 { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
275 { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
276 { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
277 { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
278 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
279 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
280 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
281 { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
282 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
283 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
284 };
285
286 /* Register parameters for 720P60 */
287 static const struct i2c_reg_value tvp7002_parms_720P60[] = {
288 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE },
289 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x20, TVP7002_WRITE },
290 { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE },
291 { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE },
292 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
293 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x4B, TVP7002_WRITE },
294 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x06, TVP7002_WRITE },
295 { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
296 { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
297 { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
298 { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
299 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
300 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
301 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
302 { TVP7002_HPLL_PRE_COAST, 0x00, TVP7002_WRITE },
303 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
304 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
305 };
306
307 /* Register parameters for 720P50 */
308 static const struct i2c_reg_value tvp7002_parms_720P50[] = {
309 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x7b, TVP7002_WRITE },
310 { TVP7002_HPLL_FDBK_DIV_LSBS, 0xc0, TVP7002_WRITE },
311 { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
312 { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE },
313 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
314 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x4B, TVP7002_WRITE },
315 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x06, TVP7002_WRITE },
316 { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
317 { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
318 { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
319 { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
320 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
321 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
322 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
323 { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
324 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
325 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
326 };
327
328 /* Preset definition for handling device operation */
329 struct tvp7002_preset_definition {
330 u32 preset;
331 const struct i2c_reg_value *p_settings;
332 enum v4l2_colorspace color_space;
333 enum v4l2_field scanmode;
334 u16 progressive;
335 u16 lines_per_frame;
336 u16 cpl_min;
337 u16 cpl_max;
338 };
339
340 /* Struct list for digital video presets */
341 static const struct tvp7002_preset_definition tvp7002_presets[] = {
342 {
343 V4L2_DV_720P60,
344 tvp7002_parms_720P60,
345 V4L2_COLORSPACE_REC709,
346 V4L2_FIELD_NONE,
347 1,
348 0x2EE,
349 135,
350 153
351 },
352 {
353 V4L2_DV_1080I60,
354 tvp7002_parms_1080I60,
355 V4L2_COLORSPACE_REC709,
356 V4L2_FIELD_INTERLACED,
357 0,
358 0x465,
359 181,
360 205
361 },
362 {
363 V4L2_DV_1080I50,
364 tvp7002_parms_1080I50,
365 V4L2_COLORSPACE_REC709,
366 V4L2_FIELD_INTERLACED,
367 0,
368 0x465,
369 217,
370 245
371 },
372 {
373 V4L2_DV_720P50,
374 tvp7002_parms_720P50,
375 V4L2_COLORSPACE_REC709,
376 V4L2_FIELD_NONE,
377 1,
378 0x2EE,
379 163,
380 183
381 },
382 {
383 V4L2_DV_1080P60,
384 tvp7002_parms_1080P60,
385 V4L2_COLORSPACE_REC709,
386 V4L2_FIELD_NONE,
387 1,
388 0x465,
389 90,
390 102
391 },
392 {
393 V4L2_DV_480P59_94,
394 tvp7002_parms_480P,
395 V4L2_COLORSPACE_SMPTE170M,
396 V4L2_FIELD_NONE,
397 1,
398 0x20D,
399 0xffff,
400 0xffff
401 },
402 {
403 V4L2_DV_576P50,
404 tvp7002_parms_576P,
405 V4L2_COLORSPACE_SMPTE170M,
406 V4L2_FIELD_NONE,
407 1,
408 0x271,
409 0xffff,
410 0xffff
411 }
412 };
413
414 #define NUM_PRESETS ARRAY_SIZE(tvp7002_presets)
415
416 /* Device definition */
417 struct tvp7002 {
418 struct v4l2_subdev sd;
419 struct v4l2_ctrl_handler hdl;
420 const struct tvp7002_config *pdata;
421
422 int ver;
423 int streaming;
424
425 const struct tvp7002_preset_definition *current_preset;
426 };
427
428 /*
429 * to_tvp7002 - Obtain device handler TVP7002
430 * @sd: ptr to v4l2_subdev struct
431 *
432 * Returns device handler tvp7002.
433 */
to_tvp7002(struct v4l2_subdev * sd)434 static inline struct tvp7002 *to_tvp7002(struct v4l2_subdev *sd)
435 {
436 return container_of(sd, struct tvp7002, sd);
437 }
438
to_sd(struct v4l2_ctrl * ctrl)439 static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
440 {
441 return &container_of(ctrl->handler, struct tvp7002, hdl)->sd;
442 }
443
444 /*
445 * tvp7002_read - Read a value from a register in an TVP7002
446 * @sd: ptr to v4l2_subdev struct
447 * @addr: TVP7002 register address
448 * @dst: pointer to 8-bit destination
449 *
450 * Returns value read if successful, or non-zero (-1) otherwise.
451 */
tvp7002_read(struct v4l2_subdev * sd,u8 addr,u8 * dst)452 static int tvp7002_read(struct v4l2_subdev *sd, u8 addr, u8 *dst)
453 {
454 struct i2c_client *c = v4l2_get_subdevdata(sd);
455 int retry;
456 int error;
457
458 for (retry = 0; retry < I2C_RETRY_COUNT; retry++) {
459 error = i2c_smbus_read_byte_data(c, addr);
460
461 if (error >= 0) {
462 *dst = (u8)error;
463 return 0;
464 }
465
466 msleep_interruptible(10);
467 }
468 v4l2_err(sd, "TVP7002 read error %d\n", error);
469 return error;
470 }
471
472 /*
473 * tvp7002_read_err() - Read a register value with error code
474 * @sd: pointer to standard V4L2 sub-device structure
475 * @reg: destination register
476 * @val: value to be read
477 * @err: pointer to error value
478 *
479 * Read a value in a register and save error value in pointer.
480 * Also update the register table if successful
481 */
tvp7002_read_err(struct v4l2_subdev * sd,u8 reg,u8 * dst,int * err)482 static inline void tvp7002_read_err(struct v4l2_subdev *sd, u8 reg,
483 u8 *dst, int *err)
484 {
485 if (!*err)
486 *err = tvp7002_read(sd, reg, dst);
487 }
488
489 /*
490 * tvp7002_write() - Write a value to a register in TVP7002
491 * @sd: ptr to v4l2_subdev struct
492 * @addr: TVP7002 register address
493 * @value: value to be written to the register
494 *
495 * Write a value to a register in an TVP7002 decoder device.
496 * Returns zero if successful, or non-zero otherwise.
497 */
tvp7002_write(struct v4l2_subdev * sd,u8 addr,u8 value)498 static int tvp7002_write(struct v4l2_subdev *sd, u8 addr, u8 value)
499 {
500 struct i2c_client *c;
501 int retry;
502 int error;
503
504 c = v4l2_get_subdevdata(sd);
505
506 for (retry = 0; retry < I2C_RETRY_COUNT; retry++) {
507 error = i2c_smbus_write_byte_data(c, addr, value);
508
509 if (error >= 0)
510 return 0;
511
512 v4l2_warn(sd, "Write: retry ... %d\n", retry);
513 msleep_interruptible(10);
514 }
515 v4l2_err(sd, "TVP7002 write error %d\n", error);
516 return error;
517 }
518
519 /*
520 * tvp7002_write_err() - Write a register value with error code
521 * @sd: pointer to standard V4L2 sub-device structure
522 * @reg: destination register
523 * @val: value to be written
524 * @err: pointer to error value
525 *
526 * Write a value in a register and save error value in pointer.
527 * Also update the register table if successful
528 */
tvp7002_write_err(struct v4l2_subdev * sd,u8 reg,u8 val,int * err)529 static inline void tvp7002_write_err(struct v4l2_subdev *sd, u8 reg,
530 u8 val, int *err)
531 {
532 if (!*err)
533 *err = tvp7002_write(sd, reg, val);
534 }
535
536 /*
537 * tvp7002_g_chip_ident() - Get chip identification number
538 * @sd: ptr to v4l2_subdev struct
539 * @chip: ptr to v4l2_dbg_chip_ident struct
540 *
541 * Obtains the chip's identification number.
542 * Returns zero or -EINVAL if read operation fails.
543 */
tvp7002_g_chip_ident(struct v4l2_subdev * sd,struct v4l2_dbg_chip_ident * chip)544 static int tvp7002_g_chip_ident(struct v4l2_subdev *sd,
545 struct v4l2_dbg_chip_ident *chip)
546 {
547 u8 rev;
548 int error;
549 struct i2c_client *client = v4l2_get_subdevdata(sd);
550
551 error = tvp7002_read(sd, TVP7002_CHIP_REV, &rev);
552
553 if (error < 0)
554 return error;
555
556 return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_TVP7002, rev);
557 }
558
559 /*
560 * tvp7002_write_inittab() - Write initialization values
561 * @sd: ptr to v4l2_subdev struct
562 * @regs: ptr to i2c_reg_value struct
563 *
564 * Write initialization values.
565 * Returns zero or -EINVAL if read operation fails.
566 */
tvp7002_write_inittab(struct v4l2_subdev * sd,const struct i2c_reg_value * regs)567 static int tvp7002_write_inittab(struct v4l2_subdev *sd,
568 const struct i2c_reg_value *regs)
569 {
570 int error = 0;
571
572 /* Initialize the first (defined) registers */
573 while (TVP7002_EOR != regs->reg) {
574 if (TVP7002_WRITE == regs->type)
575 tvp7002_write_err(sd, regs->reg, regs->value, &error);
576 regs++;
577 }
578
579 return error;
580 }
581
582 /*
583 * tvp7002_s_dv_preset() - Set digital video preset
584 * @sd: ptr to v4l2_subdev struct
585 * @dv_preset: ptr to v4l2_dv_preset struct
586 *
587 * Set the digital video preset for a TVP7002 decoder device.
588 * Returns zero when successful or -EINVAL if register access fails.
589 */
tvp7002_s_dv_preset(struct v4l2_subdev * sd,struct v4l2_dv_preset * dv_preset)590 static int tvp7002_s_dv_preset(struct v4l2_subdev *sd,
591 struct v4l2_dv_preset *dv_preset)
592 {
593 struct tvp7002 *device = to_tvp7002(sd);
594 u32 preset;
595 int i;
596
597 for (i = 0; i < NUM_PRESETS; i++) {
598 preset = tvp7002_presets[i].preset;
599 if (preset == dv_preset->preset) {
600 device->current_preset = &tvp7002_presets[i];
601 return tvp7002_write_inittab(sd, tvp7002_presets[i].p_settings);
602 }
603 }
604
605 return -EINVAL;
606 }
607
608 /*
609 * tvp7002_s_ctrl() - Set a control
610 * @ctrl: ptr to v4l2_ctrl struct
611 *
612 * Set a control in TVP7002 decoder device.
613 * Returns zero when successful or -EINVAL if register access fails.
614 */
tvp7002_s_ctrl(struct v4l2_ctrl * ctrl)615 static int tvp7002_s_ctrl(struct v4l2_ctrl *ctrl)
616 {
617 struct v4l2_subdev *sd = to_sd(ctrl);
618 int error = 0;
619
620 switch (ctrl->id) {
621 case V4L2_CID_GAIN:
622 tvp7002_write_err(sd, TVP7002_R_FINE_GAIN, ctrl->val, &error);
623 tvp7002_write_err(sd, TVP7002_G_FINE_GAIN, ctrl->val, &error);
624 tvp7002_write_err(sd, TVP7002_B_FINE_GAIN, ctrl->val, &error);
625 return error;
626 }
627 return -EINVAL;
628 }
629
630 /*
631 * tvp7002_mbus_fmt() - V4L2 decoder interface handler for try/s/g_mbus_fmt
632 * @sd: pointer to standard V4L2 sub-device structure
633 * @f: pointer to mediabus format structure
634 *
635 * Negotiate the image capture size and mediabus format.
636 * There is only one possible format, so this single function works for
637 * get, set and try.
638 */
tvp7002_mbus_fmt(struct v4l2_subdev * sd,struct v4l2_mbus_framefmt * f)639 static int tvp7002_mbus_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *f)
640 {
641 struct tvp7002 *device = to_tvp7002(sd);
642 struct v4l2_dv_enum_preset e_preset;
643 int error;
644
645 /* Calculate height and width based on current standard */
646 error = v4l_fill_dv_preset_info(device->current_preset->preset, &e_preset);
647 if (error)
648 return error;
649
650 f->width = e_preset.width;
651 f->height = e_preset.height;
652 f->code = V4L2_MBUS_FMT_YUYV10_1X20;
653 f->field = device->current_preset->scanmode;
654 f->colorspace = device->current_preset->color_space;
655
656 v4l2_dbg(1, debug, sd, "MBUS_FMT: Width - %d, Height - %d",
657 f->width, f->height);
658 return 0;
659 }
660
661 /*
662 * tvp7002_query_dv_preset() - query DV preset
663 * @sd: pointer to standard V4L2 sub-device structure
664 * @qpreset: standard V4L2 v4l2_dv_preset structure
665 *
666 * Returns the current DV preset by TVP7002. If no active input is
667 * detected, returns -EINVAL
668 */
tvp7002_query_dv_preset(struct v4l2_subdev * sd,struct v4l2_dv_preset * qpreset)669 static int tvp7002_query_dv_preset(struct v4l2_subdev *sd,
670 struct v4l2_dv_preset *qpreset)
671 {
672 const struct tvp7002_preset_definition *presets = tvp7002_presets;
673 struct tvp7002 *device;
674 u8 progressive;
675 u32 lpfr;
676 u32 cpln;
677 int error = 0;
678 u8 lpf_lsb;
679 u8 lpf_msb;
680 u8 cpl_lsb;
681 u8 cpl_msb;
682 int index;
683
684 /* Return invalid preset if no active input is detected */
685 qpreset->preset = V4L2_DV_INVALID;
686
687 device = to_tvp7002(sd);
688
689 /* Read standards from device registers */
690 tvp7002_read_err(sd, TVP7002_L_FRAME_STAT_LSBS, &lpf_lsb, &error);
691 tvp7002_read_err(sd, TVP7002_L_FRAME_STAT_MSBS, &lpf_msb, &error);
692
693 if (error < 0)
694 return error;
695
696 tvp7002_read_err(sd, TVP7002_CLK_L_STAT_LSBS, &cpl_lsb, &error);
697 tvp7002_read_err(sd, TVP7002_CLK_L_STAT_MSBS, &cpl_msb, &error);
698
699 if (error < 0)
700 return error;
701
702 /* Get lines per frame, clocks per line and interlaced/progresive */
703 lpfr = lpf_lsb | ((TVP7002_CL_MASK & lpf_msb) << TVP7002_CL_SHIFT);
704 cpln = cpl_lsb | ((TVP7002_CL_MASK & cpl_msb) << TVP7002_CL_SHIFT);
705 progressive = (lpf_msb & TVP7002_INPR_MASK) >> TVP7002_IP_SHIFT;
706
707 /* Do checking of video modes */
708 for (index = 0; index < NUM_PRESETS; index++, presets++)
709 if (lpfr == presets->lines_per_frame &&
710 progressive == presets->progressive) {
711 if (presets->cpl_min == 0xffff)
712 break;
713 if (cpln >= presets->cpl_min && cpln <= presets->cpl_max)
714 break;
715 }
716
717 if (index == NUM_PRESETS) {
718 v4l2_dbg(1, debug, sd, "detection failed: lpf = %x, cpl = %x\n",
719 lpfr, cpln);
720 return 0;
721 }
722
723 /* Set values in found preset */
724 qpreset->preset = presets->preset;
725
726 /* Update lines per frame and clocks per line info */
727 v4l2_dbg(1, debug, sd, "detected preset: %d\n", presets->preset);
728 return 0;
729 }
730
731 #ifdef CONFIG_VIDEO_ADV_DEBUG
732 /*
733 * tvp7002_g_register() - Get the value of a register
734 * @sd: ptr to v4l2_subdev struct
735 * @reg: ptr to v4l2_dbg_register struct
736 *
737 * Get the value of a TVP7002 decoder device register.
738 * Returns zero when successful, -EINVAL if register read fails or
739 * access to I2C client fails, -EPERM if the call is not allowed
740 * by disabled CAP_SYS_ADMIN.
741 */
tvp7002_g_register(struct v4l2_subdev * sd,struct v4l2_dbg_register * reg)742 static int tvp7002_g_register(struct v4l2_subdev *sd,
743 struct v4l2_dbg_register *reg)
744 {
745 struct i2c_client *client = v4l2_get_subdevdata(sd);
746 u8 val;
747 int ret;
748
749 if (!v4l2_chip_match_i2c_client(client, ®->match))
750 return -EINVAL;
751 if (!capable(CAP_SYS_ADMIN))
752 return -EPERM;
753
754 ret = tvp7002_read(sd, reg->reg & 0xff, &val);
755 reg->val = val;
756 return ret;
757 }
758
759 /*
760 * tvp7002_s_register() - set a control
761 * @sd: ptr to v4l2_subdev struct
762 * @reg: ptr to v4l2_dbg_register struct
763 *
764 * Get the value of a TVP7002 decoder device register.
765 * Returns zero when successful, -EINVAL if register read fails or
766 * -EPERM if call not allowed.
767 */
tvp7002_s_register(struct v4l2_subdev * sd,struct v4l2_dbg_register * reg)768 static int tvp7002_s_register(struct v4l2_subdev *sd,
769 struct v4l2_dbg_register *reg)
770 {
771 struct i2c_client *client = v4l2_get_subdevdata(sd);
772
773 if (!v4l2_chip_match_i2c_client(client, ®->match))
774 return -EINVAL;
775 if (!capable(CAP_SYS_ADMIN))
776 return -EPERM;
777
778 return tvp7002_write(sd, reg->reg & 0xff, reg->val & 0xff);
779 }
780 #endif
781
782 /*
783 * tvp7002_enum_mbus_fmt() - Enum supported mediabus formats
784 * @sd: pointer to standard V4L2 sub-device structure
785 * @index: format index
786 * @code: pointer to mediabus format
787 *
788 * Enumerate supported mediabus formats.
789 */
790
tvp7002_enum_mbus_fmt(struct v4l2_subdev * sd,unsigned index,enum v4l2_mbus_pixelcode * code)791 static int tvp7002_enum_mbus_fmt(struct v4l2_subdev *sd, unsigned index,
792 enum v4l2_mbus_pixelcode *code)
793 {
794 /* Check requested format index is within range */
795 if (index)
796 return -EINVAL;
797 *code = V4L2_MBUS_FMT_YUYV10_1X20;
798 return 0;
799 }
800
801 /*
802 * tvp7002_s_stream() - V4L2 decoder i/f handler for s_stream
803 * @sd: pointer to standard V4L2 sub-device structure
804 * @enable: streaming enable or disable
805 *
806 * Sets streaming to enable or disable, if possible.
807 */
tvp7002_s_stream(struct v4l2_subdev * sd,int enable)808 static int tvp7002_s_stream(struct v4l2_subdev *sd, int enable)
809 {
810 struct tvp7002 *device = to_tvp7002(sd);
811 int error = 0;
812
813 if (device->streaming == enable)
814 return 0;
815
816 if (enable) {
817 /* Set output state on (low impedance means stream on) */
818 error = tvp7002_write(sd, TVP7002_MISC_CTL_2, 0x00);
819 device->streaming = enable;
820 } else {
821 /* Set output state off (high impedance means stream off) */
822 error = tvp7002_write(sd, TVP7002_MISC_CTL_2, 0x03);
823 if (error)
824 v4l2_dbg(1, debug, sd, "Unable to stop streaming\n");
825
826 device->streaming = enable;
827 }
828
829 return error;
830 }
831
832 /*
833 * tvp7002_log_status() - Print information about register settings
834 * @sd: ptr to v4l2_subdev struct
835 *
836 * Log register values of a TVP7002 decoder device.
837 * Returns zero or -EINVAL if read operation fails.
838 */
tvp7002_log_status(struct v4l2_subdev * sd)839 static int tvp7002_log_status(struct v4l2_subdev *sd)
840 {
841 const struct tvp7002_preset_definition *presets = tvp7002_presets;
842 struct tvp7002 *device = to_tvp7002(sd);
843 struct v4l2_dv_enum_preset e_preset;
844 struct v4l2_dv_preset detected;
845 int i;
846
847 detected.preset = V4L2_DV_INVALID;
848 /* Find my current standard*/
849 tvp7002_query_dv_preset(sd, &detected);
850
851 /* Print standard related code values */
852 for (i = 0; i < NUM_PRESETS; i++, presets++)
853 if (presets->preset == detected.preset)
854 break;
855
856 if (v4l_fill_dv_preset_info(device->current_preset->preset, &e_preset))
857 return -EINVAL;
858
859 v4l2_info(sd, "Selected DV Preset: %s\n", e_preset.name);
860 v4l2_info(sd, " Pixels per line: %u\n", e_preset.width);
861 v4l2_info(sd, " Lines per frame: %u\n\n", e_preset.height);
862 if (i == NUM_PRESETS) {
863 v4l2_info(sd, "Detected DV Preset: None\n");
864 } else {
865 if (v4l_fill_dv_preset_info(presets->preset, &e_preset))
866 return -EINVAL;
867 v4l2_info(sd, "Detected DV Preset: %s\n", e_preset.name);
868 v4l2_info(sd, " Pixels per line: %u\n", e_preset.width);
869 v4l2_info(sd, " Lines per frame: %u\n\n", e_preset.height);
870 }
871 v4l2_info(sd, "Streaming enabled: %s\n",
872 device->streaming ? "yes" : "no");
873
874 /* Print the current value of the gain control */
875 v4l2_ctrl_handler_log_status(&device->hdl, sd->name);
876
877 return 0;
878 }
879
880 /*
881 * tvp7002_enum_dv_presets() - Enum supported digital video formats
882 * @sd: pointer to standard V4L2 sub-device structure
883 * @preset: pointer to format struct
884 *
885 * Enumerate supported digital video formats.
886 */
tvp7002_enum_dv_presets(struct v4l2_subdev * sd,struct v4l2_dv_enum_preset * preset)887 static int tvp7002_enum_dv_presets(struct v4l2_subdev *sd,
888 struct v4l2_dv_enum_preset *preset)
889 {
890 /* Check requested format index is within range */
891 if (preset->index >= NUM_PRESETS)
892 return -EINVAL;
893
894 return v4l_fill_dv_preset_info(tvp7002_presets[preset->index].preset, preset);
895 }
896
897 static const struct v4l2_ctrl_ops tvp7002_ctrl_ops = {
898 .s_ctrl = tvp7002_s_ctrl,
899 };
900
901 /* V4L2 core operation handlers */
902 static const struct v4l2_subdev_core_ops tvp7002_core_ops = {
903 .g_chip_ident = tvp7002_g_chip_ident,
904 .log_status = tvp7002_log_status,
905 .g_ext_ctrls = v4l2_subdev_g_ext_ctrls,
906 .try_ext_ctrls = v4l2_subdev_try_ext_ctrls,
907 .s_ext_ctrls = v4l2_subdev_s_ext_ctrls,
908 .g_ctrl = v4l2_subdev_g_ctrl,
909 .s_ctrl = v4l2_subdev_s_ctrl,
910 .queryctrl = v4l2_subdev_queryctrl,
911 .querymenu = v4l2_subdev_querymenu,
912 #ifdef CONFIG_VIDEO_ADV_DEBUG
913 .g_register = tvp7002_g_register,
914 .s_register = tvp7002_s_register,
915 #endif
916 };
917
918 /* Specific video subsystem operation handlers */
919 static const struct v4l2_subdev_video_ops tvp7002_video_ops = {
920 .enum_dv_presets = tvp7002_enum_dv_presets,
921 .s_dv_preset = tvp7002_s_dv_preset,
922 .query_dv_preset = tvp7002_query_dv_preset,
923 .s_stream = tvp7002_s_stream,
924 .g_mbus_fmt = tvp7002_mbus_fmt,
925 .try_mbus_fmt = tvp7002_mbus_fmt,
926 .s_mbus_fmt = tvp7002_mbus_fmt,
927 .enum_mbus_fmt = tvp7002_enum_mbus_fmt,
928 };
929
930 /* V4L2 top level operation handlers */
931 static const struct v4l2_subdev_ops tvp7002_ops = {
932 .core = &tvp7002_core_ops,
933 .video = &tvp7002_video_ops,
934 };
935
936 /*
937 * tvp7002_probe - Probe a TVP7002 device
938 * @c: ptr to i2c_client struct
939 * @id: ptr to i2c_device_id struct
940 *
941 * Initialize the TVP7002 device
942 * Returns zero when successful, -EINVAL if register read fails or
943 * -EIO if i2c access is not available.
944 */
tvp7002_probe(struct i2c_client * c,const struct i2c_device_id * id)945 static int tvp7002_probe(struct i2c_client *c, const struct i2c_device_id *id)
946 {
947 struct v4l2_subdev *sd;
948 struct tvp7002 *device;
949 struct v4l2_dv_preset preset;
950 int polarity_a;
951 int polarity_b;
952 u8 revision;
953
954 int error;
955
956 /* Check if the adapter supports the needed features */
957 if (!i2c_check_functionality(c->adapter,
958 I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
959 return -EIO;
960
961 if (!c->dev.platform_data) {
962 v4l_err(c, "No platform data!!\n");
963 return -ENODEV;
964 }
965
966 device = kzalloc(sizeof(struct tvp7002), GFP_KERNEL);
967
968 if (!device)
969 return -ENOMEM;
970
971 sd = &device->sd;
972 device->pdata = c->dev.platform_data;
973 device->current_preset = tvp7002_presets;
974
975 /* Tell v4l2 the device is ready */
976 v4l2_i2c_subdev_init(sd, c, &tvp7002_ops);
977 v4l_info(c, "tvp7002 found @ 0x%02x (%s)\n",
978 c->addr, c->adapter->name);
979
980 error = tvp7002_read(sd, TVP7002_CHIP_REV, &revision);
981 if (error < 0)
982 goto found_error;
983
984 /* Get revision number */
985 v4l2_info(sd, "Rev. %02x detected.\n", revision);
986 if (revision != 0x02)
987 v4l2_info(sd, "Unknown revision detected.\n");
988
989 /* Initializes TVP7002 to its default values */
990 error = tvp7002_write_inittab(sd, tvp7002_init_default);
991
992 if (error < 0)
993 goto found_error;
994
995 /* Set polarity information after registers have been set */
996 polarity_a = 0x20 | device->pdata->hs_polarity << 5
997 | device->pdata->vs_polarity << 2;
998 error = tvp7002_write(sd, TVP7002_SYNC_CTL_1, polarity_a);
999 if (error < 0)
1000 goto found_error;
1001
1002 polarity_b = 0x01 | device->pdata->fid_polarity << 2
1003 | device->pdata->sog_polarity << 1
1004 | device->pdata->clk_polarity;
1005 error = tvp7002_write(sd, TVP7002_MISC_CTL_3, polarity_b);
1006 if (error < 0)
1007 goto found_error;
1008
1009 /* Set registers according to default video mode */
1010 preset.preset = device->current_preset->preset;
1011 error = tvp7002_s_dv_preset(sd, &preset);
1012
1013 v4l2_ctrl_handler_init(&device->hdl, 1);
1014 v4l2_ctrl_new_std(&device->hdl, &tvp7002_ctrl_ops,
1015 V4L2_CID_GAIN, 0, 255, 1, 0);
1016 sd->ctrl_handler = &device->hdl;
1017 if (device->hdl.error) {
1018 int err = device->hdl.error;
1019
1020 v4l2_ctrl_handler_free(&device->hdl);
1021 kfree(device);
1022 return err;
1023 }
1024 v4l2_ctrl_handler_setup(&device->hdl);
1025
1026 found_error:
1027 if (error < 0)
1028 kfree(device);
1029
1030 return error;
1031 }
1032
1033 /*
1034 * tvp7002_remove - Remove TVP7002 device support
1035 * @c: ptr to i2c_client struct
1036 *
1037 * Reset the TVP7002 device
1038 * Returns zero.
1039 */
tvp7002_remove(struct i2c_client * c)1040 static int tvp7002_remove(struct i2c_client *c)
1041 {
1042 struct v4l2_subdev *sd = i2c_get_clientdata(c);
1043 struct tvp7002 *device = to_tvp7002(sd);
1044
1045 v4l2_dbg(1, debug, sd, "Removing tvp7002 adapter"
1046 "on address 0x%x\n", c->addr);
1047
1048 v4l2_device_unregister_subdev(sd);
1049 v4l2_ctrl_handler_free(&device->hdl);
1050 kfree(device);
1051 return 0;
1052 }
1053
1054 /* I2C Device ID table */
1055 static const struct i2c_device_id tvp7002_id[] = {
1056 { "tvp7002", 0 },
1057 { }
1058 };
1059 MODULE_DEVICE_TABLE(i2c, tvp7002_id);
1060
1061 /* I2C driver data */
1062 static struct i2c_driver tvp7002_driver = {
1063 .driver = {
1064 .owner = THIS_MODULE,
1065 .name = TVP7002_MODULE_NAME,
1066 },
1067 .probe = tvp7002_probe,
1068 .remove = tvp7002_remove,
1069 .id_table = tvp7002_id,
1070 };
1071
1072 /*
1073 * tvp7002_init - Initialize driver via I2C interface
1074 *
1075 * Register the TVP7002 driver.
1076 * Return 0 on success or error code on failure.
1077 */
tvp7002_init(void)1078 static int __init tvp7002_init(void)
1079 {
1080 return i2c_add_driver(&tvp7002_driver);
1081 }
1082
1083 /*
1084 * tvp7002_exit - Remove driver via I2C interface
1085 *
1086 * Unregister the TVP7002 driver.
1087 * Returns nothing.
1088 */
tvp7002_exit(void)1089 static void __exit tvp7002_exit(void)
1090 {
1091 i2c_del_driver(&tvp7002_driver);
1092 }
1093
1094 module_init(tvp7002_init);
1095 module_exit(tvp7002_exit);
1096