1 /*
2  * saa7127 - Philips SAA7127/SAA7129 video encoder driver
3  *
4  * Copyright (C) 2003 Roy Bulter <rbulter@hetnet.nl>
5  *
6  * Based on SAA7126 video encoder driver by Gillem & Andreas Oberritter
7  *
8  * Copyright (C) 2000-2001 Gillem <htoa@gmx.net>
9  * Copyright (C) 2002 Andreas Oberritter <obi@saftware.de>
10  *
11  * Based on Stadis 4:2:2 MPEG-2 Decoder Driver by Nathan Laredo
12  *
13  * Copyright (C) 1999 Nathan Laredo <laredo@gnu.org>
14  *
15  * This driver is designed for the Hauppauge 250/350 Linux driver
16  * from the ivtv Project
17  *
18  * Copyright (C) 2003 Kevin Thayer <nufan_wfk@yahoo.com>
19  *
20  * Dual output support:
21  * Copyright (C) 2004 Eric Varsanyi
22  *
23  * NTSC Tuning and 7.5 IRE Setup
24  * Copyright (C) 2004  Chris Kennedy <c@groovy.org>
25  *
26  * VBI additions & cleanup:
27  * Copyright (C) 2004, 2005 Hans Verkuil <hverkuil@xs4all.nl>
28  *
29  * Note: the saa7126 is identical to the saa7127, and the saa7128 is
30  * identical to the saa7129, except that the saa7126 and saa7128 have
31  * macrovision anti-taping support. This driver will almost certainly
32  * work fine for those chips, except of course for the missing anti-taping
33  * support.
34  *
35  * This program is free software; you can redistribute it and/or modify
36  * it under the terms of the GNU General Public License as published by
37  * the Free Software Foundation; either version 2 of the License, or
38  * (at your option) any later version.
39  *
40  * This program is distributed in the hope that it will be useful,
41  * but WITHOUT ANY WARRANTY; without even the implied warranty of
42  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
43  * GNU General Public License for more details.
44  *
45  * You should have received a copy of the GNU General Public License
46  * along with this program; if not, write to the Free Software
47  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
48  */
49 
50 
51 #include <linux/kernel.h>
52 #include <linux/module.h>
53 #include <linux/slab.h>
54 #include <linux/i2c.h>
55 #include <linux/videodev2.h>
56 #include <media/v4l2-device.h>
57 #include <media/v4l2-chip-ident.h>
58 #include <media/saa7127.h>
59 
60 static int debug;
61 static int test_image;
62 
63 MODULE_DESCRIPTION("Philips SAA7127/9 video encoder driver");
64 MODULE_AUTHOR("Kevin Thayer, Chris Kennedy, Hans Verkuil");
65 MODULE_LICENSE("GPL");
66 module_param(debug, int, 0644);
67 module_param(test_image, int, 0644);
68 MODULE_PARM_DESC(debug, "debug level (0-2)");
69 MODULE_PARM_DESC(test_image, "test_image (0-1)");
70 
71 
72 /*
73  * SAA7127 registers
74  */
75 
76 #define SAA7127_REG_STATUS                           0x00
77 #define SAA7127_REG_WIDESCREEN_CONFIG                0x26
78 #define SAA7127_REG_WIDESCREEN_ENABLE                0x27
79 #define SAA7127_REG_BURST_START                      0x28
80 #define SAA7127_REG_BURST_END                        0x29
81 #define SAA7127_REG_COPYGEN_0                        0x2a
82 #define SAA7127_REG_COPYGEN_1                        0x2b
83 #define SAA7127_REG_COPYGEN_2                        0x2c
84 #define SAA7127_REG_OUTPUT_PORT_CONTROL              0x2d
85 #define SAA7127_REG_GAIN_LUMINANCE_RGB               0x38
86 #define SAA7127_REG_GAIN_COLORDIFF_RGB               0x39
87 #define SAA7127_REG_INPUT_PORT_CONTROL_1             0x3a
88 #define SAA7129_REG_FADE_KEY_COL2		     0x4f
89 #define SAA7127_REG_CHROMA_PHASE                     0x5a
90 #define SAA7127_REG_GAINU                            0x5b
91 #define SAA7127_REG_GAINV                            0x5c
92 #define SAA7127_REG_BLACK_LEVEL                      0x5d
93 #define SAA7127_REG_BLANKING_LEVEL                   0x5e
94 #define SAA7127_REG_VBI_BLANKING                     0x5f
95 #define SAA7127_REG_DAC_CONTROL                      0x61
96 #define SAA7127_REG_BURST_AMP                        0x62
97 #define SAA7127_REG_SUBC3                            0x63
98 #define SAA7127_REG_SUBC2                            0x64
99 #define SAA7127_REG_SUBC1                            0x65
100 #define SAA7127_REG_SUBC0                            0x66
101 #define SAA7127_REG_LINE_21_ODD_0                    0x67
102 #define SAA7127_REG_LINE_21_ODD_1                    0x68
103 #define SAA7127_REG_LINE_21_EVEN_0                   0x69
104 #define SAA7127_REG_LINE_21_EVEN_1                   0x6a
105 #define SAA7127_REG_RCV_PORT_CONTROL                 0x6b
106 #define SAA7127_REG_VTRIG                            0x6c
107 #define SAA7127_REG_HTRIG_HI                         0x6d
108 #define SAA7127_REG_MULTI                            0x6e
109 #define SAA7127_REG_CLOSED_CAPTION                   0x6f
110 #define SAA7127_REG_RCV2_OUTPUT_START                0x70
111 #define SAA7127_REG_RCV2_OUTPUT_END                  0x71
112 #define SAA7127_REG_RCV2_OUTPUT_MSBS                 0x72
113 #define SAA7127_REG_TTX_REQUEST_H_START              0x73
114 #define SAA7127_REG_TTX_REQUEST_H_DELAY_LENGTH       0x74
115 #define SAA7127_REG_CSYNC_ADVANCE_VSYNC_SHIFT        0x75
116 #define SAA7127_REG_TTX_ODD_REQ_VERT_START           0x76
117 #define SAA7127_REG_TTX_ODD_REQ_VERT_END             0x77
118 #define SAA7127_REG_TTX_EVEN_REQ_VERT_START          0x78
119 #define SAA7127_REG_TTX_EVEN_REQ_VERT_END            0x79
120 #define SAA7127_REG_FIRST_ACTIVE                     0x7a
121 #define SAA7127_REG_LAST_ACTIVE                      0x7b
122 #define SAA7127_REG_MSB_VERTICAL                     0x7c
123 #define SAA7127_REG_DISABLE_TTX_LINE_LO_0            0x7e
124 #define SAA7127_REG_DISABLE_TTX_LINE_LO_1            0x7f
125 
126 /*
127  **********************************************************************
128  *
129  *  Arrays with configuration parameters for the SAA7127
130  *
131  **********************************************************************
132  */
133 
134 struct i2c_reg_value {
135 	unsigned char reg;
136 	unsigned char value;
137 };
138 
139 static const struct i2c_reg_value saa7129_init_config_extra[] = {
140 	{ SAA7127_REG_OUTPUT_PORT_CONTROL, 		0x38 },
141 	{ SAA7127_REG_VTRIG, 				0xfa },
142 	{ 0, 0 }
143 };
144 
145 static const struct i2c_reg_value saa7127_init_config_common[] = {
146 	{ SAA7127_REG_WIDESCREEN_CONFIG, 		0x0d },
147 	{ SAA7127_REG_WIDESCREEN_ENABLE, 		0x00 },
148 	{ SAA7127_REG_COPYGEN_0, 			0x77 },
149 	{ SAA7127_REG_COPYGEN_1, 			0x41 },
150 	{ SAA7127_REG_COPYGEN_2, 			0x00 },	/* Macrovision enable/disable */
151 	{ SAA7127_REG_OUTPUT_PORT_CONTROL, 		0xbf },
152 	{ SAA7127_REG_GAIN_LUMINANCE_RGB, 		0x00 },
153 	{ SAA7127_REG_GAIN_COLORDIFF_RGB, 		0x00 },
154 	{ SAA7127_REG_INPUT_PORT_CONTROL_1, 		0x80 },	/* for color bars */
155 	{ SAA7127_REG_LINE_21_ODD_0, 			0x77 },
156 	{ SAA7127_REG_LINE_21_ODD_1, 			0x41 },
157 	{ SAA7127_REG_LINE_21_EVEN_0, 			0x88 },
158 	{ SAA7127_REG_LINE_21_EVEN_1, 			0x41 },
159 	{ SAA7127_REG_RCV_PORT_CONTROL, 		0x12 },
160 	{ SAA7127_REG_VTRIG, 				0xf9 },
161 	{ SAA7127_REG_HTRIG_HI, 			0x00 },
162 	{ SAA7127_REG_RCV2_OUTPUT_START, 		0x41 },
163 	{ SAA7127_REG_RCV2_OUTPUT_END, 			0xc3 },
164 	{ SAA7127_REG_RCV2_OUTPUT_MSBS, 		0x00 },
165 	{ SAA7127_REG_TTX_REQUEST_H_START, 		0x3e },
166 	{ SAA7127_REG_TTX_REQUEST_H_DELAY_LENGTH, 	0xb8 },
167 	{ SAA7127_REG_CSYNC_ADVANCE_VSYNC_SHIFT,  	0x03 },
168 	{ SAA7127_REG_TTX_ODD_REQ_VERT_START, 		0x15 },
169 	{ SAA7127_REG_TTX_ODD_REQ_VERT_END, 		0x16 },
170 	{ SAA7127_REG_TTX_EVEN_REQ_VERT_START, 		0x15 },
171 	{ SAA7127_REG_TTX_EVEN_REQ_VERT_END, 		0x16 },
172 	{ SAA7127_REG_FIRST_ACTIVE, 			0x1a },
173 	{ SAA7127_REG_LAST_ACTIVE, 			0x01 },
174 	{ SAA7127_REG_MSB_VERTICAL, 			0xc0 },
175 	{ SAA7127_REG_DISABLE_TTX_LINE_LO_0, 		0x00 },
176 	{ SAA7127_REG_DISABLE_TTX_LINE_LO_1, 		0x00 },
177 	{ 0, 0 }
178 };
179 
180 #define SAA7127_60HZ_DAC_CONTROL 0x15
181 static const struct i2c_reg_value saa7127_init_config_60hz[] = {
182 	{ SAA7127_REG_BURST_START, 			0x19 },
183 	/* BURST_END is also used as a chip ID in saa7127_probe */
184 	{ SAA7127_REG_BURST_END, 			0x1d },
185 	{ SAA7127_REG_CHROMA_PHASE, 			0xa3 },
186 	{ SAA7127_REG_GAINU, 				0x98 },
187 	{ SAA7127_REG_GAINV, 				0xd3 },
188 	{ SAA7127_REG_BLACK_LEVEL, 			0x39 },
189 	{ SAA7127_REG_BLANKING_LEVEL, 			0x2e },
190 	{ SAA7127_REG_VBI_BLANKING, 			0x2e },
191 	{ SAA7127_REG_DAC_CONTROL, 			0x15 },
192 	{ SAA7127_REG_BURST_AMP, 			0x4d },
193 	{ SAA7127_REG_SUBC3, 				0x1f },
194 	{ SAA7127_REG_SUBC2, 				0x7c },
195 	{ SAA7127_REG_SUBC1, 				0xf0 },
196 	{ SAA7127_REG_SUBC0, 				0x21 },
197 	{ SAA7127_REG_MULTI, 				0x90 },
198 	{ SAA7127_REG_CLOSED_CAPTION, 			0x11 },
199 	{ 0, 0 }
200 };
201 
202 #define SAA7127_50HZ_PAL_DAC_CONTROL 0x02
203 static struct i2c_reg_value saa7127_init_config_50hz_pal[] = {
204 	{ SAA7127_REG_BURST_START, 			0x21 },
205 	/* BURST_END is also used as a chip ID in saa7127_probe */
206 	{ SAA7127_REG_BURST_END, 			0x1d },
207 	{ SAA7127_REG_CHROMA_PHASE, 			0x3f },
208 	{ SAA7127_REG_GAINU, 				0x7d },
209 	{ SAA7127_REG_GAINV, 				0xaf },
210 	{ SAA7127_REG_BLACK_LEVEL, 			0x33 },
211 	{ SAA7127_REG_BLANKING_LEVEL, 			0x35 },
212 	{ SAA7127_REG_VBI_BLANKING, 			0x35 },
213 	{ SAA7127_REG_DAC_CONTROL, 			0x02 },
214 	{ SAA7127_REG_BURST_AMP, 			0x2f },
215 	{ SAA7127_REG_SUBC3, 				0xcb },
216 	{ SAA7127_REG_SUBC2, 				0x8a },
217 	{ SAA7127_REG_SUBC1, 				0x09 },
218 	{ SAA7127_REG_SUBC0, 				0x2a },
219 	{ SAA7127_REG_MULTI, 				0xa0 },
220 	{ SAA7127_REG_CLOSED_CAPTION, 			0x00 },
221 	{ 0, 0 }
222 };
223 
224 #define SAA7127_50HZ_SECAM_DAC_CONTROL 0x08
225 static struct i2c_reg_value saa7127_init_config_50hz_secam[] = {
226 	{ SAA7127_REG_BURST_START, 			0x21 },
227 	/* BURST_END is also used as a chip ID in saa7127_probe */
228 	{ SAA7127_REG_BURST_END, 			0x1d },
229 	{ SAA7127_REG_CHROMA_PHASE, 			0x3f },
230 	{ SAA7127_REG_GAINU, 				0x6a },
231 	{ SAA7127_REG_GAINV, 				0x81 },
232 	{ SAA7127_REG_BLACK_LEVEL, 			0x33 },
233 	{ SAA7127_REG_BLANKING_LEVEL, 			0x35 },
234 	{ SAA7127_REG_VBI_BLANKING, 			0x35 },
235 	{ SAA7127_REG_DAC_CONTROL, 			0x08 },
236 	{ SAA7127_REG_BURST_AMP, 			0x2f },
237 	{ SAA7127_REG_SUBC3, 				0xb2 },
238 	{ SAA7127_REG_SUBC2, 				0x3b },
239 	{ SAA7127_REG_SUBC1, 				0xa3 },
240 	{ SAA7127_REG_SUBC0, 				0x28 },
241 	{ SAA7127_REG_MULTI, 				0x90 },
242 	{ SAA7127_REG_CLOSED_CAPTION, 			0x00 },
243 	{ 0, 0 }
244 };
245 
246 /*
247  **********************************************************************
248  *
249  *  Encoder Struct, holds the configuration state of the encoder
250  *
251  **********************************************************************
252  */
253 
254 struct saa7127_state {
255 	struct v4l2_subdev sd;
256 	v4l2_std_id std;
257 	u32 ident;
258 	enum saa7127_input_type input_type;
259 	enum saa7127_output_type output_type;
260 	int video_enable;
261 	int wss_enable;
262 	u16 wss_mode;
263 	int cc_enable;
264 	u16 cc_data;
265 	int xds_enable;
266 	u16 xds_data;
267 	int vps_enable;
268 	u8 vps_data[5];
269 	u8 reg_2d;
270 	u8 reg_3a;
271 	u8 reg_3a_cb;   /* colorbar bit */
272 	u8 reg_61;
273 };
274 
to_state(struct v4l2_subdev * sd)275 static inline struct saa7127_state *to_state(struct v4l2_subdev *sd)
276 {
277 	return container_of(sd, struct saa7127_state, sd);
278 }
279 
280 static const char * const output_strs[] =
281 {
282 	"S-Video + Composite",
283 	"Composite",
284 	"S-Video",
285 	"RGB",
286 	"YUV C",
287 	"YUV V"
288 };
289 
290 static const char * const wss_strs[] = {
291 	"invalid",
292 	"letterbox 14:9 center",
293 	"letterbox 14:9 top",
294 	"invalid",
295 	"letterbox 16:9 top",
296 	"invalid",
297 	"invalid",
298 	"16:9 full format anamorphic",
299 	"4:3 full format",
300 	"invalid",
301 	"invalid",
302 	"letterbox 16:9 center",
303 	"invalid",
304 	"letterbox >16:9 center",
305 	"14:9 full format center",
306 	"invalid",
307 };
308 
309 /* ----------------------------------------------------------------------- */
310 
saa7127_read(struct v4l2_subdev * sd,u8 reg)311 static int saa7127_read(struct v4l2_subdev *sd, u8 reg)
312 {
313 	struct i2c_client *client = v4l2_get_subdevdata(sd);
314 
315 	return i2c_smbus_read_byte_data(client, reg);
316 }
317 
318 /* ----------------------------------------------------------------------- */
319 
saa7127_write(struct v4l2_subdev * sd,u8 reg,u8 val)320 static int saa7127_write(struct v4l2_subdev *sd, u8 reg, u8 val)
321 {
322 	struct i2c_client *client = v4l2_get_subdevdata(sd);
323 	int i;
324 
325 	for (i = 0; i < 3; i++) {
326 		if (i2c_smbus_write_byte_data(client, reg, val) == 0)
327 			return 0;
328 	}
329 	v4l2_err(sd, "I2C Write Problem\n");
330 	return -1;
331 }
332 
333 /* ----------------------------------------------------------------------- */
334 
saa7127_write_inittab(struct v4l2_subdev * sd,const struct i2c_reg_value * regs)335 static int saa7127_write_inittab(struct v4l2_subdev *sd,
336 				 const struct i2c_reg_value *regs)
337 {
338 	while (regs->reg != 0) {
339 		saa7127_write(sd, regs->reg, regs->value);
340 		regs++;
341 	}
342 	return 0;
343 }
344 
345 /* ----------------------------------------------------------------------- */
346 
saa7127_set_vps(struct v4l2_subdev * sd,const struct v4l2_sliced_vbi_data * data)347 static int saa7127_set_vps(struct v4l2_subdev *sd, const struct v4l2_sliced_vbi_data *data)
348 {
349 	struct saa7127_state *state = to_state(sd);
350 	int enable = (data->line != 0);
351 
352 	if (enable && (data->field != 0 || data->line != 16))
353 		return -EINVAL;
354 	if (state->vps_enable != enable) {
355 		v4l2_dbg(1, debug, sd, "Turn VPS Signal %s\n", enable ? "on" : "off");
356 		saa7127_write(sd, 0x54, enable << 7);
357 		state->vps_enable = enable;
358 	}
359 	if (!enable)
360 		return 0;
361 
362 	state->vps_data[0] = data->data[2];
363 	state->vps_data[1] = data->data[8];
364 	state->vps_data[2] = data->data[9];
365 	state->vps_data[3] = data->data[10];
366 	state->vps_data[4] = data->data[11];
367 	v4l2_dbg(1, debug, sd, "Set VPS data %02x %02x %02x %02x %02x\n",
368 		state->vps_data[0], state->vps_data[1],
369 		state->vps_data[2], state->vps_data[3],
370 		state->vps_data[4]);
371 	saa7127_write(sd, 0x55, state->vps_data[0]);
372 	saa7127_write(sd, 0x56, state->vps_data[1]);
373 	saa7127_write(sd, 0x57, state->vps_data[2]);
374 	saa7127_write(sd, 0x58, state->vps_data[3]);
375 	saa7127_write(sd, 0x59, state->vps_data[4]);
376 	return 0;
377 }
378 
379 /* ----------------------------------------------------------------------- */
380 
saa7127_set_cc(struct v4l2_subdev * sd,const struct v4l2_sliced_vbi_data * data)381 static int saa7127_set_cc(struct v4l2_subdev *sd, const struct v4l2_sliced_vbi_data *data)
382 {
383 	struct saa7127_state *state = to_state(sd);
384 	u16 cc = data->data[1] << 8 | data->data[0];
385 	int enable = (data->line != 0);
386 
387 	if (enable && (data->field != 0 || data->line != 21))
388 		return -EINVAL;
389 	if (state->cc_enable != enable) {
390 		v4l2_dbg(1, debug, sd,
391 			"Turn CC %s\n", enable ? "on" : "off");
392 		saa7127_write(sd, SAA7127_REG_CLOSED_CAPTION,
393 			(state->xds_enable << 7) | (enable << 6) | 0x11);
394 		state->cc_enable = enable;
395 	}
396 	if (!enable)
397 		return 0;
398 
399 	v4l2_dbg(2, debug, sd, "CC data: %04x\n", cc);
400 	saa7127_write(sd, SAA7127_REG_LINE_21_ODD_0, cc & 0xff);
401 	saa7127_write(sd, SAA7127_REG_LINE_21_ODD_1, cc >> 8);
402 	state->cc_data = cc;
403 	return 0;
404 }
405 
406 /* ----------------------------------------------------------------------- */
407 
saa7127_set_xds(struct v4l2_subdev * sd,const struct v4l2_sliced_vbi_data * data)408 static int saa7127_set_xds(struct v4l2_subdev *sd, const struct v4l2_sliced_vbi_data *data)
409 {
410 	struct saa7127_state *state = to_state(sd);
411 	u16 xds = data->data[1] << 8 | data->data[0];
412 	int enable = (data->line != 0);
413 
414 	if (enable && (data->field != 1 || data->line != 21))
415 		return -EINVAL;
416 	if (state->xds_enable != enable) {
417 		v4l2_dbg(1, debug, sd, "Turn XDS %s\n", enable ? "on" : "off");
418 		saa7127_write(sd, SAA7127_REG_CLOSED_CAPTION,
419 				(enable << 7) | (state->cc_enable << 6) | 0x11);
420 		state->xds_enable = enable;
421 	}
422 	if (!enable)
423 		return 0;
424 
425 	v4l2_dbg(2, debug, sd, "XDS data: %04x\n", xds);
426 	saa7127_write(sd, SAA7127_REG_LINE_21_EVEN_0, xds & 0xff);
427 	saa7127_write(sd, SAA7127_REG_LINE_21_EVEN_1, xds >> 8);
428 	state->xds_data = xds;
429 	return 0;
430 }
431 
432 /* ----------------------------------------------------------------------- */
433 
saa7127_set_wss(struct v4l2_subdev * sd,const struct v4l2_sliced_vbi_data * data)434 static int saa7127_set_wss(struct v4l2_subdev *sd, const struct v4l2_sliced_vbi_data *data)
435 {
436 	struct saa7127_state *state = to_state(sd);
437 	int enable = (data->line != 0);
438 
439 	if (enable && (data->field != 0 || data->line != 23))
440 		return -EINVAL;
441 	if (state->wss_enable != enable) {
442 		v4l2_dbg(1, debug, sd, "Turn WSS %s\n", enable ? "on" : "off");
443 		saa7127_write(sd, 0x27, enable << 7);
444 		state->wss_enable = enable;
445 	}
446 	if (!enable)
447 		return 0;
448 
449 	saa7127_write(sd, 0x26, data->data[0]);
450 	saa7127_write(sd, 0x27, 0x80 | (data->data[1] & 0x3f));
451 	v4l2_dbg(1, debug, sd,
452 		"WSS mode: %s\n", wss_strs[data->data[0] & 0xf]);
453 	state->wss_mode = (data->data[1] & 0x3f) << 8 | data->data[0];
454 	return 0;
455 }
456 
457 /* ----------------------------------------------------------------------- */
458 
saa7127_set_video_enable(struct v4l2_subdev * sd,int enable)459 static int saa7127_set_video_enable(struct v4l2_subdev *sd, int enable)
460 {
461 	struct saa7127_state *state = to_state(sd);
462 
463 	if (enable) {
464 		v4l2_dbg(1, debug, sd, "Enable Video Output\n");
465 		saa7127_write(sd, 0x2d, state->reg_2d);
466 		saa7127_write(sd, 0x61, state->reg_61);
467 	} else {
468 		v4l2_dbg(1, debug, sd, "Disable Video Output\n");
469 		saa7127_write(sd, 0x2d, (state->reg_2d & 0xf0));
470 		saa7127_write(sd, 0x61, (state->reg_61 | 0xc0));
471 	}
472 	state->video_enable = enable;
473 	return 0;
474 }
475 
476 /* ----------------------------------------------------------------------- */
477 
saa7127_set_std(struct v4l2_subdev * sd,v4l2_std_id std)478 static int saa7127_set_std(struct v4l2_subdev *sd, v4l2_std_id std)
479 {
480 	struct saa7127_state *state = to_state(sd);
481 	const struct i2c_reg_value *inittab;
482 
483 	if (std & V4L2_STD_525_60) {
484 		v4l2_dbg(1, debug, sd, "Selecting 60 Hz video Standard\n");
485 		inittab = saa7127_init_config_60hz;
486 		state->reg_61 = SAA7127_60HZ_DAC_CONTROL;
487 
488 	} else if (state->ident == V4L2_IDENT_SAA7129 &&
489 		   (std & V4L2_STD_SECAM) &&
490 		   !(std & (V4L2_STD_625_50 & ~V4L2_STD_SECAM))) {
491 
492 		/* If and only if SECAM, with a SAA712[89] */
493 		v4l2_dbg(1, debug, sd,
494 			 "Selecting 50 Hz SECAM video Standard\n");
495 		inittab = saa7127_init_config_50hz_secam;
496 		state->reg_61 = SAA7127_50HZ_SECAM_DAC_CONTROL;
497 
498 	} else {
499 		v4l2_dbg(1, debug, sd, "Selecting 50 Hz PAL video Standard\n");
500 		inittab = saa7127_init_config_50hz_pal;
501 		state->reg_61 = SAA7127_50HZ_PAL_DAC_CONTROL;
502 	}
503 
504 	/* Write Table */
505 	saa7127_write_inittab(sd, inittab);
506 	state->std = std;
507 	return 0;
508 }
509 
510 /* ----------------------------------------------------------------------- */
511 
saa7127_set_output_type(struct v4l2_subdev * sd,int output)512 static int saa7127_set_output_type(struct v4l2_subdev *sd, int output)
513 {
514 	struct saa7127_state *state = to_state(sd);
515 
516 	switch (output) {
517 	case SAA7127_OUTPUT_TYPE_RGB:
518 		state->reg_2d = 0x0f;	/* RGB + CVBS (for sync) */
519 		state->reg_3a = 0x13;	/* by default switch YUV to RGB-matrix on */
520 		break;
521 
522 	case SAA7127_OUTPUT_TYPE_COMPOSITE:
523 		if (state->ident == V4L2_IDENT_SAA7129)
524 			state->reg_2d = 0x20;	/* CVBS only */
525 		else
526 			state->reg_2d = 0x08;	/* 00001000 CVBS only, RGB DAC's off (high impedance mode) */
527 		state->reg_3a = 0x13;	/* by default switch YUV to RGB-matrix on */
528 		break;
529 
530 	case SAA7127_OUTPUT_TYPE_SVIDEO:
531 		if (state->ident == V4L2_IDENT_SAA7129)
532 			state->reg_2d = 0x18;	/* Y + C */
533 		else
534 			state->reg_2d = 0xff;   /*11111111  croma -> R, luma -> CVBS + G + B */
535 		state->reg_3a = 0x13;	/* by default switch YUV to RGB-matrix on */
536 		break;
537 
538 	case SAA7127_OUTPUT_TYPE_YUV_V:
539 		state->reg_2d = 0x4f;	/* reg 2D = 01001111, all DAC's on, RGB + VBS */
540 		state->reg_3a = 0x0b;	/* reg 3A = 00001011, bypass RGB-matrix */
541 		break;
542 
543 	case SAA7127_OUTPUT_TYPE_YUV_C:
544 		state->reg_2d = 0x0f;	/* reg 2D = 00001111, all DAC's on, RGB + CVBS */
545 		state->reg_3a = 0x0b;	/* reg 3A = 00001011, bypass RGB-matrix */
546 		break;
547 
548 	case SAA7127_OUTPUT_TYPE_BOTH:
549 		if (state->ident == V4L2_IDENT_SAA7129)
550 			state->reg_2d = 0x38;
551 		else
552 			state->reg_2d = 0xbf;
553 		state->reg_3a = 0x13;	/* by default switch YUV to RGB-matrix on */
554 		break;
555 
556 	default:
557 		return -EINVAL;
558 	}
559 	v4l2_dbg(1, debug, sd,
560 		"Selecting %s output type\n", output_strs[output]);
561 
562 	/* Configure Encoder */
563 	saa7127_write(sd, 0x2d, state->reg_2d);
564 	saa7127_write(sd, 0x3a, state->reg_3a | state->reg_3a_cb);
565 	state->output_type = output;
566 	return 0;
567 }
568 
569 /* ----------------------------------------------------------------------- */
570 
saa7127_set_input_type(struct v4l2_subdev * sd,int input)571 static int saa7127_set_input_type(struct v4l2_subdev *sd, int input)
572 {
573 	struct saa7127_state *state = to_state(sd);
574 
575 	switch (input) {
576 	case SAA7127_INPUT_TYPE_NORMAL:	/* avia */
577 		v4l2_dbg(1, debug, sd, "Selecting Normal Encoder Input\n");
578 		state->reg_3a_cb = 0;
579 		break;
580 
581 	case SAA7127_INPUT_TYPE_TEST_IMAGE:	/* color bar */
582 		v4l2_dbg(1, debug, sd, "Selecting Color Bar generator\n");
583 		state->reg_3a_cb = 0x80;
584 		break;
585 
586 	default:
587 		return -EINVAL;
588 	}
589 	saa7127_write(sd, 0x3a, state->reg_3a | state->reg_3a_cb);
590 	state->input_type = input;
591 	return 0;
592 }
593 
594 /* ----------------------------------------------------------------------- */
595 
saa7127_s_std_output(struct v4l2_subdev * sd,v4l2_std_id std)596 static int saa7127_s_std_output(struct v4l2_subdev *sd, v4l2_std_id std)
597 {
598 	struct saa7127_state *state = to_state(sd);
599 
600 	if (state->std == std)
601 		return 0;
602 	return saa7127_set_std(sd, std);
603 }
604 
saa7127_s_routing(struct v4l2_subdev * sd,u32 input,u32 output,u32 config)605 static int saa7127_s_routing(struct v4l2_subdev *sd,
606 			     u32 input, u32 output, u32 config)
607 {
608 	struct saa7127_state *state = to_state(sd);
609 	int rc = 0;
610 
611 	if (state->input_type != input)
612 		rc = saa7127_set_input_type(sd, input);
613 	if (rc == 0 && state->output_type != output)
614 		rc = saa7127_set_output_type(sd, output);
615 	return rc;
616 }
617 
saa7127_s_stream(struct v4l2_subdev * sd,int enable)618 static int saa7127_s_stream(struct v4l2_subdev *sd, int enable)
619 {
620 	struct saa7127_state *state = to_state(sd);
621 
622 	if (state->video_enable == enable)
623 		return 0;
624 	return saa7127_set_video_enable(sd, enable);
625 }
626 
saa7127_g_sliced_fmt(struct v4l2_subdev * sd,struct v4l2_sliced_vbi_format * fmt)627 static int saa7127_g_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *fmt)
628 {
629 	struct saa7127_state *state = to_state(sd);
630 
631 	memset(fmt, 0, sizeof(*fmt));
632 	if (state->vps_enable)
633 		fmt->service_lines[0][16] = V4L2_SLICED_VPS;
634 	if (state->wss_enable)
635 		fmt->service_lines[0][23] = V4L2_SLICED_WSS_625;
636 	if (state->cc_enable) {
637 		fmt->service_lines[0][21] = V4L2_SLICED_CAPTION_525;
638 		fmt->service_lines[1][21] = V4L2_SLICED_CAPTION_525;
639 	}
640 	fmt->service_set =
641 		(state->vps_enable ? V4L2_SLICED_VPS : 0) |
642 		(state->wss_enable ? V4L2_SLICED_WSS_625 : 0) |
643 		(state->cc_enable ? V4L2_SLICED_CAPTION_525 : 0);
644 	return 0;
645 }
646 
saa7127_s_vbi_data(struct v4l2_subdev * sd,const struct v4l2_sliced_vbi_data * data)647 static int saa7127_s_vbi_data(struct v4l2_subdev *sd, const struct v4l2_sliced_vbi_data *data)
648 {
649 	switch (data->id) {
650 	case V4L2_SLICED_WSS_625:
651 		return saa7127_set_wss(sd, data);
652 	case V4L2_SLICED_VPS:
653 		return saa7127_set_vps(sd, data);
654 	case V4L2_SLICED_CAPTION_525:
655 		if (data->field == 0)
656 			return saa7127_set_cc(sd, data);
657 		return saa7127_set_xds(sd, data);
658 	default:
659 		return -EINVAL;
660 	}
661 	return 0;
662 }
663 
664 #ifdef CONFIG_VIDEO_ADV_DEBUG
saa7127_g_register(struct v4l2_subdev * sd,struct v4l2_dbg_register * reg)665 static int saa7127_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
666 {
667 	struct i2c_client *client = v4l2_get_subdevdata(sd);
668 
669 	if (!v4l2_chip_match_i2c_client(client, &reg->match))
670 		return -EINVAL;
671 	if (!capable(CAP_SYS_ADMIN))
672 		return -EPERM;
673 	reg->val = saa7127_read(sd, reg->reg & 0xff);
674 	reg->size = 1;
675 	return 0;
676 }
677 
saa7127_s_register(struct v4l2_subdev * sd,struct v4l2_dbg_register * reg)678 static int saa7127_s_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
679 {
680 	struct i2c_client *client = v4l2_get_subdevdata(sd);
681 
682 	if (!v4l2_chip_match_i2c_client(client, &reg->match))
683 		return -EINVAL;
684 	if (!capable(CAP_SYS_ADMIN))
685 		return -EPERM;
686 	saa7127_write(sd, reg->reg & 0xff, reg->val & 0xff);
687 	return 0;
688 }
689 #endif
690 
saa7127_g_chip_ident(struct v4l2_subdev * sd,struct v4l2_dbg_chip_ident * chip)691 static int saa7127_g_chip_ident(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *chip)
692 {
693 	struct saa7127_state *state = to_state(sd);
694 	struct i2c_client *client = v4l2_get_subdevdata(sd);
695 
696 	return v4l2_chip_ident_i2c_client(client, chip, state->ident, 0);
697 }
698 
saa7127_log_status(struct v4l2_subdev * sd)699 static int saa7127_log_status(struct v4l2_subdev *sd)
700 {
701 	struct saa7127_state *state = to_state(sd);
702 
703 	v4l2_info(sd, "Standard: %s\n", (state->std & V4L2_STD_525_60) ? "60 Hz" : "50 Hz");
704 	v4l2_info(sd, "Input:    %s\n", state->input_type ?  "color bars" : "normal");
705 	v4l2_info(sd, "Output:   %s\n", state->video_enable ?
706 			output_strs[state->output_type] : "disabled");
707 	v4l2_info(sd, "WSS:      %s\n", state->wss_enable ?
708 			wss_strs[state->wss_mode] : "disabled");
709 	v4l2_info(sd, "VPS:      %s\n", state->vps_enable ? "enabled" : "disabled");
710 	v4l2_info(sd, "CC:       %s\n", state->cc_enable ? "enabled" : "disabled");
711 	return 0;
712 }
713 
714 /* ----------------------------------------------------------------------- */
715 
716 static const struct v4l2_subdev_core_ops saa7127_core_ops = {
717 	.log_status = saa7127_log_status,
718 	.g_chip_ident = saa7127_g_chip_ident,
719 #ifdef CONFIG_VIDEO_ADV_DEBUG
720 	.g_register = saa7127_g_register,
721 	.s_register = saa7127_s_register,
722 #endif
723 };
724 
725 static const struct v4l2_subdev_video_ops saa7127_video_ops = {
726 	.s_std_output = saa7127_s_std_output,
727 	.s_routing = saa7127_s_routing,
728 	.s_stream = saa7127_s_stream,
729 };
730 
731 static const struct v4l2_subdev_vbi_ops saa7127_vbi_ops = {
732 	.s_vbi_data = saa7127_s_vbi_data,
733 	.g_sliced_fmt = saa7127_g_sliced_fmt,
734 };
735 
736 static const struct v4l2_subdev_ops saa7127_ops = {
737 	.core = &saa7127_core_ops,
738 	.video = &saa7127_video_ops,
739 	.vbi = &saa7127_vbi_ops,
740 };
741 
742 /* ----------------------------------------------------------------------- */
743 
saa7127_probe(struct i2c_client * client,const struct i2c_device_id * id)744 static int saa7127_probe(struct i2c_client *client,
745 			 const struct i2c_device_id *id)
746 {
747 	struct saa7127_state *state;
748 	struct v4l2_subdev *sd;
749 	struct v4l2_sliced_vbi_data vbi = { 0, 0, 0, 0 };  /* set to disabled */
750 
751 	/* Check if the adapter supports the needed features */
752 	if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
753 		return -EIO;
754 
755 	v4l_dbg(1, debug, client, "detecting saa7127 client on address 0x%x\n",
756 			client->addr << 1);
757 
758 	state = kzalloc(sizeof(struct saa7127_state), GFP_KERNEL);
759 	if (state == NULL)
760 		return -ENOMEM;
761 
762 	sd = &state->sd;
763 	v4l2_i2c_subdev_init(sd, client, &saa7127_ops);
764 
765 	/* First test register 0: Bits 5-7 are a version ID (should be 0),
766 	   and bit 2 should also be 0.
767 	   This is rather general, so the second test is more specific and
768 	   looks at the 'ending point of burst in clock cycles' which is
769 	   0x1d after a reset and not expected to ever change. */
770 	if ((saa7127_read(sd, 0) & 0xe4) != 0 ||
771 			(saa7127_read(sd, 0x29) & 0x3f) != 0x1d) {
772 		v4l2_dbg(1, debug, sd, "saa7127 not found\n");
773 		kfree(state);
774 		return -ENODEV;
775 	}
776 
777 	if (id->driver_data) {	/* Chip type is already known */
778 		state->ident = id->driver_data;
779 	} else {		/* Needs detection */
780 		int read_result;
781 
782 		/* Detect if it's an saa7129 */
783 		read_result = saa7127_read(sd, SAA7129_REG_FADE_KEY_COL2);
784 		saa7127_write(sd, SAA7129_REG_FADE_KEY_COL2, 0xaa);
785 		if (saa7127_read(sd, SAA7129_REG_FADE_KEY_COL2) == 0xaa) {
786 			saa7127_write(sd, SAA7129_REG_FADE_KEY_COL2,
787 					read_result);
788 			state->ident = V4L2_IDENT_SAA7129;
789 			strlcpy(client->name, "saa7129", I2C_NAME_SIZE);
790 		} else {
791 			state->ident = V4L2_IDENT_SAA7127;
792 			strlcpy(client->name, "saa7127", I2C_NAME_SIZE);
793 		}
794 	}
795 
796 	v4l2_info(sd, "%s found @ 0x%x (%s)\n", client->name,
797 			client->addr << 1, client->adapter->name);
798 
799 	v4l2_dbg(1, debug, sd, "Configuring encoder\n");
800 	saa7127_write_inittab(sd, saa7127_init_config_common);
801 	saa7127_set_std(sd, V4L2_STD_NTSC);
802 	saa7127_set_output_type(sd, SAA7127_OUTPUT_TYPE_BOTH);
803 	saa7127_set_vps(sd, &vbi);
804 	saa7127_set_wss(sd, &vbi);
805 	saa7127_set_cc(sd, &vbi);
806 	saa7127_set_xds(sd, &vbi);
807 	if (test_image == 1)
808 		/* The Encoder has an internal Colorbar generator */
809 		/* This can be used for debugging */
810 		saa7127_set_input_type(sd, SAA7127_INPUT_TYPE_TEST_IMAGE);
811 	else
812 		saa7127_set_input_type(sd, SAA7127_INPUT_TYPE_NORMAL);
813 	saa7127_set_video_enable(sd, 1);
814 
815 	if (state->ident == V4L2_IDENT_SAA7129)
816 		saa7127_write_inittab(sd, saa7129_init_config_extra);
817 	return 0;
818 }
819 
820 /* ----------------------------------------------------------------------- */
821 
saa7127_remove(struct i2c_client * client)822 static int saa7127_remove(struct i2c_client *client)
823 {
824 	struct v4l2_subdev *sd = i2c_get_clientdata(client);
825 
826 	v4l2_device_unregister_subdev(sd);
827 	/* Turn off TV output */
828 	saa7127_set_video_enable(sd, 0);
829 	kfree(to_state(sd));
830 	return 0;
831 }
832 
833 /* ----------------------------------------------------------------------- */
834 
835 static struct i2c_device_id saa7127_id[] = {
836 	{ "saa7127_auto", 0 },	/* auto-detection */
837 	{ "saa7126", V4L2_IDENT_SAA7127 },
838 	{ "saa7127", V4L2_IDENT_SAA7127 },
839 	{ "saa7128", V4L2_IDENT_SAA7129 },
840 	{ "saa7129", V4L2_IDENT_SAA7129 },
841 	{ }
842 };
843 MODULE_DEVICE_TABLE(i2c, saa7127_id);
844 
845 static struct i2c_driver saa7127_driver = {
846 	.driver = {
847 		.owner	= THIS_MODULE,
848 		.name	= "saa7127",
849 	},
850 	.probe		= saa7127_probe,
851 	.remove		= saa7127_remove,
852 	.id_table	= saa7127_id,
853 };
854 
init_saa7127(void)855 static __init int init_saa7127(void)
856 {
857 	return i2c_add_driver(&saa7127_driver);
858 }
859 
exit_saa7127(void)860 static __exit void exit_saa7127(void)
861 {
862 	i2c_del_driver(&saa7127_driver);
863 }
864 
865 module_init(init_saa7127);
866 module_exit(exit_saa7127);
867