1 /*
2 * Support for LGDT3302 and LGDT3303 - VSB/QAM
3 *
4 * Copyright (C) 2005 Wilson Michaels <wilsonmichaels@earthlink.net>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 *
20 */
21
22 /*
23 * NOTES ABOUT THIS DRIVER
24 *
25 * This Linux driver supports:
26 * DViCO FusionHDTV 3 Gold-Q
27 * DViCO FusionHDTV 3 Gold-T
28 * DViCO FusionHDTV 5 Gold
29 * DViCO FusionHDTV 5 Lite
30 * DViCO FusionHDTV 5 USB Gold
31 * Air2PC/AirStar 2 ATSC 3rd generation (HD5000)
32 * pcHDTV HD5500
33 *
34 */
35
36 #include <linux/kernel.h>
37 #include <linux/module.h>
38 #include <linux/init.h>
39 #include <linux/delay.h>
40 #include <linux/string.h>
41 #include <linux/slab.h>
42 #include <asm/byteorder.h>
43
44 #include "dvb_frontend.h"
45 #include "dvb_math.h"
46 #include "lgdt330x_priv.h"
47 #include "lgdt330x.h"
48
49 /* Use Equalizer Mean Squared Error instead of Phaser Tracker MSE */
50 /* #define USE_EQMSE */
51
52 static int debug;
53 module_param(debug, int, 0644);
54 MODULE_PARM_DESC(debug,"Turn on/off lgdt330x frontend debugging (default:off).");
55 #define dprintk(args...) \
56 do { \
57 if (debug) printk(KERN_DEBUG "lgdt330x: " args); \
58 } while (0)
59
60 struct lgdt330x_state
61 {
62 struct i2c_adapter* i2c;
63
64 /* Configuration settings */
65 const struct lgdt330x_config* config;
66
67 struct dvb_frontend frontend;
68
69 /* Demodulator private data */
70 fe_modulation_t current_modulation;
71 u32 snr; /* Result of last SNR calculation */
72
73 /* Tuner private data */
74 u32 current_frequency;
75 };
76
i2c_write_demod_bytes(struct lgdt330x_state * state,u8 * buf,int len)77 static int i2c_write_demod_bytes (struct lgdt330x_state* state,
78 u8 *buf, /* data bytes to send */
79 int len /* number of bytes to send */ )
80 {
81 struct i2c_msg msg =
82 { .addr = state->config->demod_address,
83 .flags = 0,
84 .buf = buf,
85 .len = 2 };
86 int i;
87 int err;
88
89 for (i=0; i<len-1; i+=2){
90 if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
91 printk(KERN_WARNING "lgdt330x: %s error (addr %02x <- %02x, err = %i)\n", __func__, msg.buf[0], msg.buf[1], err);
92 if (err < 0)
93 return err;
94 else
95 return -EREMOTEIO;
96 }
97 msg.buf += 2;
98 }
99 return 0;
100 }
101
102 /*
103 * This routine writes the register (reg) to the demod bus
104 * then reads the data returned for (len) bytes.
105 */
106
i2c_read_demod_bytes(struct lgdt330x_state * state,enum I2C_REG reg,u8 * buf,int len)107 static u8 i2c_read_demod_bytes (struct lgdt330x_state* state,
108 enum I2C_REG reg, u8* buf, int len)
109 {
110 u8 wr [] = { reg };
111 struct i2c_msg msg [] = {
112 { .addr = state->config->demod_address,
113 .flags = 0, .buf = wr, .len = 1 },
114 { .addr = state->config->demod_address,
115 .flags = I2C_M_RD, .buf = buf, .len = len },
116 };
117 int ret;
118 ret = i2c_transfer(state->i2c, msg, 2);
119 if (ret != 2) {
120 printk(KERN_WARNING "lgdt330x: %s: addr 0x%02x select 0x%02x error (ret == %i)\n", __func__, state->config->demod_address, reg, ret);
121 } else {
122 ret = 0;
123 }
124 return ret;
125 }
126
127 /* Software reset */
lgdt3302_SwReset(struct lgdt330x_state * state)128 static int lgdt3302_SwReset(struct lgdt330x_state* state)
129 {
130 u8 ret;
131 u8 reset[] = {
132 IRQ_MASK,
133 0x00 /* bit 6 is active low software reset
134 * bits 5-0 are 1 to mask interrupts */
135 };
136
137 ret = i2c_write_demod_bytes(state,
138 reset, sizeof(reset));
139 if (ret == 0) {
140
141 /* force reset high (inactive) and unmask interrupts */
142 reset[1] = 0x7f;
143 ret = i2c_write_demod_bytes(state,
144 reset, sizeof(reset));
145 }
146 return ret;
147 }
148
lgdt3303_SwReset(struct lgdt330x_state * state)149 static int lgdt3303_SwReset(struct lgdt330x_state* state)
150 {
151 u8 ret;
152 u8 reset[] = {
153 0x02,
154 0x00 /* bit 0 is active low software reset */
155 };
156
157 ret = i2c_write_demod_bytes(state,
158 reset, sizeof(reset));
159 if (ret == 0) {
160
161 /* force reset high (inactive) */
162 reset[1] = 0x01;
163 ret = i2c_write_demod_bytes(state,
164 reset, sizeof(reset));
165 }
166 return ret;
167 }
168
lgdt330x_SwReset(struct lgdt330x_state * state)169 static int lgdt330x_SwReset(struct lgdt330x_state* state)
170 {
171 switch (state->config->demod_chip) {
172 case LGDT3302:
173 return lgdt3302_SwReset(state);
174 case LGDT3303:
175 return lgdt3303_SwReset(state);
176 default:
177 return -ENODEV;
178 }
179 }
180
lgdt330x_init(struct dvb_frontend * fe)181 static int lgdt330x_init(struct dvb_frontend* fe)
182 {
183 /* Hardware reset is done using gpio[0] of cx23880x chip.
184 * I'd like to do it here, but don't know how to find chip address.
185 * cx88-cards.c arranges for the reset bit to be inactive (high).
186 * Maybe there needs to be a callable function in cx88-core or
187 * the caller of this function needs to do it. */
188
189 /*
190 * Array of byte pairs <address, value>
191 * to initialize each different chip
192 */
193 static u8 lgdt3302_init_data[] = {
194 /* Use 50MHz parameter values from spec sheet since xtal is 50 */
195 /* Change the value of NCOCTFV[25:0] of carrier
196 recovery center frequency register */
197 VSB_CARRIER_FREQ0, 0x00,
198 VSB_CARRIER_FREQ1, 0x87,
199 VSB_CARRIER_FREQ2, 0x8e,
200 VSB_CARRIER_FREQ3, 0x01,
201 /* Change the TPCLK pin polarity
202 data is valid on falling clock */
203 DEMUX_CONTROL, 0xfb,
204 /* Change the value of IFBW[11:0] of
205 AGC IF/RF loop filter bandwidth register */
206 AGC_RF_BANDWIDTH0, 0x40,
207 AGC_RF_BANDWIDTH1, 0x93,
208 AGC_RF_BANDWIDTH2, 0x00,
209 /* Change the value of bit 6, 'nINAGCBY' and
210 'NSSEL[1:0] of ACG function control register 2 */
211 AGC_FUNC_CTRL2, 0xc6,
212 /* Change the value of bit 6 'RFFIX'
213 of AGC function control register 3 */
214 AGC_FUNC_CTRL3, 0x40,
215 /* Set the value of 'INLVTHD' register 0x2a/0x2c
216 to 0x7fe */
217 AGC_DELAY0, 0x07,
218 AGC_DELAY2, 0xfe,
219 /* Change the value of IAGCBW[15:8]
220 of inner AGC loop filter bandwidth */
221 AGC_LOOP_BANDWIDTH0, 0x08,
222 AGC_LOOP_BANDWIDTH1, 0x9a
223 };
224
225 static u8 lgdt3303_init_data[] = {
226 0x4c, 0x14
227 };
228
229 static u8 flip_1_lgdt3303_init_data[] = {
230 0x4c, 0x14,
231 0x87, 0xf3
232 };
233
234 static u8 flip_2_lgdt3303_init_data[] = {
235 0x4c, 0x14,
236 0x87, 0xda
237 };
238
239 struct lgdt330x_state* state = fe->demodulator_priv;
240 char *chip_name;
241 int err;
242
243 switch (state->config->demod_chip) {
244 case LGDT3302:
245 chip_name = "LGDT3302";
246 err = i2c_write_demod_bytes(state, lgdt3302_init_data,
247 sizeof(lgdt3302_init_data));
248 break;
249 case LGDT3303:
250 chip_name = "LGDT3303";
251 switch (state->config->clock_polarity_flip) {
252 case 2:
253 err = i2c_write_demod_bytes(state,
254 flip_2_lgdt3303_init_data,
255 sizeof(flip_2_lgdt3303_init_data));
256 break;
257 case 1:
258 err = i2c_write_demod_bytes(state,
259 flip_1_lgdt3303_init_data,
260 sizeof(flip_1_lgdt3303_init_data));
261 break;
262 case 0:
263 default:
264 err = i2c_write_demod_bytes(state, lgdt3303_init_data,
265 sizeof(lgdt3303_init_data));
266 }
267 break;
268 default:
269 chip_name = "undefined";
270 printk (KERN_WARNING "Only LGDT3302 and LGDT3303 are supported chips.\n");
271 err = -ENODEV;
272 }
273 dprintk("%s entered as %s\n", __func__, chip_name);
274 if (err < 0)
275 return err;
276 return lgdt330x_SwReset(state);
277 }
278
lgdt330x_read_ber(struct dvb_frontend * fe,u32 * ber)279 static int lgdt330x_read_ber(struct dvb_frontend* fe, u32* ber)
280 {
281 *ber = 0; /* Not supplied by the demod chips */
282 return 0;
283 }
284
lgdt330x_read_ucblocks(struct dvb_frontend * fe,u32 * ucblocks)285 static int lgdt330x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
286 {
287 struct lgdt330x_state* state = fe->demodulator_priv;
288 int err;
289 u8 buf[2];
290
291 *ucblocks = 0;
292
293 switch (state->config->demod_chip) {
294 case LGDT3302:
295 err = i2c_read_demod_bytes(state, LGDT3302_PACKET_ERR_COUNTER1,
296 buf, sizeof(buf));
297 break;
298 case LGDT3303:
299 err = i2c_read_demod_bytes(state, LGDT3303_PACKET_ERR_COUNTER1,
300 buf, sizeof(buf));
301 break;
302 default:
303 printk(KERN_WARNING
304 "Only LGDT3302 and LGDT3303 are supported chips.\n");
305 err = -ENODEV;
306 }
307 if (err < 0)
308 return err;
309
310 *ucblocks = (buf[0] << 8) | buf[1];
311 return 0;
312 }
313
lgdt330x_set_parameters(struct dvb_frontend * fe)314 static int lgdt330x_set_parameters(struct dvb_frontend *fe)
315 {
316 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
317 /*
318 * Array of byte pairs <address, value>
319 * to initialize 8VSB for lgdt3303 chip 50 MHz IF
320 */
321 static u8 lgdt3303_8vsb_44_data[] = {
322 0x04, 0x00,
323 0x0d, 0x40,
324 0x0e, 0x87,
325 0x0f, 0x8e,
326 0x10, 0x01,
327 0x47, 0x8b };
328
329 /*
330 * Array of byte pairs <address, value>
331 * to initialize QAM for lgdt3303 chip
332 */
333 static u8 lgdt3303_qam_data[] = {
334 0x04, 0x00,
335 0x0d, 0x00,
336 0x0e, 0x00,
337 0x0f, 0x00,
338 0x10, 0x00,
339 0x51, 0x63,
340 0x47, 0x66,
341 0x48, 0x66,
342 0x4d, 0x1a,
343 0x49, 0x08,
344 0x4a, 0x9b };
345
346 struct lgdt330x_state* state = fe->demodulator_priv;
347
348 static u8 top_ctrl_cfg[] = { TOP_CONTROL, 0x03 };
349
350 int err = 0;
351 /* Change only if we are actually changing the modulation */
352 if (state->current_modulation != p->modulation) {
353 switch (p->modulation) {
354 case VSB_8:
355 dprintk("%s: VSB_8 MODE\n", __func__);
356
357 /* Select VSB mode */
358 top_ctrl_cfg[1] = 0x03;
359
360 /* Select ANT connector if supported by card */
361 if (state->config->pll_rf_set)
362 state->config->pll_rf_set(fe, 1);
363
364 if (state->config->demod_chip == LGDT3303) {
365 err = i2c_write_demod_bytes(state, lgdt3303_8vsb_44_data,
366 sizeof(lgdt3303_8vsb_44_data));
367 }
368 break;
369
370 case QAM_64:
371 dprintk("%s: QAM_64 MODE\n", __func__);
372
373 /* Select QAM_64 mode */
374 top_ctrl_cfg[1] = 0x00;
375
376 /* Select CABLE connector if supported by card */
377 if (state->config->pll_rf_set)
378 state->config->pll_rf_set(fe, 0);
379
380 if (state->config->demod_chip == LGDT3303) {
381 err = i2c_write_demod_bytes(state, lgdt3303_qam_data,
382 sizeof(lgdt3303_qam_data));
383 }
384 break;
385
386 case QAM_256:
387 dprintk("%s: QAM_256 MODE\n", __func__);
388
389 /* Select QAM_256 mode */
390 top_ctrl_cfg[1] = 0x01;
391
392 /* Select CABLE connector if supported by card */
393 if (state->config->pll_rf_set)
394 state->config->pll_rf_set(fe, 0);
395
396 if (state->config->demod_chip == LGDT3303) {
397 err = i2c_write_demod_bytes(state, lgdt3303_qam_data,
398 sizeof(lgdt3303_qam_data));
399 }
400 break;
401 default:
402 printk(KERN_WARNING "lgdt330x: %s: Modulation type(%d) UNSUPPORTED\n", __func__, p->modulation);
403 return -1;
404 }
405 if (err < 0)
406 printk(KERN_WARNING "lgdt330x: %s: error blasting "
407 "bytes to lgdt3303 for modulation type(%d)\n",
408 __func__, p->modulation);
409
410 /*
411 * select serial or parallel MPEG harware interface
412 * Serial: 0x04 for LGDT3302 or 0x40 for LGDT3303
413 * Parallel: 0x00
414 */
415 top_ctrl_cfg[1] |= state->config->serial_mpeg;
416
417 /* Select the requested mode */
418 i2c_write_demod_bytes(state, top_ctrl_cfg,
419 sizeof(top_ctrl_cfg));
420 if (state->config->set_ts_params)
421 state->config->set_ts_params(fe, 0);
422 state->current_modulation = p->modulation;
423 }
424
425 /* Tune to the specified frequency */
426 if (fe->ops.tuner_ops.set_params) {
427 fe->ops.tuner_ops.set_params(fe);
428 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
429 }
430
431 /* Keep track of the new frequency */
432 /* FIXME this is the wrong way to do this... */
433 /* The tuner is shared with the video4linux analog API */
434 state->current_frequency = p->frequency;
435
436 lgdt330x_SwReset(state);
437 return 0;
438 }
439
lgdt330x_get_frontend(struct dvb_frontend * fe)440 static int lgdt330x_get_frontend(struct dvb_frontend *fe)
441 {
442 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
443 struct lgdt330x_state *state = fe->demodulator_priv;
444 p->frequency = state->current_frequency;
445 return 0;
446 }
447
lgdt3302_read_status(struct dvb_frontend * fe,fe_status_t * status)448 static int lgdt3302_read_status(struct dvb_frontend* fe, fe_status_t* status)
449 {
450 struct lgdt330x_state* state = fe->demodulator_priv;
451 u8 buf[3];
452
453 *status = 0; /* Reset status result */
454
455 /* AGC status register */
456 i2c_read_demod_bytes(state, AGC_STATUS, buf, 1);
457 dprintk("%s: AGC_STATUS = 0x%02x\n", __func__, buf[0]);
458 if ((buf[0] & 0x0c) == 0x8){
459 /* Test signal does not exist flag */
460 /* as well as the AGC lock flag. */
461 *status |= FE_HAS_SIGNAL;
462 }
463
464 /*
465 * You must set the Mask bits to 1 in the IRQ_MASK in order
466 * to see that status bit in the IRQ_STATUS register.
467 * This is done in SwReset();
468 */
469 /* signal status */
470 i2c_read_demod_bytes(state, TOP_CONTROL, buf, sizeof(buf));
471 dprintk("%s: TOP_CONTROL = 0x%02x, IRO_MASK = 0x%02x, IRQ_STATUS = 0x%02x\n", __func__, buf[0], buf[1], buf[2]);
472
473
474 /* sync status */
475 if ((buf[2] & 0x03) == 0x01) {
476 *status |= FE_HAS_SYNC;
477 }
478
479 /* FEC error status */
480 if ((buf[2] & 0x0c) == 0x08) {
481 *status |= FE_HAS_LOCK;
482 *status |= FE_HAS_VITERBI;
483 }
484
485 /* Carrier Recovery Lock Status Register */
486 i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
487 dprintk("%s: CARRIER_LOCK = 0x%02x\n", __func__, buf[0]);
488 switch (state->current_modulation) {
489 case QAM_256:
490 case QAM_64:
491 /* Need to understand why there are 3 lock levels here */
492 if ((buf[0] & 0x07) == 0x07)
493 *status |= FE_HAS_CARRIER;
494 break;
495 case VSB_8:
496 if ((buf[0] & 0x80) == 0x80)
497 *status |= FE_HAS_CARRIER;
498 break;
499 default:
500 printk(KERN_WARNING "lgdt330x: %s: Modulation set to unsupported value\n", __func__);
501 }
502
503 return 0;
504 }
505
lgdt3303_read_status(struct dvb_frontend * fe,fe_status_t * status)506 static int lgdt3303_read_status(struct dvb_frontend* fe, fe_status_t* status)
507 {
508 struct lgdt330x_state* state = fe->demodulator_priv;
509 int err;
510 u8 buf[3];
511
512 *status = 0; /* Reset status result */
513
514 /* lgdt3303 AGC status register */
515 err = i2c_read_demod_bytes(state, 0x58, buf, 1);
516 if (err < 0)
517 return err;
518
519 dprintk("%s: AGC_STATUS = 0x%02x\n", __func__, buf[0]);
520 if ((buf[0] & 0x21) == 0x01){
521 /* Test input signal does not exist flag */
522 /* as well as the AGC lock flag. */
523 *status |= FE_HAS_SIGNAL;
524 }
525
526 /* Carrier Recovery Lock Status Register */
527 i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
528 dprintk("%s: CARRIER_LOCK = 0x%02x\n", __func__, buf[0]);
529 switch (state->current_modulation) {
530 case QAM_256:
531 case QAM_64:
532 /* Need to understand why there are 3 lock levels here */
533 if ((buf[0] & 0x07) == 0x07)
534 *status |= FE_HAS_CARRIER;
535 else
536 break;
537 i2c_read_demod_bytes(state, 0x8a, buf, 1);
538 if ((buf[0] & 0x04) == 0x04)
539 *status |= FE_HAS_SYNC;
540 if ((buf[0] & 0x01) == 0x01)
541 *status |= FE_HAS_LOCK;
542 if ((buf[0] & 0x08) == 0x08)
543 *status |= FE_HAS_VITERBI;
544 break;
545 case VSB_8:
546 if ((buf[0] & 0x80) == 0x80)
547 *status |= FE_HAS_CARRIER;
548 else
549 break;
550 i2c_read_demod_bytes(state, 0x38, buf, 1);
551 if ((buf[0] & 0x02) == 0x00)
552 *status |= FE_HAS_SYNC;
553 if ((buf[0] & 0x01) == 0x01) {
554 *status |= FE_HAS_LOCK;
555 *status |= FE_HAS_VITERBI;
556 }
557 break;
558 default:
559 printk(KERN_WARNING "lgdt330x: %s: Modulation set to unsupported value\n", __func__);
560 }
561 return 0;
562 }
563
564 /* Calculate SNR estimation (scaled by 2^24)
565
566 8-VSB SNR equations from LGDT3302 and LGDT3303 datasheets, QAM
567 equations from LGDT3303 datasheet. VSB is the same between the '02
568 and '03, so maybe QAM is too? Perhaps someone with a newer datasheet
569 that has QAM information could verify?
570
571 For 8-VSB: (two ways, take your pick)
572 LGDT3302:
573 SNR_EQ = 10 * log10(25 * 24^2 / EQ_MSE)
574 LGDT3303:
575 SNR_EQ = 10 * log10(25 * 32^2 / EQ_MSE)
576 LGDT3302 & LGDT3303:
577 SNR_PT = 10 * log10(25 * 32^2 / PT_MSE) (we use this one)
578 For 64-QAM:
579 SNR = 10 * log10( 688128 / MSEQAM)
580 For 256-QAM:
581 SNR = 10 * log10( 696320 / MSEQAM)
582
583 We re-write the snr equation as:
584 SNR * 2^24 = 10*(c - intlog10(MSE))
585 Where for 256-QAM, c = log10(696320) * 2^24, and so on. */
586
calculate_snr(u32 mse,u32 c)587 static u32 calculate_snr(u32 mse, u32 c)
588 {
589 if (mse == 0) /* No signal */
590 return 0;
591
592 mse = intlog10(mse);
593 if (mse > c) {
594 /* Negative SNR, which is possible, but realisticly the
595 demod will lose lock before the signal gets this bad. The
596 API only allows for unsigned values, so just return 0 */
597 return 0;
598 }
599 return 10*(c - mse);
600 }
601
lgdt3302_read_snr(struct dvb_frontend * fe,u16 * snr)602 static int lgdt3302_read_snr(struct dvb_frontend* fe, u16* snr)
603 {
604 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
605 u8 buf[5]; /* read data buffer */
606 u32 noise; /* noise value */
607 u32 c; /* per-modulation SNR calculation constant */
608
609 switch(state->current_modulation) {
610 case VSB_8:
611 i2c_read_demod_bytes(state, LGDT3302_EQPH_ERR0, buf, 5);
612 #ifdef USE_EQMSE
613 /* Use Equalizer Mean-Square Error Register */
614 /* SNR for ranges from -15.61 to +41.58 */
615 noise = ((buf[0] & 7) << 16) | (buf[1] << 8) | buf[2];
616 c = 69765745; /* log10(25*24^2)*2^24 */
617 #else
618 /* Use Phase Tracker Mean-Square Error Register */
619 /* SNR for ranges from -13.11 to +44.08 */
620 noise = ((buf[0] & 7<<3) << 13) | (buf[3] << 8) | buf[4];
621 c = 73957994; /* log10(25*32^2)*2^24 */
622 #endif
623 break;
624 case QAM_64:
625 case QAM_256:
626 i2c_read_demod_bytes(state, CARRIER_MSEQAM1, buf, 2);
627 noise = ((buf[0] & 3) << 8) | buf[1];
628 c = state->current_modulation == QAM_64 ? 97939837 : 98026066;
629 /* log10(688128)*2^24 and log10(696320)*2^24 */
630 break;
631 default:
632 printk(KERN_ERR "lgdt330x: %s: Modulation set to unsupported value\n",
633 __func__);
634 return -EREMOTEIO; /* return -EDRIVER_IS_GIBBERED; */
635 }
636
637 state->snr = calculate_snr(noise, c);
638 *snr = (state->snr) >> 16; /* Convert from 8.24 fixed-point to 8.8 */
639
640 dprintk("%s: noise = 0x%08x, snr = %d.%02d dB\n", __func__, noise,
641 state->snr >> 24, (((state->snr>>8) & 0xffff) * 100) >> 16);
642
643 return 0;
644 }
645
lgdt3303_read_snr(struct dvb_frontend * fe,u16 * snr)646 static int lgdt3303_read_snr(struct dvb_frontend* fe, u16* snr)
647 {
648 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
649 u8 buf[5]; /* read data buffer */
650 u32 noise; /* noise value */
651 u32 c; /* per-modulation SNR calculation constant */
652
653 switch(state->current_modulation) {
654 case VSB_8:
655 i2c_read_demod_bytes(state, LGDT3303_EQPH_ERR0, buf, 5);
656 #ifdef USE_EQMSE
657 /* Use Equalizer Mean-Square Error Register */
658 /* SNR for ranges from -16.12 to +44.08 */
659 noise = ((buf[0] & 0x78) << 13) | (buf[1] << 8) | buf[2];
660 c = 73957994; /* log10(25*32^2)*2^24 */
661 #else
662 /* Use Phase Tracker Mean-Square Error Register */
663 /* SNR for ranges from -13.11 to +44.08 */
664 noise = ((buf[0] & 7) << 16) | (buf[3] << 8) | buf[4];
665 c = 73957994; /* log10(25*32^2)*2^24 */
666 #endif
667 break;
668 case QAM_64:
669 case QAM_256:
670 i2c_read_demod_bytes(state, CARRIER_MSEQAM1, buf, 2);
671 noise = (buf[0] << 8) | buf[1];
672 c = state->current_modulation == QAM_64 ? 97939837 : 98026066;
673 /* log10(688128)*2^24 and log10(696320)*2^24 */
674 break;
675 default:
676 printk(KERN_ERR "lgdt330x: %s: Modulation set to unsupported value\n",
677 __func__);
678 return -EREMOTEIO; /* return -EDRIVER_IS_GIBBERED; */
679 }
680
681 state->snr = calculate_snr(noise, c);
682 *snr = (state->snr) >> 16; /* Convert from 8.24 fixed-point to 8.8 */
683
684 dprintk("%s: noise = 0x%08x, snr = %d.%02d dB\n", __func__, noise,
685 state->snr >> 24, (((state->snr >> 8) & 0xffff) * 100) >> 16);
686
687 return 0;
688 }
689
lgdt330x_read_signal_strength(struct dvb_frontend * fe,u16 * strength)690 static int lgdt330x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
691 {
692 /* Calculate Strength from SNR up to 35dB */
693 /* Even though the SNR can go higher than 35dB, there is some comfort */
694 /* factor in having a range of strong signals that can show at 100% */
695 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
696 u16 snr;
697 int ret;
698
699 ret = fe->ops.read_snr(fe, &snr);
700 if (ret != 0)
701 return ret;
702 /* Rather than use the 8.8 value snr, use state->snr which is 8.24 */
703 /* scale the range 0 - 35*2^24 into 0 - 65535 */
704 if (state->snr >= 8960 * 0x10000)
705 *strength = 0xffff;
706 else
707 *strength = state->snr / 8960;
708
709 return 0;
710 }
711
lgdt330x_get_tune_settings(struct dvb_frontend * fe,struct dvb_frontend_tune_settings * fe_tune_settings)712 static int lgdt330x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings)
713 {
714 /* I have no idea about this - it may not be needed */
715 fe_tune_settings->min_delay_ms = 500;
716 fe_tune_settings->step_size = 0;
717 fe_tune_settings->max_drift = 0;
718 return 0;
719 }
720
lgdt330x_release(struct dvb_frontend * fe)721 static void lgdt330x_release(struct dvb_frontend* fe)
722 {
723 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
724 kfree(state);
725 }
726
727 static struct dvb_frontend_ops lgdt3302_ops;
728 static struct dvb_frontend_ops lgdt3303_ops;
729
lgdt330x_attach(const struct lgdt330x_config * config,struct i2c_adapter * i2c)730 struct dvb_frontend* lgdt330x_attach(const struct lgdt330x_config* config,
731 struct i2c_adapter* i2c)
732 {
733 struct lgdt330x_state* state = NULL;
734 u8 buf[1];
735
736 /* Allocate memory for the internal state */
737 state = kzalloc(sizeof(struct lgdt330x_state), GFP_KERNEL);
738 if (state == NULL)
739 goto error;
740
741 /* Setup the state */
742 state->config = config;
743 state->i2c = i2c;
744
745 /* Create dvb_frontend */
746 switch (config->demod_chip) {
747 case LGDT3302:
748 memcpy(&state->frontend.ops, &lgdt3302_ops, sizeof(struct dvb_frontend_ops));
749 break;
750 case LGDT3303:
751 memcpy(&state->frontend.ops, &lgdt3303_ops, sizeof(struct dvb_frontend_ops));
752 break;
753 default:
754 goto error;
755 }
756 state->frontend.demodulator_priv = state;
757
758 /* Verify communication with demod chip */
759 if (i2c_read_demod_bytes(state, 2, buf, 1))
760 goto error;
761
762 state->current_frequency = -1;
763 state->current_modulation = -1;
764
765 return &state->frontend;
766
767 error:
768 kfree(state);
769 dprintk("%s: ERROR\n",__func__);
770 return NULL;
771 }
772
773 static struct dvb_frontend_ops lgdt3302_ops = {
774 .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
775 .info = {
776 .name= "LG Electronics LGDT3302 VSB/QAM Frontend",
777 .frequency_min= 54000000,
778 .frequency_max= 858000000,
779 .frequency_stepsize= 62500,
780 .symbol_rate_min = 5056941, /* QAM 64 */
781 .symbol_rate_max = 10762000, /* VSB 8 */
782 .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
783 },
784 .init = lgdt330x_init,
785 .set_frontend = lgdt330x_set_parameters,
786 .get_frontend = lgdt330x_get_frontend,
787 .get_tune_settings = lgdt330x_get_tune_settings,
788 .read_status = lgdt3302_read_status,
789 .read_ber = lgdt330x_read_ber,
790 .read_signal_strength = lgdt330x_read_signal_strength,
791 .read_snr = lgdt3302_read_snr,
792 .read_ucblocks = lgdt330x_read_ucblocks,
793 .release = lgdt330x_release,
794 };
795
796 static struct dvb_frontend_ops lgdt3303_ops = {
797 .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
798 .info = {
799 .name= "LG Electronics LGDT3303 VSB/QAM Frontend",
800 .frequency_min= 54000000,
801 .frequency_max= 858000000,
802 .frequency_stepsize= 62500,
803 .symbol_rate_min = 5056941, /* QAM 64 */
804 .symbol_rate_max = 10762000, /* VSB 8 */
805 .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
806 },
807 .init = lgdt330x_init,
808 .set_frontend = lgdt330x_set_parameters,
809 .get_frontend = lgdt330x_get_frontend,
810 .get_tune_settings = lgdt330x_get_tune_settings,
811 .read_status = lgdt3303_read_status,
812 .read_ber = lgdt330x_read_ber,
813 .read_signal_strength = lgdt330x_read_signal_strength,
814 .read_snr = lgdt3303_read_snr,
815 .read_ucblocks = lgdt330x_read_ucblocks,
816 .release = lgdt330x_release,
817 };
818
819 MODULE_DESCRIPTION("LGDT330X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
820 MODULE_AUTHOR("Wilson Michaels");
821 MODULE_LICENSE("GPL");
822
823 EXPORT_SYMBOL(lgdt330x_attach);
824
825 /*
826 * Local variables:
827 * c-basic-offset: 8
828 * End:
829 */
830