1 /*
2  * Copyright 2010 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE COPYRIGHT HOLDER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
19  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21  * DEALINGS IN THE SOFTWARE.
22  *
23  * Authors:
24  *     Alex Deucher <alexander.deucher@amd.com>
25  */
26 
27 #include <linux/types.h>
28 #include <linux/kernel.h>
29 
30 /*
31  * evergreen cards need to use the 3D engine to blit data which requires
32  * quite a bit of hw state setup.  Rather than pull the whole 3D driver
33  * (which normally generates the 3D state) into the DRM, we opt to use
34  * statically generated state tables.  The regsiter state and shaders
35  * were hand generated to support blitting functionality.  See the 3D
36  * driver or documentation for descriptions of the registers and
37  * shader instructions.
38  */
39 
40 const u32 evergreen_default_state[] =
41 {
42 	0xc0016900,
43 	0x0000023b,
44 	0x00000000, /* SQ_LDS_ALLOC_PS */
45 
46 	0xc0066900,
47 	0x00000240,
48 	0x00000000, /* SQ_ESGS_RING_ITEMSIZE */
49 	0x00000000,
50 	0x00000000,
51 	0x00000000,
52 	0x00000000,
53 	0x00000000,
54 
55 	0xc0046900,
56 	0x00000247,
57 	0x00000000, /* SQ_GS_VERT_ITEMSIZE */
58 	0x00000000,
59 	0x00000000,
60 	0x00000000,
61 
62 	0xc0026900,
63 	0x00000010,
64 	0x00000000, /* DB_Z_INFO */
65 	0x00000000, /* DB_STENCIL_INFO */
66 
67 	0xc0016900,
68 	0x00000200,
69 	0x00000000, /* DB_DEPTH_CONTROL */
70 
71 	0xc0066900,
72 	0x00000000,
73 	0x00000060, /* DB_RENDER_CONTROL */
74 	0x00000000, /* DB_COUNT_CONTROL */
75 	0x00000000, /* DB_DEPTH_VIEW */
76 	0x0000002a, /* DB_RENDER_OVERRIDE */
77 	0x00000000, /* DB_RENDER_OVERRIDE2 */
78 	0x00000000, /* DB_HTILE_DATA_BASE */
79 
80 	0xc0026900,
81 	0x0000000a,
82 	0x00000000, /* DB_STENCIL_CLEAR */
83 	0x00000000, /* DB_DEPTH_CLEAR */
84 
85 	0xc0016900,
86 	0x000002dc,
87 	0x0000aa00, /* DB_ALPHA_TO_MASK */
88 
89 	0xc0016900,
90 	0x00000080,
91 	0x00000000, /* PA_SC_WINDOW_OFFSET */
92 
93 	0xc00d6900,
94 	0x00000083,
95 	0x0000ffff, /* PA_SC_CLIPRECT_RULE */
96 	0x00000000, /* PA_SC_CLIPRECT_0_TL */
97 	0x20002000, /* PA_SC_CLIPRECT_0_BR */
98 	0x00000000,
99 	0x20002000,
100 	0x00000000,
101 	0x20002000,
102 	0x00000000,
103 	0x20002000,
104 	0xaaaaaaaa, /* PA_SC_EDGERULE */
105 	0x00000000, /* PA_SU_HARDWARE_SCREEN_OFFSET */
106 	0x0000000f, /* CB_TARGET_MASK */
107 	0x0000000f, /* CB_SHADER_MASK */
108 
109 	0xc0226900,
110 	0x00000094,
111 	0x80000000, /* PA_SC_VPORT_SCISSOR_0_TL */
112 	0x20002000, /* PA_SC_VPORT_SCISSOR_0_BR */
113 	0x80000000,
114 	0x20002000,
115 	0x80000000,
116 	0x20002000,
117 	0x80000000,
118 	0x20002000,
119 	0x80000000,
120 	0x20002000,
121 	0x80000000,
122 	0x20002000,
123 	0x80000000,
124 	0x20002000,
125 	0x80000000,
126 	0x20002000,
127 	0x80000000,
128 	0x20002000,
129 	0x80000000,
130 	0x20002000,
131 	0x80000000,
132 	0x20002000,
133 	0x80000000,
134 	0x20002000,
135 	0x80000000,
136 	0x20002000,
137 	0x80000000,
138 	0x20002000,
139 	0x80000000,
140 	0x20002000,
141 	0x80000000,
142 	0x20002000,
143 	0x00000000, /* PA_SC_VPORT_ZMIN_0 */
144 	0x3f800000, /* PA_SC_VPORT_ZMAX_0 */
145 
146 	0xc0016900,
147 	0x000000d4,
148 	0x00000000, /* SX_MISC */
149 
150 	0xc0026900,
151 	0x00000292,
152 	0x00000000, /* PA_SC_MODE_CNTL_0 */
153 	0x00000000, /* PA_SC_MODE_CNTL_1 */
154 
155 	0xc0106900,
156 	0x00000300,
157 	0x00000000, /* PA_SC_LINE_CNTL */
158 	0x00000000, /* PA_SC_AA_CONFIG */
159 	0x00000005, /* PA_SU_VTX_CNTL */
160 	0x3f800000, /* PA_CL_GB_VERT_CLIP_ADJ */
161 	0x3f800000, /* PA_CL_GB_VERT_DISC_ADJ */
162 	0x3f800000, /* PA_CL_GB_HORZ_CLIP_ADJ */
163 	0x3f800000, /* PA_CL_GB_HORZ_DISC_ADJ */
164 	0x00000000, /* PA_SC_AA_SAMPLE_LOCS_0 */
165 	0x00000000, /*  */
166 	0x00000000, /*  */
167 	0x00000000, /*  */
168 	0x00000000, /*  */
169 	0x00000000, /*  */
170 	0x00000000, /*  */
171 	0x00000000, /* PA_SC_AA_SAMPLE_LOCS_7 */
172 	0xffffffff, /* PA_SC_AA_MASK */
173 
174 	0xc00d6900,
175 	0x00000202,
176 	0x00cc0010, /* CB_COLOR_CONTROL */
177 	0x00000210, /* DB_SHADER_CONTROL */
178 	0x00010000, /* PA_CL_CLIP_CNTL */
179 	0x00000004, /* PA_SU_SC_MODE_CNTL */
180 	0x00000100, /* PA_CL_VTE_CNTL */
181 	0x00000000, /* PA_CL_VS_OUT_CNTL */
182 	0x00000000, /* PA_CL_NANINF_CNTL */
183 	0x00000000, /* PA_SU_LINE_STIPPLE_CNTL */
184 	0x00000000, /* PA_SU_LINE_STIPPLE_SCALE */
185 	0x00000000, /* PA_SU_PRIM_FILTER_CNTL */
186 	0x00000000, /*  */
187 	0x00000000, /*  */
188 	0x00000000, /* SQ_DYN_GPR_RESOURCE_LIMIT_1 */
189 
190 	0xc0066900,
191 	0x000002de,
192 	0x00000000, /* PA_SU_POLY_OFFSET_DB_FMT_CNTL */
193 	0x00000000, /*  */
194 	0x00000000, /*  */
195 	0x00000000, /*  */
196 	0x00000000, /*  */
197 	0x00000000, /*  */
198 
199 	0xc0016900,
200 	0x00000229,
201 	0x00000000, /* SQ_PGM_START_FS */
202 
203 	0xc0016900,
204 	0x0000022a,
205 	0x00000000, /* SQ_PGM_RESOURCES_FS */
206 
207 	0xc0096900,
208 	0x00000100,
209 	0x00ffffff, /* VGT_MAX_VTX_INDX */
210 	0x00000000, /*  */
211 	0x00000000, /*  */
212 	0x00000000, /*  */
213 	0x00000000, /* SX_ALPHA_TEST_CONTROL */
214 	0x00000000, /* CB_BLEND_RED */
215 	0x00000000, /* CB_BLEND_GREEN */
216 	0x00000000, /* CB_BLEND_BLUE */
217 	0x00000000, /* CB_BLEND_ALPHA */
218 
219 	0xc0026900,
220 	0x000002a8,
221 	0x00000000, /* VGT_INSTANCE_STEP_RATE_0 */
222 	0x00000000, /*  */
223 
224 	0xc0026900,
225 	0x000002ad,
226 	0x00000000, /* VGT_REUSE_OFF */
227 	0x00000000, /*  */
228 
229 	0xc0116900,
230 	0x00000280,
231 	0x00000000, /* PA_SU_POINT_SIZE */
232 	0x00000000, /* PA_SU_POINT_MINMAX */
233 	0x00000008, /* PA_SU_LINE_CNTL */
234 	0x00000000, /* PA_SC_LINE_STIPPLE */
235 	0x00000000, /* VGT_OUTPUT_PATH_CNTL */
236 	0x00000000, /* VGT_HOS_CNTL */
237 	0x00000000, /*  */
238 	0x00000000, /*  */
239 	0x00000000, /*  */
240 	0x00000000, /*  */
241 	0x00000000, /*  */
242 	0x00000000, /*  */
243 	0x00000000, /*  */
244 	0x00000000, /*  */
245 	0x00000000, /*  */
246 	0x00000000, /*  */
247 	0x00000000, /* VGT_GS_MODE */
248 
249 	0xc0016900,
250 	0x000002a1,
251 	0x00000000, /* VGT_PRIMITIVEID_EN */
252 
253 	0xc0016900,
254 	0x000002a5,
255 	0x00000000, /* VGT_MULTI_PRIM_IB_RESET_EN */
256 
257 	0xc0016900,
258 	0x000002d5,
259 	0x00000000, /* VGT_SHADER_STAGES_EN */
260 
261 	0xc0026900,
262 	0x000002e5,
263 	0x00000000, /* VGT_STRMOUT_CONFIG */
264 	0x00000000, /*  */
265 
266 	0xc0016900,
267 	0x000001e0,
268 	0x00000000, /* CB_BLEND0_CONTROL */
269 
270 	0xc0016900,
271 	0x000001b1,
272 	0x00000000, /* SPI_VS_OUT_CONFIG */
273 
274 	0xc0016900,
275 	0x00000187,
276 	0x00000000, /* SPI_VS_OUT_ID_0 */
277 
278 	0xc0016900,
279 	0x00000191,
280 	0x00000100, /* SPI_PS_INPUT_CNTL_0 */
281 
282 	0xc00b6900,
283 	0x000001b3,
284 	0x20000001, /* SPI_PS_IN_CONTROL_0 */
285 	0x00000000, /* SPI_PS_IN_CONTROL_1 */
286 	0x00000000, /* SPI_INTERP_CONTROL_0 */
287 	0x00000000, /* SPI_INPUT_Z */
288 	0x00000000, /* SPI_FOG_CNTL */
289 	0x00100000, /* SPI_BARYC_CNTL */
290 	0x00000000, /* SPI_PS_IN_CONTROL_2 */
291 	0x00000000, /*  */
292 	0x00000000, /*  */
293 	0x00000000, /*  */
294 	0x00000000, /*  */
295 
296 	0xc0026900,
297 	0x00000316,
298 	0x0000000e, /* VGT_VERTEX_REUSE_BLOCK_CNTL */
299 	0x00000010, /*  */
300 };
301 
302 const u32 evergreen_vs[] =
303 {
304 	0x00000004,
305 	0x80800400,
306 	0x0000a03c,
307 	0x95000688,
308 	0x00004000,
309 	0x15200688,
310 	0x00000000,
311 	0x00000000,
312 	0x3c000000,
313 	0x67961001,
314 #ifdef __BIG_ENDIAN
315 	0x000a0000,
316 #else
317 	0x00080000,
318 #endif
319 	0x00000000,
320 	0x1c000000,
321 	0x67961000,
322 #ifdef __BIG_ENDIAN
323 	0x00020008,
324 #else
325 	0x00000008,
326 #endif
327 	0x00000000,
328 };
329 
330 const u32 evergreen_ps[] =
331 {
332 	0x00000003,
333 	0xa00c0000,
334 	0x00000008,
335 	0x80400000,
336 	0x00000000,
337 	0x95200688,
338 	0x00380400,
339 	0x00146b10,
340 	0x00380000,
341 	0x20146b10,
342 	0x00380400,
343 	0x40146b00,
344 	0x80380000,
345 	0x60146b00,
346 	0x00000000,
347 	0x00000000,
348 	0x00000010,
349 	0x000d1000,
350 	0xb0800000,
351 	0x00000000,
352 };
353 
354 const u32 evergreen_ps_size = ARRAY_SIZE(evergreen_ps);
355 const u32 evergreen_vs_size = ARRAY_SIZE(evergreen_vs);
356 const u32 evergreen_default_size = ARRAY_SIZE(evergreen_default_state);
357