1 /*
2 * Copyright 2005 Stephane Marchesin.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 */
24
25 #include <linux/console.h>
26 #include <linux/module.h>
27
28 #include "drmP.h"
29 #include "drm.h"
30 #include "drm_crtc_helper.h"
31 #include "nouveau_drv.h"
32 #include "nouveau_hw.h"
33 #include "nouveau_fb.h"
34 #include "nouveau_fbcon.h"
35 #include "nouveau_pm.h"
36 #include "nv50_display.h"
37
38 #include "drm_pciids.h"
39
40 MODULE_PARM_DESC(agpmode, "AGP mode (0 to disable AGP)");
41 int nouveau_agpmode = -1;
42 module_param_named(agpmode, nouveau_agpmode, int, 0400);
43
44 MODULE_PARM_DESC(modeset, "Enable kernel modesetting");
45 int nouveau_modeset = -1;
46 module_param_named(modeset, nouveau_modeset, int, 0400);
47
48 MODULE_PARM_DESC(vbios, "Override default VBIOS location");
49 char *nouveau_vbios;
50 module_param_named(vbios, nouveau_vbios, charp, 0400);
51
52 MODULE_PARM_DESC(vram_pushbuf, "Force DMA push buffers to be in VRAM");
53 int nouveau_vram_pushbuf;
54 module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400);
55
56 MODULE_PARM_DESC(vram_notify, "Force DMA notifiers to be in VRAM");
57 int nouveau_vram_notify = 0;
58 module_param_named(vram_notify, nouveau_vram_notify, int, 0400);
59
60 MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (>=GeForce 8)");
61 int nouveau_duallink = 1;
62 module_param_named(duallink, nouveau_duallink, int, 0400);
63
64 MODULE_PARM_DESC(uscript_lvds, "LVDS output script table ID (>=GeForce 8)");
65 int nouveau_uscript_lvds = -1;
66 module_param_named(uscript_lvds, nouveau_uscript_lvds, int, 0400);
67
68 MODULE_PARM_DESC(uscript_tmds, "TMDS output script table ID (>=GeForce 8)");
69 int nouveau_uscript_tmds = -1;
70 module_param_named(uscript_tmds, nouveau_uscript_tmds, int, 0400);
71
72 MODULE_PARM_DESC(ignorelid, "Ignore ACPI lid status");
73 int nouveau_ignorelid = 0;
74 module_param_named(ignorelid, nouveau_ignorelid, int, 0400);
75
76 MODULE_PARM_DESC(noaccel, "Disable all acceleration");
77 int nouveau_noaccel = -1;
78 module_param_named(noaccel, nouveau_noaccel, int, 0400);
79
80 MODULE_PARM_DESC(nofbaccel, "Disable fbcon acceleration");
81 int nouveau_nofbaccel = 0;
82 module_param_named(nofbaccel, nouveau_nofbaccel, int, 0400);
83
84 MODULE_PARM_DESC(force_post, "Force POST");
85 int nouveau_force_post = 0;
86 module_param_named(force_post, nouveau_force_post, int, 0400);
87
88 MODULE_PARM_DESC(override_conntype, "Ignore DCB connector type");
89 int nouveau_override_conntype = 0;
90 module_param_named(override_conntype, nouveau_override_conntype, int, 0400);
91
92 MODULE_PARM_DESC(tv_disable, "Disable TV-out detection\n");
93 int nouveau_tv_disable = 0;
94 module_param_named(tv_disable, nouveau_tv_disable, int, 0400);
95
96 MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
97 "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
98 "\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
99 "\t\tDefault: PAL\n"
100 "\t\t*NOTE* Ignored for cards with external TV encoders.");
101 char *nouveau_tv_norm;
102 module_param_named(tv_norm, nouveau_tv_norm, charp, 0400);
103
104 MODULE_PARM_DESC(reg_debug, "Register access debug bitmask:\n"
105 "\t\t0x1 mc, 0x2 video, 0x4 fb, 0x8 extdev,\n"
106 "\t\t0x10 crtc, 0x20 ramdac, 0x40 vgacrtc, 0x80 rmvio,\n"
107 "\t\t0x100 vgaattr, 0x200 EVO (G80+). ");
108 int nouveau_reg_debug;
109 module_param_named(reg_debug, nouveau_reg_debug, int, 0600);
110
111 MODULE_PARM_DESC(perflvl, "Performance level (default: boot)\n");
112 char *nouveau_perflvl;
113 module_param_named(perflvl, nouveau_perflvl, charp, 0400);
114
115 MODULE_PARM_DESC(perflvl_wr, "Allow perflvl changes (warning: dangerous!)\n");
116 int nouveau_perflvl_wr;
117 module_param_named(perflvl_wr, nouveau_perflvl_wr, int, 0400);
118
119 MODULE_PARM_DESC(msi, "Enable MSI (default: off)\n");
120 int nouveau_msi;
121 module_param_named(msi, nouveau_msi, int, 0400);
122
123 MODULE_PARM_DESC(ctxfw, "Use external HUB/GPC ucode (fermi)\n");
124 int nouveau_ctxfw;
125 module_param_named(ctxfw, nouveau_ctxfw, int, 0400);
126
127 MODULE_PARM_DESC(mxmdcb, "Santise DCB table according to MXM-SIS\n");
128 int nouveau_mxmdcb = 1;
129 module_param_named(mxmdcb, nouveau_mxmdcb, int, 0400);
130
131 int nouveau_fbpercrtc;
132 #if 0
133 module_param_named(fbpercrtc, nouveau_fbpercrtc, int, 0400);
134 #endif
135
136 static struct pci_device_id pciidlist[] = {
137 {
138 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
139 .class = PCI_BASE_CLASS_DISPLAY << 16,
140 .class_mask = 0xff << 16,
141 },
142 {
143 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
144 .class = PCI_BASE_CLASS_DISPLAY << 16,
145 .class_mask = 0xff << 16,
146 },
147 {}
148 };
149
150 MODULE_DEVICE_TABLE(pci, pciidlist);
151
152 static struct drm_driver driver;
153
154 static int __devinit
nouveau_pci_probe(struct pci_dev * pdev,const struct pci_device_id * ent)155 nouveau_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
156 {
157 return drm_get_pci_dev(pdev, ent, &driver);
158 }
159
160 static void
nouveau_pci_remove(struct pci_dev * pdev)161 nouveau_pci_remove(struct pci_dev *pdev)
162 {
163 struct drm_device *dev = pci_get_drvdata(pdev);
164
165 drm_put_dev(dev);
166 }
167
168 int
nouveau_pci_suspend(struct pci_dev * pdev,pm_message_t pm_state)169 nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
170 {
171 struct drm_device *dev = pci_get_drvdata(pdev);
172 struct drm_nouveau_private *dev_priv = dev->dev_private;
173 struct nouveau_instmem_engine *pinstmem = &dev_priv->engine.instmem;
174 struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
175 struct nouveau_channel *chan;
176 struct drm_crtc *crtc;
177 int ret, i, e;
178
179 if (pm_state.event == PM_EVENT_PRETHAW)
180 return 0;
181
182 if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
183 return 0;
184
185 NV_INFO(dev, "Disabling display...\n");
186 nouveau_display_fini(dev);
187
188 NV_INFO(dev, "Disabling fbcon...\n");
189 nouveau_fbcon_set_suspend(dev, 1);
190
191 NV_INFO(dev, "Unpinning framebuffer(s)...\n");
192 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
193 struct nouveau_framebuffer *nouveau_fb;
194
195 nouveau_fb = nouveau_framebuffer(crtc->fb);
196 if (!nouveau_fb || !nouveau_fb->nvbo)
197 continue;
198
199 nouveau_bo_unpin(nouveau_fb->nvbo);
200 }
201
202 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
203 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
204
205 nouveau_bo_unmap(nv_crtc->cursor.nvbo);
206 nouveau_bo_unpin(nv_crtc->cursor.nvbo);
207 }
208
209 NV_INFO(dev, "Evicting buffers...\n");
210 ttm_bo_evict_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM);
211
212 NV_INFO(dev, "Idling channels...\n");
213 for (i = 0; i < pfifo->channels; i++) {
214 chan = dev_priv->channels.ptr[i];
215
216 if (chan && chan->pushbuf_bo)
217 nouveau_channel_idle(chan);
218 }
219
220 pfifo->reassign(dev, false);
221 pfifo->disable(dev);
222 pfifo->unload_context(dev);
223
224 for (e = NVOBJ_ENGINE_NR - 1; e >= 0; e--) {
225 if (!dev_priv->eng[e])
226 continue;
227
228 ret = dev_priv->eng[e]->fini(dev, e, true);
229 if (ret) {
230 NV_ERROR(dev, "... engine %d failed: %d\n", e, ret);
231 goto out_abort;
232 }
233 }
234
235 ret = pinstmem->suspend(dev);
236 if (ret) {
237 NV_ERROR(dev, "... failed: %d\n", ret);
238 goto out_abort;
239 }
240
241 NV_INFO(dev, "Suspending GPU objects...\n");
242 ret = nouveau_gpuobj_suspend(dev);
243 if (ret) {
244 NV_ERROR(dev, "... failed: %d\n", ret);
245 pinstmem->resume(dev);
246 goto out_abort;
247 }
248
249 NV_INFO(dev, "And we're gone!\n");
250 pci_save_state(pdev);
251 if (pm_state.event == PM_EVENT_SUSPEND) {
252 pci_disable_device(pdev);
253 pci_set_power_state(pdev, PCI_D3hot);
254 }
255
256 return 0;
257
258 out_abort:
259 NV_INFO(dev, "Re-enabling acceleration..\n");
260 for (e = e + 1; e < NVOBJ_ENGINE_NR; e++) {
261 if (dev_priv->eng[e])
262 dev_priv->eng[e]->init(dev, e);
263 }
264 pfifo->enable(dev);
265 pfifo->reassign(dev, true);
266 return ret;
267 }
268
269 int
nouveau_pci_resume(struct pci_dev * pdev)270 nouveau_pci_resume(struct pci_dev *pdev)
271 {
272 struct drm_device *dev = pci_get_drvdata(pdev);
273 struct drm_nouveau_private *dev_priv = dev->dev_private;
274 struct nouveau_engine *engine = &dev_priv->engine;
275 struct drm_crtc *crtc;
276 int ret, i;
277
278 if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
279 return 0;
280
281 NV_INFO(dev, "We're back, enabling device...\n");
282 pci_set_power_state(pdev, PCI_D0);
283 pci_restore_state(pdev);
284 if (pci_enable_device(pdev))
285 return -1;
286 pci_set_master(dev->pdev);
287
288 /* Make sure the AGP controller is in a consistent state */
289 if (dev_priv->gart_info.type == NOUVEAU_GART_AGP)
290 nouveau_mem_reset_agp(dev);
291
292 /* Make the CRTCs accessible */
293 engine->display.early_init(dev);
294
295 NV_INFO(dev, "POSTing device...\n");
296 ret = nouveau_run_vbios_init(dev);
297 if (ret)
298 return ret;
299
300 if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) {
301 ret = nouveau_mem_init_agp(dev);
302 if (ret) {
303 NV_ERROR(dev, "error reinitialising AGP: %d\n", ret);
304 return ret;
305 }
306 }
307
308 NV_INFO(dev, "Restoring GPU objects...\n");
309 nouveau_gpuobj_resume(dev);
310
311 NV_INFO(dev, "Reinitialising engines...\n");
312 engine->instmem.resume(dev);
313 engine->mc.init(dev);
314 engine->timer.init(dev);
315 engine->fb.init(dev);
316 for (i = 0; i < NVOBJ_ENGINE_NR; i++) {
317 if (dev_priv->eng[i])
318 dev_priv->eng[i]->init(dev, i);
319 }
320 engine->fifo.init(dev);
321
322 nouveau_irq_postinstall(dev);
323
324 /* Re-write SKIPS, they'll have been lost over the suspend */
325 if (nouveau_vram_pushbuf) {
326 struct nouveau_channel *chan;
327 int j;
328
329 for (i = 0; i < dev_priv->engine.fifo.channels; i++) {
330 chan = dev_priv->channels.ptr[i];
331 if (!chan || !chan->pushbuf_bo)
332 continue;
333
334 for (j = 0; j < NOUVEAU_DMA_SKIPS; j++)
335 nouveau_bo_wr32(chan->pushbuf_bo, i, 0);
336 }
337 }
338
339 nouveau_pm_resume(dev);
340
341 NV_INFO(dev, "Restoring mode...\n");
342 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
343 struct nouveau_framebuffer *nouveau_fb;
344
345 nouveau_fb = nouveau_framebuffer(crtc->fb);
346 if (!nouveau_fb || !nouveau_fb->nvbo)
347 continue;
348
349 nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
350 }
351
352 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
353 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
354
355 ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
356 if (!ret)
357 ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
358 if (ret)
359 NV_ERROR(dev, "Could not pin/map cursor.\n");
360 }
361
362 nouveau_fbcon_set_suspend(dev, 0);
363 nouveau_fbcon_zfill_all(dev);
364
365 nouveau_display_init(dev);
366
367 /* Force CLUT to get re-loaded during modeset */
368 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
369 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
370
371 nv_crtc->lut.depth = 0;
372 }
373
374 drm_helper_resume_force_mode(dev);
375
376 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
377 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
378 u32 offset = nv_crtc->cursor.nvbo->bo.offset;
379
380 nv_crtc->cursor.set_offset(nv_crtc, offset);
381 nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
382 nv_crtc->cursor_saved_y);
383 }
384
385 return 0;
386 }
387
388 static const struct file_operations nouveau_driver_fops = {
389 .owner = THIS_MODULE,
390 .open = drm_open,
391 .release = drm_release,
392 .unlocked_ioctl = drm_ioctl,
393 .mmap = nouveau_ttm_mmap,
394 .poll = drm_poll,
395 .fasync = drm_fasync,
396 .read = drm_read,
397 #if defined(CONFIG_COMPAT)
398 .compat_ioctl = nouveau_compat_ioctl,
399 #endif
400 .llseek = noop_llseek,
401 };
402
403 static struct drm_driver driver = {
404 .driver_features =
405 DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
406 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
407 DRIVER_MODESET,
408 .load = nouveau_load,
409 .firstopen = nouveau_firstopen,
410 .lastclose = nouveau_lastclose,
411 .unload = nouveau_unload,
412 .open = nouveau_open,
413 .preclose = nouveau_preclose,
414 .postclose = nouveau_postclose,
415 #if defined(CONFIG_DRM_NOUVEAU_DEBUG)
416 .debugfs_init = nouveau_debugfs_init,
417 .debugfs_cleanup = nouveau_debugfs_takedown,
418 #endif
419 .irq_preinstall = nouveau_irq_preinstall,
420 .irq_postinstall = nouveau_irq_postinstall,
421 .irq_uninstall = nouveau_irq_uninstall,
422 .irq_handler = nouveau_irq_handler,
423 .get_vblank_counter = drm_vblank_count,
424 .enable_vblank = nouveau_vblank_enable,
425 .disable_vblank = nouveau_vblank_disable,
426 .reclaim_buffers = drm_core_reclaim_buffers,
427 .ioctls = nouveau_ioctls,
428 .fops = &nouveau_driver_fops,
429 .gem_init_object = nouveau_gem_object_new,
430 .gem_free_object = nouveau_gem_object_del,
431 .gem_open_object = nouveau_gem_object_open,
432 .gem_close_object = nouveau_gem_object_close,
433
434 .dumb_create = nouveau_display_dumb_create,
435 .dumb_map_offset = nouveau_display_dumb_map_offset,
436 .dumb_destroy = nouveau_display_dumb_destroy,
437
438 .name = DRIVER_NAME,
439 .desc = DRIVER_DESC,
440 #ifdef GIT_REVISION
441 .date = GIT_REVISION,
442 #else
443 .date = DRIVER_DATE,
444 #endif
445 .major = DRIVER_MAJOR,
446 .minor = DRIVER_MINOR,
447 .patchlevel = DRIVER_PATCHLEVEL,
448 };
449
450 static struct pci_driver nouveau_pci_driver = {
451 .name = DRIVER_NAME,
452 .id_table = pciidlist,
453 .probe = nouveau_pci_probe,
454 .remove = nouveau_pci_remove,
455 .suspend = nouveau_pci_suspend,
456 .resume = nouveau_pci_resume
457 };
458
nouveau_init(void)459 static int __init nouveau_init(void)
460 {
461 driver.num_ioctls = nouveau_max_ioctl;
462
463 if (nouveau_modeset == -1) {
464 #ifdef CONFIG_VGA_CONSOLE
465 if (vgacon_text_force())
466 nouveau_modeset = 0;
467 else
468 #endif
469 nouveau_modeset = 1;
470 }
471
472 if (!nouveau_modeset)
473 return 0;
474
475 nouveau_register_dsm_handler();
476 return drm_pci_init(&driver, &nouveau_pci_driver);
477 }
478
nouveau_exit(void)479 static void __exit nouveau_exit(void)
480 {
481 if (!nouveau_modeset)
482 return;
483
484 drm_pci_exit(&driver, &nouveau_pci_driver);
485 nouveau_unregister_dsm_handler();
486 }
487
488 module_init(nouveau_init);
489 module_exit(nouveau_exit);
490
491 MODULE_AUTHOR(DRIVER_AUTHOR);
492 MODULE_DESCRIPTION(DRIVER_DESC);
493 MODULE_LICENSE("GPL and additional rights");
494