1 /*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/export.h>
32 #include "drmP.h"
33 #include "drm.h"
34 #include "drm_crtc.h"
35 #include "drm_edid.h"
36 #include "intel_drv.h"
37 #include "i915_drm.h"
38 #include "i915_drv.h"
39 #include "intel_sdvo_regs.h"
40
41 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
42 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
43 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
44 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
45
46 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
47 SDVO_TV_MASK)
48
49 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
50 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
51 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
52 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
53 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
54
55
56 static const char *tv_format_names[] = {
57 "NTSC_M" , "NTSC_J" , "NTSC_443",
58 "PAL_B" , "PAL_D" , "PAL_G" ,
59 "PAL_H" , "PAL_I" , "PAL_M" ,
60 "PAL_N" , "PAL_NC" , "PAL_60" ,
61 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
62 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
63 "SECAM_60"
64 };
65
66 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
67
68 struct intel_sdvo {
69 struct intel_encoder base;
70
71 struct i2c_adapter *i2c;
72 u8 slave_addr;
73
74 struct i2c_adapter ddc;
75
76 /* Register for the SDVO device: SDVOB or SDVOC */
77 int sdvo_reg;
78
79 /* Active outputs controlled by this SDVO output */
80 uint16_t controlled_output;
81
82 /*
83 * Capabilities of the SDVO device returned by
84 * i830_sdvo_get_capabilities()
85 */
86 struct intel_sdvo_caps caps;
87
88 /* Pixel clock limitations reported by the SDVO device, in kHz */
89 int pixel_clock_min, pixel_clock_max;
90
91 /*
92 * For multiple function SDVO device,
93 * this is for current attached outputs.
94 */
95 uint16_t attached_output;
96
97 /*
98 * Hotplug activation bits for this device
99 */
100 uint8_t hotplug_active[2];
101
102 /**
103 * This is used to select the color range of RBG outputs in HDMI mode.
104 * It is only valid when using TMDS encoding and 8 bit per color mode.
105 */
106 uint32_t color_range;
107
108 /**
109 * This is set if we're going to treat the device as TV-out.
110 *
111 * While we have these nice friendly flags for output types that ought
112 * to decide this for us, the S-Video output on our HDMI+S-Video card
113 * shows up as RGB1 (VGA).
114 */
115 bool is_tv;
116
117 /* This is for current tv format name */
118 int tv_format_index;
119
120 /**
121 * This is set if we treat the device as HDMI, instead of DVI.
122 */
123 bool is_hdmi;
124 bool has_hdmi_monitor;
125 bool has_hdmi_audio;
126
127 /**
128 * This is set if we detect output of sdvo device as LVDS and
129 * have a valid fixed mode to use with the panel.
130 */
131 bool is_lvds;
132
133 /**
134 * This is sdvo fixed pannel mode pointer
135 */
136 struct drm_display_mode *sdvo_lvds_fixed_mode;
137
138 /* DDC bus used by this SDVO encoder */
139 uint8_t ddc_bus;
140
141 /* Input timings for adjusted_mode */
142 struct intel_sdvo_dtd input_dtd;
143 };
144
145 struct intel_sdvo_connector {
146 struct intel_connector base;
147
148 /* Mark the type of connector */
149 uint16_t output_flag;
150
151 int force_audio;
152
153 /* This contains all current supported TV format */
154 u8 tv_format_supported[TV_FORMAT_NUM];
155 int format_supported_num;
156 struct drm_property *tv_format;
157
158 /* add the property for the SDVO-TV */
159 struct drm_property *left;
160 struct drm_property *right;
161 struct drm_property *top;
162 struct drm_property *bottom;
163 struct drm_property *hpos;
164 struct drm_property *vpos;
165 struct drm_property *contrast;
166 struct drm_property *saturation;
167 struct drm_property *hue;
168 struct drm_property *sharpness;
169 struct drm_property *flicker_filter;
170 struct drm_property *flicker_filter_adaptive;
171 struct drm_property *flicker_filter_2d;
172 struct drm_property *tv_chroma_filter;
173 struct drm_property *tv_luma_filter;
174 struct drm_property *dot_crawl;
175
176 /* add the property for the SDVO-TV/LVDS */
177 struct drm_property *brightness;
178
179 /* Add variable to record current setting for the above property */
180 u32 left_margin, right_margin, top_margin, bottom_margin;
181
182 /* this is to get the range of margin.*/
183 u32 max_hscan, max_vscan;
184 u32 max_hpos, cur_hpos;
185 u32 max_vpos, cur_vpos;
186 u32 cur_brightness, max_brightness;
187 u32 cur_contrast, max_contrast;
188 u32 cur_saturation, max_saturation;
189 u32 cur_hue, max_hue;
190 u32 cur_sharpness, max_sharpness;
191 u32 cur_flicker_filter, max_flicker_filter;
192 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
193 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
194 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
195 u32 cur_tv_luma_filter, max_tv_luma_filter;
196 u32 cur_dot_crawl, max_dot_crawl;
197 };
198
to_intel_sdvo(struct drm_encoder * encoder)199 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
200 {
201 return container_of(encoder, struct intel_sdvo, base.base);
202 }
203
intel_attached_sdvo(struct drm_connector * connector)204 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
205 {
206 return container_of(intel_attached_encoder(connector),
207 struct intel_sdvo, base);
208 }
209
to_intel_sdvo_connector(struct drm_connector * connector)210 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
211 {
212 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
213 }
214
215 static bool
216 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
217 static bool
218 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
219 struct intel_sdvo_connector *intel_sdvo_connector,
220 int type);
221 static bool
222 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
223 struct intel_sdvo_connector *intel_sdvo_connector);
224
225 /**
226 * Writes the SDVOB or SDVOC with the given value, but always writes both
227 * SDVOB and SDVOC to work around apparent hardware issues (according to
228 * comments in the BIOS).
229 */
intel_sdvo_write_sdvox(struct intel_sdvo * intel_sdvo,u32 val)230 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
231 {
232 struct drm_device *dev = intel_sdvo->base.base.dev;
233 struct drm_i915_private *dev_priv = dev->dev_private;
234 u32 bval = val, cval = val;
235 int i;
236
237 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
238 I915_WRITE(intel_sdvo->sdvo_reg, val);
239 I915_READ(intel_sdvo->sdvo_reg);
240 return;
241 }
242
243 if (intel_sdvo->sdvo_reg == SDVOB) {
244 cval = I915_READ(SDVOC);
245 } else {
246 bval = I915_READ(SDVOB);
247 }
248 /*
249 * Write the registers twice for luck. Sometimes,
250 * writing them only once doesn't appear to 'stick'.
251 * The BIOS does this too. Yay, magic
252 */
253 for (i = 0; i < 2; i++)
254 {
255 I915_WRITE(SDVOB, bval);
256 I915_READ(SDVOB);
257 I915_WRITE(SDVOC, cval);
258 I915_READ(SDVOC);
259 }
260 }
261
intel_sdvo_read_byte(struct intel_sdvo * intel_sdvo,u8 addr,u8 * ch)262 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
263 {
264 struct i2c_msg msgs[] = {
265 {
266 .addr = intel_sdvo->slave_addr,
267 .flags = 0,
268 .len = 1,
269 .buf = &addr,
270 },
271 {
272 .addr = intel_sdvo->slave_addr,
273 .flags = I2C_M_RD,
274 .len = 1,
275 .buf = ch,
276 }
277 };
278 int ret;
279
280 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
281 return true;
282
283 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
284 return false;
285 }
286
287 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
288 /** Mapping of command numbers to names, for debug output */
289 static const struct _sdvo_cmd_name {
290 u8 cmd;
291 const char *name;
292 } sdvo_cmd_names[] = {
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
336
337 /* Add the op code for SDVO enhancements */
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
382
383 /* HDMI op code */
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
404 };
405
406 #define IS_SDVOB(reg) (reg == SDVOB || reg == PCH_SDVOB)
407 #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
408
intel_sdvo_debug_write(struct intel_sdvo * intel_sdvo,u8 cmd,const void * args,int args_len)409 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
410 const void *args, int args_len)
411 {
412 int i;
413
414 DRM_DEBUG_KMS("%s: W: %02X ",
415 SDVO_NAME(intel_sdvo), cmd);
416 for (i = 0; i < args_len; i++)
417 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
418 for (; i < 8; i++)
419 DRM_LOG_KMS(" ");
420 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
421 if (cmd == sdvo_cmd_names[i].cmd) {
422 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
423 break;
424 }
425 }
426 if (i == ARRAY_SIZE(sdvo_cmd_names))
427 DRM_LOG_KMS("(%02X)", cmd);
428 DRM_LOG_KMS("\n");
429 }
430
431 static const char *cmd_status_names[] = {
432 "Power on",
433 "Success",
434 "Not supported",
435 "Invalid arg",
436 "Pending",
437 "Target not specified",
438 "Scaling not supported"
439 };
440
intel_sdvo_write_cmd(struct intel_sdvo * intel_sdvo,u8 cmd,const void * args,int args_len)441 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
442 const void *args, int args_len)
443 {
444 u8 buf[args_len*2 + 2], status;
445 struct i2c_msg msgs[args_len + 3];
446 int i, ret;
447
448 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
449
450 for (i = 0; i < args_len; i++) {
451 msgs[i].addr = intel_sdvo->slave_addr;
452 msgs[i].flags = 0;
453 msgs[i].len = 2;
454 msgs[i].buf = buf + 2 *i;
455 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
456 buf[2*i + 1] = ((u8*)args)[i];
457 }
458 msgs[i].addr = intel_sdvo->slave_addr;
459 msgs[i].flags = 0;
460 msgs[i].len = 2;
461 msgs[i].buf = buf + 2*i;
462 buf[2*i + 0] = SDVO_I2C_OPCODE;
463 buf[2*i + 1] = cmd;
464
465 /* the following two are to read the response */
466 status = SDVO_I2C_CMD_STATUS;
467 msgs[i+1].addr = intel_sdvo->slave_addr;
468 msgs[i+1].flags = 0;
469 msgs[i+1].len = 1;
470 msgs[i+1].buf = &status;
471
472 msgs[i+2].addr = intel_sdvo->slave_addr;
473 msgs[i+2].flags = I2C_M_RD;
474 msgs[i+2].len = 1;
475 msgs[i+2].buf = &status;
476
477 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
478 if (ret < 0) {
479 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
480 return false;
481 }
482 if (ret != i+3) {
483 /* failure in I2C transfer */
484 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
485 return false;
486 }
487
488 return true;
489 }
490
intel_sdvo_read_response(struct intel_sdvo * intel_sdvo,void * response,int response_len)491 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
492 void *response, int response_len)
493 {
494 u8 retry = 5;
495 u8 status;
496 int i;
497
498 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
499
500 /*
501 * The documentation states that all commands will be
502 * processed within 15µs, and that we need only poll
503 * the status byte a maximum of 3 times in order for the
504 * command to be complete.
505 *
506 * Check 5 times in case the hardware failed to read the docs.
507 */
508 if (!intel_sdvo_read_byte(intel_sdvo,
509 SDVO_I2C_CMD_STATUS,
510 &status))
511 goto log_fail;
512
513 while (status == SDVO_CMD_STATUS_PENDING && retry--) {
514 udelay(15);
515 if (!intel_sdvo_read_byte(intel_sdvo,
516 SDVO_I2C_CMD_STATUS,
517 &status))
518 goto log_fail;
519 }
520
521 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
522 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
523 else
524 DRM_LOG_KMS("(??? %d)", status);
525
526 if (status != SDVO_CMD_STATUS_SUCCESS)
527 goto log_fail;
528
529 /* Read the command response */
530 for (i = 0; i < response_len; i++) {
531 if (!intel_sdvo_read_byte(intel_sdvo,
532 SDVO_I2C_RETURN_0 + i,
533 &((u8 *)response)[i]))
534 goto log_fail;
535 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
536 }
537 DRM_LOG_KMS("\n");
538 return true;
539
540 log_fail:
541 DRM_LOG_KMS("... failed\n");
542 return false;
543 }
544
intel_sdvo_get_pixel_multiplier(struct drm_display_mode * mode)545 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
546 {
547 if (mode->clock >= 100000)
548 return 1;
549 else if (mode->clock >= 50000)
550 return 2;
551 else
552 return 4;
553 }
554
intel_sdvo_set_control_bus_switch(struct intel_sdvo * intel_sdvo,u8 ddc_bus)555 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
556 u8 ddc_bus)
557 {
558 /* This must be the immediately preceding write before the i2c xfer */
559 return intel_sdvo_write_cmd(intel_sdvo,
560 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
561 &ddc_bus, 1);
562 }
563
intel_sdvo_set_value(struct intel_sdvo * intel_sdvo,u8 cmd,const void * data,int len)564 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
565 {
566 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
567 return false;
568
569 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
570 }
571
572 static bool
intel_sdvo_get_value(struct intel_sdvo * intel_sdvo,u8 cmd,void * value,int len)573 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
574 {
575 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
576 return false;
577
578 return intel_sdvo_read_response(intel_sdvo, value, len);
579 }
580
intel_sdvo_set_target_input(struct intel_sdvo * intel_sdvo)581 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
582 {
583 struct intel_sdvo_set_target_input_args targets = {0};
584 return intel_sdvo_set_value(intel_sdvo,
585 SDVO_CMD_SET_TARGET_INPUT,
586 &targets, sizeof(targets));
587 }
588
589 /**
590 * Return whether each input is trained.
591 *
592 * This function is making an assumption about the layout of the response,
593 * which should be checked against the docs.
594 */
intel_sdvo_get_trained_inputs(struct intel_sdvo * intel_sdvo,bool * input_1,bool * input_2)595 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
596 {
597 struct intel_sdvo_get_trained_inputs_response response;
598
599 BUILD_BUG_ON(sizeof(response) != 1);
600 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
601 &response, sizeof(response)))
602 return false;
603
604 *input_1 = response.input0_trained;
605 *input_2 = response.input1_trained;
606 return true;
607 }
608
intel_sdvo_set_active_outputs(struct intel_sdvo * intel_sdvo,u16 outputs)609 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
610 u16 outputs)
611 {
612 return intel_sdvo_set_value(intel_sdvo,
613 SDVO_CMD_SET_ACTIVE_OUTPUTS,
614 &outputs, sizeof(outputs));
615 }
616
intel_sdvo_set_encoder_power_state(struct intel_sdvo * intel_sdvo,int mode)617 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
618 int mode)
619 {
620 u8 state = SDVO_ENCODER_STATE_ON;
621
622 switch (mode) {
623 case DRM_MODE_DPMS_ON:
624 state = SDVO_ENCODER_STATE_ON;
625 break;
626 case DRM_MODE_DPMS_STANDBY:
627 state = SDVO_ENCODER_STATE_STANDBY;
628 break;
629 case DRM_MODE_DPMS_SUSPEND:
630 state = SDVO_ENCODER_STATE_SUSPEND;
631 break;
632 case DRM_MODE_DPMS_OFF:
633 state = SDVO_ENCODER_STATE_OFF;
634 break;
635 }
636
637 return intel_sdvo_set_value(intel_sdvo,
638 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
639 }
640
intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo * intel_sdvo,int * clock_min,int * clock_max)641 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
642 int *clock_min,
643 int *clock_max)
644 {
645 struct intel_sdvo_pixel_clock_range clocks;
646
647 BUILD_BUG_ON(sizeof(clocks) != 4);
648 if (!intel_sdvo_get_value(intel_sdvo,
649 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
650 &clocks, sizeof(clocks)))
651 return false;
652
653 /* Convert the values from units of 10 kHz to kHz. */
654 *clock_min = clocks.min * 10;
655 *clock_max = clocks.max * 10;
656 return true;
657 }
658
intel_sdvo_set_target_output(struct intel_sdvo * intel_sdvo,u16 outputs)659 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
660 u16 outputs)
661 {
662 return intel_sdvo_set_value(intel_sdvo,
663 SDVO_CMD_SET_TARGET_OUTPUT,
664 &outputs, sizeof(outputs));
665 }
666
intel_sdvo_set_timing(struct intel_sdvo * intel_sdvo,u8 cmd,struct intel_sdvo_dtd * dtd)667 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
668 struct intel_sdvo_dtd *dtd)
669 {
670 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
671 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
672 }
673
intel_sdvo_set_input_timing(struct intel_sdvo * intel_sdvo,struct intel_sdvo_dtd * dtd)674 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
675 struct intel_sdvo_dtd *dtd)
676 {
677 return intel_sdvo_set_timing(intel_sdvo,
678 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
679 }
680
intel_sdvo_set_output_timing(struct intel_sdvo * intel_sdvo,struct intel_sdvo_dtd * dtd)681 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
682 struct intel_sdvo_dtd *dtd)
683 {
684 return intel_sdvo_set_timing(intel_sdvo,
685 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
686 }
687
688 static bool
intel_sdvo_create_preferred_input_timing(struct intel_sdvo * intel_sdvo,uint16_t clock,uint16_t width,uint16_t height)689 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
690 uint16_t clock,
691 uint16_t width,
692 uint16_t height)
693 {
694 struct intel_sdvo_preferred_input_timing_args args;
695
696 memset(&args, 0, sizeof(args));
697 args.clock = clock;
698 args.width = width;
699 args.height = height;
700 args.interlace = 0;
701
702 if (intel_sdvo->is_lvds &&
703 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
704 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
705 args.scaled = 1;
706
707 return intel_sdvo_set_value(intel_sdvo,
708 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
709 &args, sizeof(args));
710 }
711
intel_sdvo_get_preferred_input_timing(struct intel_sdvo * intel_sdvo,struct intel_sdvo_dtd * dtd)712 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
713 struct intel_sdvo_dtd *dtd)
714 {
715 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
716 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
717 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
718 &dtd->part1, sizeof(dtd->part1)) &&
719 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
720 &dtd->part2, sizeof(dtd->part2));
721 }
722
intel_sdvo_set_clock_rate_mult(struct intel_sdvo * intel_sdvo,u8 val)723 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
724 {
725 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
726 }
727
intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd * dtd,const struct drm_display_mode * mode)728 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
729 const struct drm_display_mode *mode)
730 {
731 uint16_t width, height;
732 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
733 uint16_t h_sync_offset, v_sync_offset;
734
735 width = mode->crtc_hdisplay;
736 height = mode->crtc_vdisplay;
737
738 /* do some mode translations */
739 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
740 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
741
742 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
743 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
744
745 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
746 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
747
748 dtd->part1.clock = mode->clock / 10;
749 dtd->part1.h_active = width & 0xff;
750 dtd->part1.h_blank = h_blank_len & 0xff;
751 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
752 ((h_blank_len >> 8) & 0xf);
753 dtd->part1.v_active = height & 0xff;
754 dtd->part1.v_blank = v_blank_len & 0xff;
755 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
756 ((v_blank_len >> 8) & 0xf);
757
758 dtd->part2.h_sync_off = h_sync_offset & 0xff;
759 dtd->part2.h_sync_width = h_sync_len & 0xff;
760 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
761 (v_sync_len & 0xf);
762 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
763 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
764 ((v_sync_len & 0x30) >> 4);
765
766 dtd->part2.dtd_flags = 0x18;
767 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
768 dtd->part2.dtd_flags |= 0x2;
769 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
770 dtd->part2.dtd_flags |= 0x4;
771
772 dtd->part2.sdvo_flags = 0;
773 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
774 dtd->part2.reserved = 0;
775 }
776
intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,const struct intel_sdvo_dtd * dtd)777 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
778 const struct intel_sdvo_dtd *dtd)
779 {
780 mode->hdisplay = dtd->part1.h_active;
781 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
782 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
783 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
784 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
785 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
786 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
787 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
788
789 mode->vdisplay = dtd->part1.v_active;
790 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
791 mode->vsync_start = mode->vdisplay;
792 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
793 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
794 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
795 mode->vsync_end = mode->vsync_start +
796 (dtd->part2.v_sync_off_width & 0xf);
797 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
798 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
799 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
800
801 mode->clock = dtd->part1.clock * 10;
802
803 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
804 if (dtd->part2.dtd_flags & 0x2)
805 mode->flags |= DRM_MODE_FLAG_PHSYNC;
806 if (dtd->part2.dtd_flags & 0x4)
807 mode->flags |= DRM_MODE_FLAG_PVSYNC;
808 }
809
intel_sdvo_check_supp_encode(struct intel_sdvo * intel_sdvo)810 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
811 {
812 struct intel_sdvo_encode encode;
813
814 BUILD_BUG_ON(sizeof(encode) != 2);
815 return intel_sdvo_get_value(intel_sdvo,
816 SDVO_CMD_GET_SUPP_ENCODE,
817 &encode, sizeof(encode));
818 }
819
intel_sdvo_set_encode(struct intel_sdvo * intel_sdvo,uint8_t mode)820 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
821 uint8_t mode)
822 {
823 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
824 }
825
intel_sdvo_set_colorimetry(struct intel_sdvo * intel_sdvo,uint8_t mode)826 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
827 uint8_t mode)
828 {
829 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
830 }
831
832 #if 0
833 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
834 {
835 int i, j;
836 uint8_t set_buf_index[2];
837 uint8_t av_split;
838 uint8_t buf_size;
839 uint8_t buf[48];
840 uint8_t *pos;
841
842 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
843
844 for (i = 0; i <= av_split; i++) {
845 set_buf_index[0] = i; set_buf_index[1] = 0;
846 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
847 set_buf_index, 2);
848 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
849 intel_sdvo_read_response(encoder, &buf_size, 1);
850
851 pos = buf;
852 for (j = 0; j <= buf_size; j += 8) {
853 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
854 NULL, 0);
855 intel_sdvo_read_response(encoder, pos, 8);
856 pos += 8;
857 }
858 }
859 }
860 #endif
861
intel_sdvo_set_avi_infoframe(struct intel_sdvo * intel_sdvo)862 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
863 {
864 struct dip_infoframe avi_if = {
865 .type = DIP_TYPE_AVI,
866 .ver = DIP_VERSION_AVI,
867 .len = DIP_LEN_AVI,
868 };
869 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
870 uint8_t set_buf_index[2] = { 1, 0 };
871 uint64_t *data = (uint64_t *)&avi_if;
872 unsigned i;
873
874 intel_dip_infoframe_csum(&avi_if);
875
876 if (!intel_sdvo_set_value(intel_sdvo,
877 SDVO_CMD_SET_HBUF_INDEX,
878 set_buf_index, 2))
879 return false;
880
881 for (i = 0; i < sizeof(avi_if); i += 8) {
882 if (!intel_sdvo_set_value(intel_sdvo,
883 SDVO_CMD_SET_HBUF_DATA,
884 data, 8))
885 return false;
886 data++;
887 }
888
889 return intel_sdvo_set_value(intel_sdvo,
890 SDVO_CMD_SET_HBUF_TXRATE,
891 &tx_rate, 1);
892 }
893
intel_sdvo_set_tv_format(struct intel_sdvo * intel_sdvo)894 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
895 {
896 struct intel_sdvo_tv_format format;
897 uint32_t format_map;
898
899 format_map = 1 << intel_sdvo->tv_format_index;
900 memset(&format, 0, sizeof(format));
901 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
902
903 BUILD_BUG_ON(sizeof(format) != 6);
904 return intel_sdvo_set_value(intel_sdvo,
905 SDVO_CMD_SET_TV_FORMAT,
906 &format, sizeof(format));
907 }
908
909 static bool
intel_sdvo_set_output_timings_from_mode(struct intel_sdvo * intel_sdvo,struct drm_display_mode * mode)910 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
911 struct drm_display_mode *mode)
912 {
913 struct intel_sdvo_dtd output_dtd;
914
915 if (!intel_sdvo_set_target_output(intel_sdvo,
916 intel_sdvo->attached_output))
917 return false;
918
919 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
920 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
921 return false;
922
923 return true;
924 }
925
926 static bool
intel_sdvo_set_input_timings_for_mode(struct intel_sdvo * intel_sdvo,struct drm_display_mode * mode,struct drm_display_mode * adjusted_mode)927 intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
928 struct drm_display_mode *mode,
929 struct drm_display_mode *adjusted_mode)
930 {
931 /* Reset the input timing to the screen. Assume always input 0. */
932 if (!intel_sdvo_set_target_input(intel_sdvo))
933 return false;
934
935 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
936 mode->clock / 10,
937 mode->hdisplay,
938 mode->vdisplay))
939 return false;
940
941 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
942 &intel_sdvo->input_dtd))
943 return false;
944
945 intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
946
947 drm_mode_set_crtcinfo(adjusted_mode, 0);
948 return true;
949 }
950
intel_sdvo_mode_fixup(struct drm_encoder * encoder,struct drm_display_mode * mode,struct drm_display_mode * adjusted_mode)951 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
952 struct drm_display_mode *mode,
953 struct drm_display_mode *adjusted_mode)
954 {
955 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
956 int multiplier;
957
958 /* We need to construct preferred input timings based on our
959 * output timings. To do that, we have to set the output
960 * timings, even though this isn't really the right place in
961 * the sequence to do it. Oh well.
962 */
963 if (intel_sdvo->is_tv) {
964 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
965 return false;
966
967 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
968 mode,
969 adjusted_mode);
970 } else if (intel_sdvo->is_lvds) {
971 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
972 intel_sdvo->sdvo_lvds_fixed_mode))
973 return false;
974
975 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
976 mode,
977 adjusted_mode);
978 }
979
980 /* Make the CRTC code factor in the SDVO pixel multiplier. The
981 * SDVO device will factor out the multiplier during mode_set.
982 */
983 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
984 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
985
986 return true;
987 }
988
intel_sdvo_mode_set(struct drm_encoder * encoder,struct drm_display_mode * mode,struct drm_display_mode * adjusted_mode)989 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
990 struct drm_display_mode *mode,
991 struct drm_display_mode *adjusted_mode)
992 {
993 struct drm_device *dev = encoder->dev;
994 struct drm_i915_private *dev_priv = dev->dev_private;
995 struct drm_crtc *crtc = encoder->crtc;
996 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
997 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
998 u32 sdvox;
999 struct intel_sdvo_in_out_map in_out;
1000 struct intel_sdvo_dtd input_dtd;
1001 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1002 int rate;
1003
1004 if (!mode)
1005 return;
1006
1007 /* First, set the input mapping for the first input to our controlled
1008 * output. This is only correct if we're a single-input device, in
1009 * which case the first input is the output from the appropriate SDVO
1010 * channel on the motherboard. In a two-input device, the first input
1011 * will be SDVOB and the second SDVOC.
1012 */
1013 in_out.in0 = intel_sdvo->attached_output;
1014 in_out.in1 = 0;
1015
1016 intel_sdvo_set_value(intel_sdvo,
1017 SDVO_CMD_SET_IN_OUT_MAP,
1018 &in_out, sizeof(in_out));
1019
1020 /* Set the output timings to the screen */
1021 if (!intel_sdvo_set_target_output(intel_sdvo,
1022 intel_sdvo->attached_output))
1023 return;
1024
1025 /* We have tried to get input timing in mode_fixup, and filled into
1026 * adjusted_mode.
1027 */
1028 if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
1029 input_dtd = intel_sdvo->input_dtd;
1030 } else {
1031 /* Set the output timing to the screen */
1032 if (!intel_sdvo_set_target_output(intel_sdvo,
1033 intel_sdvo->attached_output))
1034 return;
1035
1036 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1037 (void) intel_sdvo_set_output_timing(intel_sdvo, &input_dtd);
1038 }
1039
1040 /* Set the input timing to the screen. Assume always input 0. */
1041 if (!intel_sdvo_set_target_input(intel_sdvo))
1042 return;
1043
1044 if (intel_sdvo->has_hdmi_monitor) {
1045 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1046 intel_sdvo_set_colorimetry(intel_sdvo,
1047 SDVO_COLORIMETRY_RGB256);
1048 intel_sdvo_set_avi_infoframe(intel_sdvo);
1049 } else
1050 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1051
1052 if (intel_sdvo->is_tv &&
1053 !intel_sdvo_set_tv_format(intel_sdvo))
1054 return;
1055
1056 (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
1057
1058 switch (pixel_multiplier) {
1059 default:
1060 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1061 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1062 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1063 }
1064 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1065 return;
1066
1067 /* Set the SDVO control regs. */
1068 if (INTEL_INFO(dev)->gen >= 4) {
1069 /* The real mode polarity is set by the SDVO commands, using
1070 * struct intel_sdvo_dtd. */
1071 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1072 if (intel_sdvo->is_hdmi)
1073 sdvox |= intel_sdvo->color_range;
1074 if (INTEL_INFO(dev)->gen < 5)
1075 sdvox |= SDVO_BORDER_ENABLE;
1076 } else {
1077 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1078 switch (intel_sdvo->sdvo_reg) {
1079 case SDVOB:
1080 sdvox &= SDVOB_PRESERVE_MASK;
1081 break;
1082 case SDVOC:
1083 sdvox &= SDVOC_PRESERVE_MASK;
1084 break;
1085 }
1086 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1087 }
1088
1089 if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1090 sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
1091 else
1092 sdvox |= TRANSCODER(intel_crtc->pipe);
1093
1094 if (intel_sdvo->has_hdmi_audio)
1095 sdvox |= SDVO_AUDIO_ENABLE;
1096
1097 if (INTEL_INFO(dev)->gen >= 4) {
1098 /* done in crtc_mode_set as the dpll_md reg must be written early */
1099 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1100 /* done in crtc_mode_set as it lives inside the dpll register */
1101 } else {
1102 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1103 }
1104
1105 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1106 INTEL_INFO(dev)->gen < 5)
1107 sdvox |= SDVO_STALL_SELECT;
1108 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1109 }
1110
intel_sdvo_dpms(struct drm_encoder * encoder,int mode)1111 static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1112 {
1113 struct drm_device *dev = encoder->dev;
1114 struct drm_i915_private *dev_priv = dev->dev_private;
1115 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1116 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
1117 u32 temp;
1118
1119 if (mode != DRM_MODE_DPMS_ON) {
1120 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1121 if (0)
1122 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1123
1124 if (mode == DRM_MODE_DPMS_OFF) {
1125 temp = I915_READ(intel_sdvo->sdvo_reg);
1126 if ((temp & SDVO_ENABLE) != 0) {
1127 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1128 }
1129 }
1130 } else {
1131 bool input1, input2;
1132 int i;
1133 u8 status;
1134
1135 temp = I915_READ(intel_sdvo->sdvo_reg);
1136 if ((temp & SDVO_ENABLE) == 0)
1137 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1138 for (i = 0; i < 2; i++)
1139 intel_wait_for_vblank(dev, intel_crtc->pipe);
1140
1141 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1142 /* Warn if the device reported failure to sync.
1143 * A lot of SDVO devices fail to notify of sync, but it's
1144 * a given it the status is a success, we succeeded.
1145 */
1146 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1147 DRM_DEBUG_KMS("First %s output reported failure to "
1148 "sync\n", SDVO_NAME(intel_sdvo));
1149 }
1150
1151 if (0)
1152 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1153 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1154 }
1155 return;
1156 }
1157
intel_sdvo_mode_valid(struct drm_connector * connector,struct drm_display_mode * mode)1158 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1159 struct drm_display_mode *mode)
1160 {
1161 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1162
1163 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1164 return MODE_NO_DBLESCAN;
1165
1166 if (intel_sdvo->pixel_clock_min > mode->clock)
1167 return MODE_CLOCK_LOW;
1168
1169 if (intel_sdvo->pixel_clock_max < mode->clock)
1170 return MODE_CLOCK_HIGH;
1171
1172 if (intel_sdvo->is_lvds) {
1173 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1174 return MODE_PANEL;
1175
1176 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1177 return MODE_PANEL;
1178 }
1179
1180 return MODE_OK;
1181 }
1182
intel_sdvo_get_capabilities(struct intel_sdvo * intel_sdvo,struct intel_sdvo_caps * caps)1183 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1184 {
1185 BUILD_BUG_ON(sizeof(*caps) != 8);
1186 if (!intel_sdvo_get_value(intel_sdvo,
1187 SDVO_CMD_GET_DEVICE_CAPS,
1188 caps, sizeof(*caps)))
1189 return false;
1190
1191 DRM_DEBUG_KMS("SDVO capabilities:\n"
1192 " vendor_id: %d\n"
1193 " device_id: %d\n"
1194 " device_rev_id: %d\n"
1195 " sdvo_version_major: %d\n"
1196 " sdvo_version_minor: %d\n"
1197 " sdvo_inputs_mask: %d\n"
1198 " smooth_scaling: %d\n"
1199 " sharp_scaling: %d\n"
1200 " up_scaling: %d\n"
1201 " down_scaling: %d\n"
1202 " stall_support: %d\n"
1203 " output_flags: %d\n",
1204 caps->vendor_id,
1205 caps->device_id,
1206 caps->device_rev_id,
1207 caps->sdvo_version_major,
1208 caps->sdvo_version_minor,
1209 caps->sdvo_inputs_mask,
1210 caps->smooth_scaling,
1211 caps->sharp_scaling,
1212 caps->up_scaling,
1213 caps->down_scaling,
1214 caps->stall_support,
1215 caps->output_flags);
1216
1217 return true;
1218 }
1219
intel_sdvo_supports_hotplug(struct intel_sdvo * intel_sdvo)1220 static int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo)
1221 {
1222 u8 response[2];
1223
1224 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1225 &response, 2) && response[0];
1226 }
1227
intel_sdvo_enable_hotplug(struct intel_encoder * encoder)1228 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1229 {
1230 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1231
1232 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &intel_sdvo->hotplug_active, 2);
1233 }
1234
1235 static bool
intel_sdvo_multifunc_encoder(struct intel_sdvo * intel_sdvo)1236 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1237 {
1238 /* Is there more than one type of output? */
1239 return hweight16(intel_sdvo->caps.output_flags) > 1;
1240 }
1241
1242 static struct edid *
intel_sdvo_get_edid(struct drm_connector * connector)1243 intel_sdvo_get_edid(struct drm_connector *connector)
1244 {
1245 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1246 return drm_get_edid(connector, &sdvo->ddc);
1247 }
1248
1249 /* Mac mini hack -- use the same DDC as the analog connector */
1250 static struct edid *
intel_sdvo_get_analog_edid(struct drm_connector * connector)1251 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1252 {
1253 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1254
1255 return drm_get_edid(connector,
1256 &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
1257 }
1258
1259 enum drm_connector_status
intel_sdvo_tmds_sink_detect(struct drm_connector * connector)1260 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1261 {
1262 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1263 enum drm_connector_status status;
1264 struct edid *edid;
1265
1266 edid = intel_sdvo_get_edid(connector);
1267
1268 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1269 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1270
1271 /*
1272 * Don't use the 1 as the argument of DDC bus switch to get
1273 * the EDID. It is used for SDVO SPD ROM.
1274 */
1275 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1276 intel_sdvo->ddc_bus = ddc;
1277 edid = intel_sdvo_get_edid(connector);
1278 if (edid)
1279 break;
1280 }
1281 /*
1282 * If we found the EDID on the other bus,
1283 * assume that is the correct DDC bus.
1284 */
1285 if (edid == NULL)
1286 intel_sdvo->ddc_bus = saved_ddc;
1287 }
1288
1289 /*
1290 * When there is no edid and no monitor is connected with VGA
1291 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1292 */
1293 if (edid == NULL)
1294 edid = intel_sdvo_get_analog_edid(connector);
1295
1296 status = connector_status_unknown;
1297 if (edid != NULL) {
1298 /* DDC bus is shared, match EDID to connector type */
1299 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1300 status = connector_status_connected;
1301 if (intel_sdvo->is_hdmi) {
1302 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1303 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1304 }
1305 } else
1306 status = connector_status_disconnected;
1307 connector->display_info.raw_edid = NULL;
1308 kfree(edid);
1309 }
1310
1311 if (status == connector_status_connected) {
1312 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1313 if (intel_sdvo_connector->force_audio)
1314 intel_sdvo->has_hdmi_audio = intel_sdvo_connector->force_audio > 0;
1315 }
1316
1317 return status;
1318 }
1319
1320 static bool
intel_sdvo_connector_matches_edid(struct intel_sdvo_connector * sdvo,struct edid * edid)1321 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1322 struct edid *edid)
1323 {
1324 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1325 bool connector_is_digital = !!IS_DIGITAL(sdvo);
1326
1327 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1328 connector_is_digital, monitor_is_digital);
1329 return connector_is_digital == monitor_is_digital;
1330 }
1331
1332 static enum drm_connector_status
intel_sdvo_detect(struct drm_connector * connector,bool force)1333 intel_sdvo_detect(struct drm_connector *connector, bool force)
1334 {
1335 uint16_t response;
1336 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1337 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1338 enum drm_connector_status ret;
1339
1340 if (!intel_sdvo_write_cmd(intel_sdvo,
1341 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1342 return connector_status_unknown;
1343
1344 /* add 30ms delay when the output type might be TV */
1345 if (intel_sdvo->caps.output_flags &
1346 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0))
1347 mdelay(30);
1348
1349 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1350 return connector_status_unknown;
1351
1352 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1353 response & 0xff, response >> 8,
1354 intel_sdvo_connector->output_flag);
1355
1356 if (response == 0)
1357 return connector_status_disconnected;
1358
1359 intel_sdvo->attached_output = response;
1360
1361 intel_sdvo->has_hdmi_monitor = false;
1362 intel_sdvo->has_hdmi_audio = false;
1363
1364 if ((intel_sdvo_connector->output_flag & response) == 0)
1365 ret = connector_status_disconnected;
1366 else if (IS_TMDS(intel_sdvo_connector))
1367 ret = intel_sdvo_tmds_sink_detect(connector);
1368 else {
1369 struct edid *edid;
1370
1371 /* if we have an edid check it matches the connection */
1372 edid = intel_sdvo_get_edid(connector);
1373 if (edid == NULL)
1374 edid = intel_sdvo_get_analog_edid(connector);
1375 if (edid != NULL) {
1376 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1377 edid))
1378 ret = connector_status_connected;
1379 else
1380 ret = connector_status_disconnected;
1381
1382 connector->display_info.raw_edid = NULL;
1383 kfree(edid);
1384 } else
1385 ret = connector_status_connected;
1386 }
1387
1388 /* May update encoder flag for like clock for SDVO TV, etc.*/
1389 if (ret == connector_status_connected) {
1390 intel_sdvo->is_tv = false;
1391 intel_sdvo->is_lvds = false;
1392 intel_sdvo->base.needs_tv_clock = false;
1393
1394 if (response & SDVO_TV_MASK) {
1395 intel_sdvo->is_tv = true;
1396 intel_sdvo->base.needs_tv_clock = true;
1397 }
1398 if (response & SDVO_LVDS_MASK)
1399 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1400 }
1401
1402 return ret;
1403 }
1404
intel_sdvo_get_ddc_modes(struct drm_connector * connector)1405 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1406 {
1407 struct edid *edid;
1408
1409 /* set the bus switch and get the modes */
1410 edid = intel_sdvo_get_edid(connector);
1411
1412 /*
1413 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1414 * link between analog and digital outputs. So, if the regular SDVO
1415 * DDC fails, check to see if the analog output is disconnected, in
1416 * which case we'll look there for the digital DDC data.
1417 */
1418 if (edid == NULL)
1419 edid = intel_sdvo_get_analog_edid(connector);
1420
1421 if (edid != NULL) {
1422 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1423 edid)) {
1424 drm_mode_connector_update_edid_property(connector, edid);
1425 drm_add_edid_modes(connector, edid);
1426 }
1427
1428 connector->display_info.raw_edid = NULL;
1429 kfree(edid);
1430 }
1431 }
1432
1433 /*
1434 * Set of SDVO TV modes.
1435 * Note! This is in reply order (see loop in get_tv_modes).
1436 * XXX: all 60Hz refresh?
1437 */
1438 static const struct drm_display_mode sdvo_tv_modes[] = {
1439 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1440 416, 0, 200, 201, 232, 233, 0,
1441 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1442 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1443 416, 0, 240, 241, 272, 273, 0,
1444 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1445 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1446 496, 0, 300, 301, 332, 333, 0,
1447 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1448 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1449 736, 0, 350, 351, 382, 383, 0,
1450 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1451 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1452 736, 0, 400, 401, 432, 433, 0,
1453 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1454 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1455 736, 0, 480, 481, 512, 513, 0,
1456 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1457 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1458 800, 0, 480, 481, 512, 513, 0,
1459 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1460 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1461 800, 0, 576, 577, 608, 609, 0,
1462 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1463 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1464 816, 0, 350, 351, 382, 383, 0,
1465 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1466 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1467 816, 0, 400, 401, 432, 433, 0,
1468 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1469 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1470 816, 0, 480, 481, 512, 513, 0,
1471 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1472 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1473 816, 0, 540, 541, 572, 573, 0,
1474 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1475 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1476 816, 0, 576, 577, 608, 609, 0,
1477 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1478 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1479 864, 0, 576, 577, 608, 609, 0,
1480 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1481 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1482 896, 0, 600, 601, 632, 633, 0,
1483 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1484 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1485 928, 0, 624, 625, 656, 657, 0,
1486 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1487 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1488 1016, 0, 766, 767, 798, 799, 0,
1489 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1490 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1491 1120, 0, 768, 769, 800, 801, 0,
1492 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1493 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1494 1376, 0, 1024, 1025, 1056, 1057, 0,
1495 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1496 };
1497
intel_sdvo_get_tv_modes(struct drm_connector * connector)1498 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1499 {
1500 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1501 struct intel_sdvo_sdtv_resolution_request tv_res;
1502 uint32_t reply = 0, format_map = 0;
1503 int i;
1504
1505 /* Read the list of supported input resolutions for the selected TV
1506 * format.
1507 */
1508 format_map = 1 << intel_sdvo->tv_format_index;
1509 memcpy(&tv_res, &format_map,
1510 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1511
1512 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1513 return;
1514
1515 BUILD_BUG_ON(sizeof(tv_res) != 3);
1516 if (!intel_sdvo_write_cmd(intel_sdvo,
1517 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1518 &tv_res, sizeof(tv_res)))
1519 return;
1520 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1521 return;
1522
1523 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1524 if (reply & (1 << i)) {
1525 struct drm_display_mode *nmode;
1526 nmode = drm_mode_duplicate(connector->dev,
1527 &sdvo_tv_modes[i]);
1528 if (nmode)
1529 drm_mode_probed_add(connector, nmode);
1530 }
1531 }
1532
intel_sdvo_get_lvds_modes(struct drm_connector * connector)1533 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1534 {
1535 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1536 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1537 struct drm_display_mode *newmode;
1538
1539 /*
1540 * Attempt to get the mode list from DDC.
1541 * Assume that the preferred modes are
1542 * arranged in priority order.
1543 */
1544 intel_ddc_get_modes(connector, intel_sdvo->i2c);
1545 if (list_empty(&connector->probed_modes) == false)
1546 goto end;
1547
1548 /* Fetch modes from VBT */
1549 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1550 newmode = drm_mode_duplicate(connector->dev,
1551 dev_priv->sdvo_lvds_vbt_mode);
1552 if (newmode != NULL) {
1553 /* Guarantee the mode is preferred */
1554 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1555 DRM_MODE_TYPE_DRIVER);
1556 drm_mode_probed_add(connector, newmode);
1557 }
1558 }
1559
1560 end:
1561 list_for_each_entry(newmode, &connector->probed_modes, head) {
1562 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1563 intel_sdvo->sdvo_lvds_fixed_mode =
1564 drm_mode_duplicate(connector->dev, newmode);
1565
1566 drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
1567 0);
1568
1569 intel_sdvo->is_lvds = true;
1570 break;
1571 }
1572 }
1573
1574 }
1575
intel_sdvo_get_modes(struct drm_connector * connector)1576 static int intel_sdvo_get_modes(struct drm_connector *connector)
1577 {
1578 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1579
1580 if (IS_TV(intel_sdvo_connector))
1581 intel_sdvo_get_tv_modes(connector);
1582 else if (IS_LVDS(intel_sdvo_connector))
1583 intel_sdvo_get_lvds_modes(connector);
1584 else
1585 intel_sdvo_get_ddc_modes(connector);
1586
1587 return !list_empty(&connector->probed_modes);
1588 }
1589
1590 static void
intel_sdvo_destroy_enhance_property(struct drm_connector * connector)1591 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1592 {
1593 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1594 struct drm_device *dev = connector->dev;
1595
1596 if (intel_sdvo_connector->left)
1597 drm_property_destroy(dev, intel_sdvo_connector->left);
1598 if (intel_sdvo_connector->right)
1599 drm_property_destroy(dev, intel_sdvo_connector->right);
1600 if (intel_sdvo_connector->top)
1601 drm_property_destroy(dev, intel_sdvo_connector->top);
1602 if (intel_sdvo_connector->bottom)
1603 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1604 if (intel_sdvo_connector->hpos)
1605 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1606 if (intel_sdvo_connector->vpos)
1607 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1608 if (intel_sdvo_connector->saturation)
1609 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1610 if (intel_sdvo_connector->contrast)
1611 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1612 if (intel_sdvo_connector->hue)
1613 drm_property_destroy(dev, intel_sdvo_connector->hue);
1614 if (intel_sdvo_connector->sharpness)
1615 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1616 if (intel_sdvo_connector->flicker_filter)
1617 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1618 if (intel_sdvo_connector->flicker_filter_2d)
1619 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1620 if (intel_sdvo_connector->flicker_filter_adaptive)
1621 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1622 if (intel_sdvo_connector->tv_luma_filter)
1623 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1624 if (intel_sdvo_connector->tv_chroma_filter)
1625 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1626 if (intel_sdvo_connector->dot_crawl)
1627 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1628 if (intel_sdvo_connector->brightness)
1629 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1630 }
1631
intel_sdvo_destroy(struct drm_connector * connector)1632 static void intel_sdvo_destroy(struct drm_connector *connector)
1633 {
1634 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1635
1636 if (intel_sdvo_connector->tv_format)
1637 drm_property_destroy(connector->dev,
1638 intel_sdvo_connector->tv_format);
1639
1640 intel_sdvo_destroy_enhance_property(connector);
1641 drm_sysfs_connector_remove(connector);
1642 drm_connector_cleanup(connector);
1643 kfree(connector);
1644 }
1645
intel_sdvo_detect_hdmi_audio(struct drm_connector * connector)1646 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1647 {
1648 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1649 struct edid *edid;
1650 bool has_audio = false;
1651
1652 if (!intel_sdvo->is_hdmi)
1653 return false;
1654
1655 edid = intel_sdvo_get_edid(connector);
1656 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1657 has_audio = drm_detect_monitor_audio(edid);
1658
1659 return has_audio;
1660 }
1661
1662 static int
intel_sdvo_set_property(struct drm_connector * connector,struct drm_property * property,uint64_t val)1663 intel_sdvo_set_property(struct drm_connector *connector,
1664 struct drm_property *property,
1665 uint64_t val)
1666 {
1667 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1668 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1669 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1670 uint16_t temp_value;
1671 uint8_t cmd;
1672 int ret;
1673
1674 ret = drm_connector_property_set_value(connector, property, val);
1675 if (ret)
1676 return ret;
1677
1678 if (property == dev_priv->force_audio_property) {
1679 int i = val;
1680 bool has_audio;
1681
1682 if (i == intel_sdvo_connector->force_audio)
1683 return 0;
1684
1685 intel_sdvo_connector->force_audio = i;
1686
1687 if (i == 0)
1688 has_audio = intel_sdvo_detect_hdmi_audio(connector);
1689 else
1690 has_audio = i > 0;
1691
1692 if (has_audio == intel_sdvo->has_hdmi_audio)
1693 return 0;
1694
1695 intel_sdvo->has_hdmi_audio = has_audio;
1696 goto done;
1697 }
1698
1699 if (property == dev_priv->broadcast_rgb_property) {
1700 if (val == !!intel_sdvo->color_range)
1701 return 0;
1702
1703 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
1704 goto done;
1705 }
1706
1707 #define CHECK_PROPERTY(name, NAME) \
1708 if (intel_sdvo_connector->name == property) { \
1709 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1710 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1711 cmd = SDVO_CMD_SET_##NAME; \
1712 intel_sdvo_connector->cur_##name = temp_value; \
1713 goto set_value; \
1714 }
1715
1716 if (property == intel_sdvo_connector->tv_format) {
1717 if (val >= TV_FORMAT_NUM)
1718 return -EINVAL;
1719
1720 if (intel_sdvo->tv_format_index ==
1721 intel_sdvo_connector->tv_format_supported[val])
1722 return 0;
1723
1724 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1725 goto done;
1726 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1727 temp_value = val;
1728 if (intel_sdvo_connector->left == property) {
1729 drm_connector_property_set_value(connector,
1730 intel_sdvo_connector->right, val);
1731 if (intel_sdvo_connector->left_margin == temp_value)
1732 return 0;
1733
1734 intel_sdvo_connector->left_margin = temp_value;
1735 intel_sdvo_connector->right_margin = temp_value;
1736 temp_value = intel_sdvo_connector->max_hscan -
1737 intel_sdvo_connector->left_margin;
1738 cmd = SDVO_CMD_SET_OVERSCAN_H;
1739 goto set_value;
1740 } else if (intel_sdvo_connector->right == property) {
1741 drm_connector_property_set_value(connector,
1742 intel_sdvo_connector->left, val);
1743 if (intel_sdvo_connector->right_margin == temp_value)
1744 return 0;
1745
1746 intel_sdvo_connector->left_margin = temp_value;
1747 intel_sdvo_connector->right_margin = temp_value;
1748 temp_value = intel_sdvo_connector->max_hscan -
1749 intel_sdvo_connector->left_margin;
1750 cmd = SDVO_CMD_SET_OVERSCAN_H;
1751 goto set_value;
1752 } else if (intel_sdvo_connector->top == property) {
1753 drm_connector_property_set_value(connector,
1754 intel_sdvo_connector->bottom, val);
1755 if (intel_sdvo_connector->top_margin == temp_value)
1756 return 0;
1757
1758 intel_sdvo_connector->top_margin = temp_value;
1759 intel_sdvo_connector->bottom_margin = temp_value;
1760 temp_value = intel_sdvo_connector->max_vscan -
1761 intel_sdvo_connector->top_margin;
1762 cmd = SDVO_CMD_SET_OVERSCAN_V;
1763 goto set_value;
1764 } else if (intel_sdvo_connector->bottom == property) {
1765 drm_connector_property_set_value(connector,
1766 intel_sdvo_connector->top, val);
1767 if (intel_sdvo_connector->bottom_margin == temp_value)
1768 return 0;
1769
1770 intel_sdvo_connector->top_margin = temp_value;
1771 intel_sdvo_connector->bottom_margin = temp_value;
1772 temp_value = intel_sdvo_connector->max_vscan -
1773 intel_sdvo_connector->top_margin;
1774 cmd = SDVO_CMD_SET_OVERSCAN_V;
1775 goto set_value;
1776 }
1777 CHECK_PROPERTY(hpos, HPOS)
1778 CHECK_PROPERTY(vpos, VPOS)
1779 CHECK_PROPERTY(saturation, SATURATION)
1780 CHECK_PROPERTY(contrast, CONTRAST)
1781 CHECK_PROPERTY(hue, HUE)
1782 CHECK_PROPERTY(brightness, BRIGHTNESS)
1783 CHECK_PROPERTY(sharpness, SHARPNESS)
1784 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1785 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1786 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1787 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1788 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1789 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1790 }
1791
1792 return -EINVAL; /* unknown property */
1793
1794 set_value:
1795 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1796 return -EIO;
1797
1798
1799 done:
1800 if (intel_sdvo->base.base.crtc) {
1801 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1802 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1803 crtc->y, crtc->fb);
1804 }
1805
1806 return 0;
1807 #undef CHECK_PROPERTY
1808 }
1809
1810 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1811 .dpms = intel_sdvo_dpms,
1812 .mode_fixup = intel_sdvo_mode_fixup,
1813 .prepare = intel_encoder_prepare,
1814 .mode_set = intel_sdvo_mode_set,
1815 .commit = intel_encoder_commit,
1816 };
1817
1818 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
1819 .dpms = drm_helper_connector_dpms,
1820 .detect = intel_sdvo_detect,
1821 .fill_modes = drm_helper_probe_single_connector_modes,
1822 .set_property = intel_sdvo_set_property,
1823 .destroy = intel_sdvo_destroy,
1824 };
1825
1826 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1827 .get_modes = intel_sdvo_get_modes,
1828 .mode_valid = intel_sdvo_mode_valid,
1829 .best_encoder = intel_best_encoder,
1830 };
1831
intel_sdvo_enc_destroy(struct drm_encoder * encoder)1832 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1833 {
1834 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1835
1836 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1837 drm_mode_destroy(encoder->dev,
1838 intel_sdvo->sdvo_lvds_fixed_mode);
1839
1840 i2c_del_adapter(&intel_sdvo->ddc);
1841 intel_encoder_destroy(encoder);
1842 }
1843
1844 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1845 .destroy = intel_sdvo_enc_destroy,
1846 };
1847
1848 static void
intel_sdvo_guess_ddc_bus(struct intel_sdvo * sdvo)1849 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1850 {
1851 uint16_t mask = 0;
1852 unsigned int num_bits;
1853
1854 /* Make a mask of outputs less than or equal to our own priority in the
1855 * list.
1856 */
1857 switch (sdvo->controlled_output) {
1858 case SDVO_OUTPUT_LVDS1:
1859 mask |= SDVO_OUTPUT_LVDS1;
1860 case SDVO_OUTPUT_LVDS0:
1861 mask |= SDVO_OUTPUT_LVDS0;
1862 case SDVO_OUTPUT_TMDS1:
1863 mask |= SDVO_OUTPUT_TMDS1;
1864 case SDVO_OUTPUT_TMDS0:
1865 mask |= SDVO_OUTPUT_TMDS0;
1866 case SDVO_OUTPUT_RGB1:
1867 mask |= SDVO_OUTPUT_RGB1;
1868 case SDVO_OUTPUT_RGB0:
1869 mask |= SDVO_OUTPUT_RGB0;
1870 break;
1871 }
1872
1873 /* Count bits to find what number we are in the priority list. */
1874 mask &= sdvo->caps.output_flags;
1875 num_bits = hweight16(mask);
1876 /* If more than 3 outputs, default to DDC bus 3 for now. */
1877 if (num_bits > 3)
1878 num_bits = 3;
1879
1880 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1881 sdvo->ddc_bus = 1 << num_bits;
1882 }
1883
1884 /**
1885 * Choose the appropriate DDC bus for control bus switch command for this
1886 * SDVO output based on the controlled output.
1887 *
1888 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1889 * outputs, then LVDS outputs.
1890 */
1891 static void
intel_sdvo_select_ddc_bus(struct drm_i915_private * dev_priv,struct intel_sdvo * sdvo,u32 reg)1892 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
1893 struct intel_sdvo *sdvo, u32 reg)
1894 {
1895 struct sdvo_device_mapping *mapping;
1896
1897 if (IS_SDVOB(reg))
1898 mapping = &(dev_priv->sdvo_mappings[0]);
1899 else
1900 mapping = &(dev_priv->sdvo_mappings[1]);
1901
1902 if (mapping->initialized)
1903 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1904 else
1905 intel_sdvo_guess_ddc_bus(sdvo);
1906 }
1907
1908 static void
intel_sdvo_select_i2c_bus(struct drm_i915_private * dev_priv,struct intel_sdvo * sdvo,u32 reg)1909 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1910 struct intel_sdvo *sdvo, u32 reg)
1911 {
1912 struct sdvo_device_mapping *mapping;
1913 u8 pin;
1914
1915 if (IS_SDVOB(reg))
1916 mapping = &dev_priv->sdvo_mappings[0];
1917 else
1918 mapping = &dev_priv->sdvo_mappings[1];
1919
1920 pin = GMBUS_PORT_DPB;
1921 if (mapping->initialized)
1922 pin = mapping->i2c_pin;
1923
1924 if (pin < GMBUS_NUM_PORTS) {
1925 sdvo->i2c = &dev_priv->gmbus[pin].adapter;
1926 intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
1927 intel_gmbus_force_bit(sdvo->i2c, true);
1928 } else {
1929 sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter;
1930 }
1931 }
1932
1933 static bool
intel_sdvo_is_hdmi_connector(struct intel_sdvo * intel_sdvo,int device)1934 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
1935 {
1936 return intel_sdvo_check_supp_encode(intel_sdvo);
1937 }
1938
1939 static u8
intel_sdvo_get_slave_addr(struct drm_device * dev,int sdvo_reg)1940 intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
1941 {
1942 struct drm_i915_private *dev_priv = dev->dev_private;
1943 struct sdvo_device_mapping *my_mapping, *other_mapping;
1944
1945 if (IS_SDVOB(sdvo_reg)) {
1946 my_mapping = &dev_priv->sdvo_mappings[0];
1947 other_mapping = &dev_priv->sdvo_mappings[1];
1948 } else {
1949 my_mapping = &dev_priv->sdvo_mappings[1];
1950 other_mapping = &dev_priv->sdvo_mappings[0];
1951 }
1952
1953 /* If the BIOS described our SDVO device, take advantage of it. */
1954 if (my_mapping->slave_addr)
1955 return my_mapping->slave_addr;
1956
1957 /* If the BIOS only described a different SDVO device, use the
1958 * address that it isn't using.
1959 */
1960 if (other_mapping->slave_addr) {
1961 if (other_mapping->slave_addr == 0x70)
1962 return 0x72;
1963 else
1964 return 0x70;
1965 }
1966
1967 /* No SDVO device info is found for another DVO port,
1968 * so use mapping assumption we had before BIOS parsing.
1969 */
1970 if (IS_SDVOB(sdvo_reg))
1971 return 0x70;
1972 else
1973 return 0x72;
1974 }
1975
1976 static void
intel_sdvo_connector_init(struct intel_sdvo_connector * connector,struct intel_sdvo * encoder)1977 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
1978 struct intel_sdvo *encoder)
1979 {
1980 drm_connector_init(encoder->base.base.dev,
1981 &connector->base.base,
1982 &intel_sdvo_connector_funcs,
1983 connector->base.base.connector_type);
1984
1985 drm_connector_helper_add(&connector->base.base,
1986 &intel_sdvo_connector_helper_funcs);
1987
1988 connector->base.base.interlace_allowed = 0;
1989 connector->base.base.doublescan_allowed = 0;
1990 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
1991
1992 intel_connector_attach_encoder(&connector->base, &encoder->base);
1993 drm_sysfs_connector_add(&connector->base.base);
1994 }
1995
1996 static void
intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector * connector)1997 intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
1998 {
1999 struct drm_device *dev = connector->base.base.dev;
2000
2001 intel_attach_force_audio_property(&connector->base.base);
2002 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
2003 intel_attach_broadcast_rgb_property(&connector->base.base);
2004 }
2005
2006 static bool
intel_sdvo_dvi_init(struct intel_sdvo * intel_sdvo,int device)2007 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2008 {
2009 struct drm_encoder *encoder = &intel_sdvo->base.base;
2010 struct drm_connector *connector;
2011 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2012 struct intel_connector *intel_connector;
2013 struct intel_sdvo_connector *intel_sdvo_connector;
2014
2015 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2016 if (!intel_sdvo_connector)
2017 return false;
2018
2019 if (device == 0) {
2020 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2021 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2022 } else if (device == 1) {
2023 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2024 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2025 }
2026
2027 intel_connector = &intel_sdvo_connector->base;
2028 connector = &intel_connector->base;
2029 if (intel_sdvo_supports_hotplug(intel_sdvo) & (1 << device)) {
2030 connector->polled = DRM_CONNECTOR_POLL_HPD;
2031 intel_sdvo->hotplug_active[0] |= 1 << device;
2032 /* Some SDVO devices have one-shot hotplug interrupts.
2033 * Ensure that they get re-enabled when an interrupt happens.
2034 */
2035 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2036 intel_sdvo_enable_hotplug(intel_encoder);
2037 }
2038 else
2039 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2040 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2041 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2042
2043 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2044 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2045 intel_sdvo->is_hdmi = true;
2046 }
2047 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2048 (1 << INTEL_ANALOG_CLONE_BIT));
2049
2050 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2051 if (intel_sdvo->is_hdmi)
2052 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2053
2054 return true;
2055 }
2056
2057 static bool
intel_sdvo_tv_init(struct intel_sdvo * intel_sdvo,int type)2058 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2059 {
2060 struct drm_encoder *encoder = &intel_sdvo->base.base;
2061 struct drm_connector *connector;
2062 struct intel_connector *intel_connector;
2063 struct intel_sdvo_connector *intel_sdvo_connector;
2064
2065 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2066 if (!intel_sdvo_connector)
2067 return false;
2068
2069 intel_connector = &intel_sdvo_connector->base;
2070 connector = &intel_connector->base;
2071 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2072 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2073
2074 intel_sdvo->controlled_output |= type;
2075 intel_sdvo_connector->output_flag = type;
2076
2077 intel_sdvo->is_tv = true;
2078 intel_sdvo->base.needs_tv_clock = true;
2079 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2080
2081 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2082
2083 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2084 goto err;
2085
2086 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2087 goto err;
2088
2089 return true;
2090
2091 err:
2092 intel_sdvo_destroy(connector);
2093 return false;
2094 }
2095
2096 static bool
intel_sdvo_analog_init(struct intel_sdvo * intel_sdvo,int device)2097 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2098 {
2099 struct drm_encoder *encoder = &intel_sdvo->base.base;
2100 struct drm_connector *connector;
2101 struct intel_connector *intel_connector;
2102 struct intel_sdvo_connector *intel_sdvo_connector;
2103
2104 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2105 if (!intel_sdvo_connector)
2106 return false;
2107
2108 intel_connector = &intel_sdvo_connector->base;
2109 connector = &intel_connector->base;
2110 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2111 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2112 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2113
2114 if (device == 0) {
2115 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2116 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2117 } else if (device == 1) {
2118 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2119 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2120 }
2121
2122 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2123 (1 << INTEL_ANALOG_CLONE_BIT));
2124
2125 intel_sdvo_connector_init(intel_sdvo_connector,
2126 intel_sdvo);
2127 return true;
2128 }
2129
2130 static bool
intel_sdvo_lvds_init(struct intel_sdvo * intel_sdvo,int device)2131 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2132 {
2133 struct drm_encoder *encoder = &intel_sdvo->base.base;
2134 struct drm_connector *connector;
2135 struct intel_connector *intel_connector;
2136 struct intel_sdvo_connector *intel_sdvo_connector;
2137
2138 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2139 if (!intel_sdvo_connector)
2140 return false;
2141
2142 intel_connector = &intel_sdvo_connector->base;
2143 connector = &intel_connector->base;
2144 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2145 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2146
2147 if (device == 0) {
2148 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2149 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2150 } else if (device == 1) {
2151 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2152 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2153 }
2154
2155 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2156 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2157
2158 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2159 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2160 goto err;
2161
2162 return true;
2163
2164 err:
2165 intel_sdvo_destroy(connector);
2166 return false;
2167 }
2168
2169 static bool
intel_sdvo_output_setup(struct intel_sdvo * intel_sdvo,uint16_t flags)2170 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2171 {
2172 intel_sdvo->is_tv = false;
2173 intel_sdvo->base.needs_tv_clock = false;
2174 intel_sdvo->is_lvds = false;
2175
2176 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2177
2178 if (flags & SDVO_OUTPUT_TMDS0)
2179 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2180 return false;
2181
2182 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2183 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2184 return false;
2185
2186 /* TV has no XXX1 function block */
2187 if (flags & SDVO_OUTPUT_SVID0)
2188 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2189 return false;
2190
2191 if (flags & SDVO_OUTPUT_CVBS0)
2192 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2193 return false;
2194
2195 if (flags & SDVO_OUTPUT_RGB0)
2196 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2197 return false;
2198
2199 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2200 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2201 return false;
2202
2203 if (flags & SDVO_OUTPUT_LVDS0)
2204 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2205 return false;
2206
2207 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2208 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2209 return false;
2210
2211 if ((flags & SDVO_OUTPUT_MASK) == 0) {
2212 unsigned char bytes[2];
2213
2214 intel_sdvo->controlled_output = 0;
2215 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2216 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2217 SDVO_NAME(intel_sdvo),
2218 bytes[0], bytes[1]);
2219 return false;
2220 }
2221 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2222
2223 return true;
2224 }
2225
intel_sdvo_tv_create_property(struct intel_sdvo * intel_sdvo,struct intel_sdvo_connector * intel_sdvo_connector,int type)2226 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2227 struct intel_sdvo_connector *intel_sdvo_connector,
2228 int type)
2229 {
2230 struct drm_device *dev = intel_sdvo->base.base.dev;
2231 struct intel_sdvo_tv_format format;
2232 uint32_t format_map, i;
2233
2234 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2235 return false;
2236
2237 BUILD_BUG_ON(sizeof(format) != 6);
2238 if (!intel_sdvo_get_value(intel_sdvo,
2239 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2240 &format, sizeof(format)))
2241 return false;
2242
2243 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2244
2245 if (format_map == 0)
2246 return false;
2247
2248 intel_sdvo_connector->format_supported_num = 0;
2249 for (i = 0 ; i < TV_FORMAT_NUM; i++)
2250 if (format_map & (1 << i))
2251 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2252
2253
2254 intel_sdvo_connector->tv_format =
2255 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2256 "mode", intel_sdvo_connector->format_supported_num);
2257 if (!intel_sdvo_connector->tv_format)
2258 return false;
2259
2260 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2261 drm_property_add_enum(
2262 intel_sdvo_connector->tv_format, i,
2263 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2264
2265 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2266 drm_connector_attach_property(&intel_sdvo_connector->base.base,
2267 intel_sdvo_connector->tv_format, 0);
2268 return true;
2269
2270 }
2271
2272 #define ENHANCEMENT(name, NAME) do { \
2273 if (enhancements.name) { \
2274 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2275 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2276 return false; \
2277 intel_sdvo_connector->max_##name = data_value[0]; \
2278 intel_sdvo_connector->cur_##name = response; \
2279 intel_sdvo_connector->name = \
2280 drm_property_create(dev, DRM_MODE_PROP_RANGE, #name, 2); \
2281 if (!intel_sdvo_connector->name) return false; \
2282 intel_sdvo_connector->name->values[0] = 0; \
2283 intel_sdvo_connector->name->values[1] = data_value[0]; \
2284 drm_connector_attach_property(connector, \
2285 intel_sdvo_connector->name, \
2286 intel_sdvo_connector->cur_##name); \
2287 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2288 data_value[0], data_value[1], response); \
2289 } \
2290 } while (0)
2291
2292 static bool
intel_sdvo_create_enhance_property_tv(struct intel_sdvo * intel_sdvo,struct intel_sdvo_connector * intel_sdvo_connector,struct intel_sdvo_enhancements_reply enhancements)2293 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2294 struct intel_sdvo_connector *intel_sdvo_connector,
2295 struct intel_sdvo_enhancements_reply enhancements)
2296 {
2297 struct drm_device *dev = intel_sdvo->base.base.dev;
2298 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2299 uint16_t response, data_value[2];
2300
2301 /* when horizontal overscan is supported, Add the left/right property */
2302 if (enhancements.overscan_h) {
2303 if (!intel_sdvo_get_value(intel_sdvo,
2304 SDVO_CMD_GET_MAX_OVERSCAN_H,
2305 &data_value, 4))
2306 return false;
2307
2308 if (!intel_sdvo_get_value(intel_sdvo,
2309 SDVO_CMD_GET_OVERSCAN_H,
2310 &response, 2))
2311 return false;
2312
2313 intel_sdvo_connector->max_hscan = data_value[0];
2314 intel_sdvo_connector->left_margin = data_value[0] - response;
2315 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2316 intel_sdvo_connector->left =
2317 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2318 "left_margin", 2);
2319 if (!intel_sdvo_connector->left)
2320 return false;
2321
2322 intel_sdvo_connector->left->values[0] = 0;
2323 intel_sdvo_connector->left->values[1] = data_value[0];
2324 drm_connector_attach_property(connector,
2325 intel_sdvo_connector->left,
2326 intel_sdvo_connector->left_margin);
2327
2328 intel_sdvo_connector->right =
2329 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2330 "right_margin", 2);
2331 if (!intel_sdvo_connector->right)
2332 return false;
2333
2334 intel_sdvo_connector->right->values[0] = 0;
2335 intel_sdvo_connector->right->values[1] = data_value[0];
2336 drm_connector_attach_property(connector,
2337 intel_sdvo_connector->right,
2338 intel_sdvo_connector->right_margin);
2339 DRM_DEBUG_KMS("h_overscan: max %d, "
2340 "default %d, current %d\n",
2341 data_value[0], data_value[1], response);
2342 }
2343
2344 if (enhancements.overscan_v) {
2345 if (!intel_sdvo_get_value(intel_sdvo,
2346 SDVO_CMD_GET_MAX_OVERSCAN_V,
2347 &data_value, 4))
2348 return false;
2349
2350 if (!intel_sdvo_get_value(intel_sdvo,
2351 SDVO_CMD_GET_OVERSCAN_V,
2352 &response, 2))
2353 return false;
2354
2355 intel_sdvo_connector->max_vscan = data_value[0];
2356 intel_sdvo_connector->top_margin = data_value[0] - response;
2357 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2358 intel_sdvo_connector->top =
2359 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2360 "top_margin", 2);
2361 if (!intel_sdvo_connector->top)
2362 return false;
2363
2364 intel_sdvo_connector->top->values[0] = 0;
2365 intel_sdvo_connector->top->values[1] = data_value[0];
2366 drm_connector_attach_property(connector,
2367 intel_sdvo_connector->top,
2368 intel_sdvo_connector->top_margin);
2369
2370 intel_sdvo_connector->bottom =
2371 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2372 "bottom_margin", 2);
2373 if (!intel_sdvo_connector->bottom)
2374 return false;
2375
2376 intel_sdvo_connector->bottom->values[0] = 0;
2377 intel_sdvo_connector->bottom->values[1] = data_value[0];
2378 drm_connector_attach_property(connector,
2379 intel_sdvo_connector->bottom,
2380 intel_sdvo_connector->bottom_margin);
2381 DRM_DEBUG_KMS("v_overscan: max %d, "
2382 "default %d, current %d\n",
2383 data_value[0], data_value[1], response);
2384 }
2385
2386 ENHANCEMENT(hpos, HPOS);
2387 ENHANCEMENT(vpos, VPOS);
2388 ENHANCEMENT(saturation, SATURATION);
2389 ENHANCEMENT(contrast, CONTRAST);
2390 ENHANCEMENT(hue, HUE);
2391 ENHANCEMENT(sharpness, SHARPNESS);
2392 ENHANCEMENT(brightness, BRIGHTNESS);
2393 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2394 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2395 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2396 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2397 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2398
2399 if (enhancements.dot_crawl) {
2400 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2401 return false;
2402
2403 intel_sdvo_connector->max_dot_crawl = 1;
2404 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2405 intel_sdvo_connector->dot_crawl =
2406 drm_property_create(dev, DRM_MODE_PROP_RANGE, "dot_crawl", 2);
2407 if (!intel_sdvo_connector->dot_crawl)
2408 return false;
2409
2410 intel_sdvo_connector->dot_crawl->values[0] = 0;
2411 intel_sdvo_connector->dot_crawl->values[1] = 1;
2412 drm_connector_attach_property(connector,
2413 intel_sdvo_connector->dot_crawl,
2414 intel_sdvo_connector->cur_dot_crawl);
2415 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2416 }
2417
2418 return true;
2419 }
2420
2421 static bool
intel_sdvo_create_enhance_property_lvds(struct intel_sdvo * intel_sdvo,struct intel_sdvo_connector * intel_sdvo_connector,struct intel_sdvo_enhancements_reply enhancements)2422 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2423 struct intel_sdvo_connector *intel_sdvo_connector,
2424 struct intel_sdvo_enhancements_reply enhancements)
2425 {
2426 struct drm_device *dev = intel_sdvo->base.base.dev;
2427 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2428 uint16_t response, data_value[2];
2429
2430 ENHANCEMENT(brightness, BRIGHTNESS);
2431
2432 return true;
2433 }
2434 #undef ENHANCEMENT
2435
intel_sdvo_create_enhance_property(struct intel_sdvo * intel_sdvo,struct intel_sdvo_connector * intel_sdvo_connector)2436 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2437 struct intel_sdvo_connector *intel_sdvo_connector)
2438 {
2439 union {
2440 struct intel_sdvo_enhancements_reply reply;
2441 uint16_t response;
2442 } enhancements;
2443
2444 BUILD_BUG_ON(sizeof(enhancements) != 2);
2445
2446 enhancements.response = 0;
2447 intel_sdvo_get_value(intel_sdvo,
2448 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2449 &enhancements, sizeof(enhancements));
2450 if (enhancements.response == 0) {
2451 DRM_DEBUG_KMS("No enhancement is supported\n");
2452 return true;
2453 }
2454
2455 if (IS_TV(intel_sdvo_connector))
2456 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2457 else if (IS_LVDS(intel_sdvo_connector))
2458 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2459 else
2460 return true;
2461 }
2462
intel_sdvo_ddc_proxy_xfer(struct i2c_adapter * adapter,struct i2c_msg * msgs,int num)2463 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2464 struct i2c_msg *msgs,
2465 int num)
2466 {
2467 struct intel_sdvo *sdvo = adapter->algo_data;
2468
2469 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2470 return -EIO;
2471
2472 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2473 }
2474
intel_sdvo_ddc_proxy_func(struct i2c_adapter * adapter)2475 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2476 {
2477 struct intel_sdvo *sdvo = adapter->algo_data;
2478 return sdvo->i2c->algo->functionality(sdvo->i2c);
2479 }
2480
2481 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2482 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2483 .functionality = intel_sdvo_ddc_proxy_func
2484 };
2485
2486 static bool
intel_sdvo_init_ddc_proxy(struct intel_sdvo * sdvo,struct drm_device * dev)2487 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2488 struct drm_device *dev)
2489 {
2490 sdvo->ddc.owner = THIS_MODULE;
2491 sdvo->ddc.class = I2C_CLASS_DDC;
2492 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2493 sdvo->ddc.dev.parent = &dev->pdev->dev;
2494 sdvo->ddc.algo_data = sdvo;
2495 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2496
2497 return i2c_add_adapter(&sdvo->ddc) == 0;
2498 }
2499
intel_sdvo_init(struct drm_device * dev,int sdvo_reg)2500 bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2501 {
2502 struct drm_i915_private *dev_priv = dev->dev_private;
2503 struct intel_encoder *intel_encoder;
2504 struct intel_sdvo *intel_sdvo;
2505 int i;
2506
2507 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2508 if (!intel_sdvo)
2509 return false;
2510
2511 intel_sdvo->sdvo_reg = sdvo_reg;
2512 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
2513 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2514 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2515 kfree(intel_sdvo);
2516 return false;
2517 }
2518
2519 /* encoder type will be decided later */
2520 intel_encoder = &intel_sdvo->base;
2521 intel_encoder->type = INTEL_OUTPUT_SDVO;
2522 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2523
2524 /* Read the regs to test if we can talk to the device */
2525 for (i = 0; i < 0x40; i++) {
2526 u8 byte;
2527
2528 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2529 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
2530 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2531 goto err;
2532 }
2533 }
2534
2535 if (IS_SDVOB(sdvo_reg))
2536 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2537 else
2538 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2539
2540 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2541
2542 /* In default case sdvo lvds is false */
2543 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2544 goto err;
2545
2546 /* Set up hotplug command - note paranoia about contents of reply.
2547 * We assume that the hardware is in a sane state, and only touch
2548 * the bits we think we understand.
2549 */
2550 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG,
2551 &intel_sdvo->hotplug_active, 2);
2552 intel_sdvo->hotplug_active[0] &= ~0x3;
2553
2554 if (intel_sdvo_output_setup(intel_sdvo,
2555 intel_sdvo->caps.output_flags) != true) {
2556 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
2557 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2558 goto err;
2559 }
2560
2561 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2562
2563 /* Set the input timing to the screen. Assume always input 0. */
2564 if (!intel_sdvo_set_target_input(intel_sdvo))
2565 goto err;
2566
2567 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2568 &intel_sdvo->pixel_clock_min,
2569 &intel_sdvo->pixel_clock_max))
2570 goto err;
2571
2572 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2573 "clock range %dMHz - %dMHz, "
2574 "input 1: %c, input 2: %c, "
2575 "output 1: %c, output 2: %c\n",
2576 SDVO_NAME(intel_sdvo),
2577 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2578 intel_sdvo->caps.device_rev_id,
2579 intel_sdvo->pixel_clock_min / 1000,
2580 intel_sdvo->pixel_clock_max / 1000,
2581 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2582 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2583 /* check currently supported outputs */
2584 intel_sdvo->caps.output_flags &
2585 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2586 intel_sdvo->caps.output_flags &
2587 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2588 return true;
2589
2590 err:
2591 drm_encoder_cleanup(&intel_encoder->base);
2592 i2c_del_adapter(&intel_sdvo->ddc);
2593 kfree(intel_sdvo);
2594
2595 return false;
2596 }
2597