1 /*
2  * Renesas SuperH DMA Engine support
3  *
4  * Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
5  * Copyright (C) 2009 Renesas Solutions, Inc. All rights reserved.
6  *
7  * This is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  */
13 #ifndef __DMA_SHDMA_H
14 #define __DMA_SHDMA_H
15 
16 #include <linux/dmaengine.h>
17 #include <linux/interrupt.h>
18 #include <linux/list.h>
19 
20 #define SH_DMAC_MAX_CHANNELS 20
21 #define SH_DMA_SLAVE_NUMBER 256
22 #define SH_DMA_TCR_MAX 0x00FFFFFF	/* 16MB */
23 
24 struct device;
25 
26 enum dmae_pm_state {
27 	DMAE_PM_ESTABLISHED,
28 	DMAE_PM_BUSY,
29 	DMAE_PM_PENDING,
30 };
31 
32 struct sh_dmae_chan {
33 	dma_cookie_t completed_cookie;	/* The maximum cookie completed */
34 	spinlock_t desc_lock;		/* Descriptor operation lock */
35 	struct list_head ld_queue;	/* Link descriptors queue */
36 	struct list_head ld_free;	/* Link descriptors free */
37 	struct dma_chan common;		/* DMA common channel */
38 	struct device *dev;		/* Channel device */
39 	struct tasklet_struct tasklet;	/* Tasklet */
40 	int descs_allocated;		/* desc count */
41 	int xmit_shift;			/* log_2(bytes_per_xfer) */
42 	int irq;
43 	int id;				/* Raw id of this channel */
44 	u32 __iomem *base;
45 	char dev_id[16];		/* unique name per DMAC of channel */
46 	int pm_error;
47 	enum dmae_pm_state pm_state;
48 };
49 
50 struct sh_dmae_device {
51 	struct dma_device common;
52 	struct sh_dmae_chan *chan[SH_DMAC_MAX_CHANNELS];
53 	struct sh_dmae_pdata *pdata;
54 	struct list_head node;
55 	u32 __iomem *chan_reg;
56 	u16 __iomem *dmars;
57 	unsigned int chcr_offset;
58 	u32 chcr_ie_bit;
59 };
60 
61 #define to_sh_chan(chan) container_of(chan, struct sh_dmae_chan, common)
62 #define to_sh_desc(lh) container_of(lh, struct sh_desc, node)
63 #define tx_to_sh_desc(tx) container_of(tx, struct sh_desc, async_tx)
64 #define to_sh_dev(chan) container_of(chan->common.device,\
65 				     struct sh_dmae_device, common)
66 
67 #endif	/* __DMA_SHDMA_H */
68