1 /*
2 * Copyright 2004 James Cleverdon, IBM.
3 * Subject to the GNU Public License, v.2
4 *
5 * Flat APIC subarch code.
6 *
7 * Hacked for x86-64 by James Cleverdon from i386 architecture code by
8 * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
9 * James Cleverdon.
10 */
11 #include <linux/errno.h>
12 #include <linux/threads.h>
13 #include <linux/cpumask.h>
14 #include <linux/string.h>
15 #include <linux/kernel.h>
16 #include <linux/ctype.h>
17 #include <linux/init.h>
18 #include <linux/hardirq.h>
19 #include <linux/module.h>
20 #include <asm/smp.h>
21 #include <asm/apic.h>
22 #include <asm/ipi.h>
23
24 #ifdef CONFIG_ACPI
25 #include <acpi/acpi_bus.h>
26 #endif
27
28 static struct apic apic_physflat;
29 static struct apic apic_flat;
30
31 struct apic __read_mostly *apic = &apic_flat;
32 EXPORT_SYMBOL_GPL(apic);
33
flat_acpi_madt_oem_check(char * oem_id,char * oem_table_id)34 static int flat_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
35 {
36 return 1;
37 }
38
flat_target_cpus(void)39 static const struct cpumask *flat_target_cpus(void)
40 {
41 return cpu_online_mask;
42 }
43
flat_vector_allocation_domain(int cpu,struct cpumask * retmask)44 static void flat_vector_allocation_domain(int cpu, struct cpumask *retmask)
45 {
46 /* Careful. Some cpus do not strictly honor the set of cpus
47 * specified in the interrupt destination when using lowest
48 * priority interrupt delivery mode.
49 *
50 * In particular there was a hyperthreading cpu observed to
51 * deliver interrupts to the wrong hyperthread when only one
52 * hyperthread was specified in the interrupt desitination.
53 */
54 cpumask_clear(retmask);
55 cpumask_bits(retmask)[0] = APIC_ALL_CPUS;
56 }
57
58 /*
59 * Set up the logical destination ID.
60 *
61 * Intel recommends to set DFR, LDR and TPR before enabling
62 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
63 * document number 292116). So here it goes...
64 */
flat_init_apic_ldr(void)65 void flat_init_apic_ldr(void)
66 {
67 unsigned long val;
68 unsigned long num, id;
69
70 num = smp_processor_id();
71 id = 1UL << num;
72 apic_write(APIC_DFR, APIC_DFR_FLAT);
73 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
74 val |= SET_APIC_LOGICAL_ID(id);
75 apic_write(APIC_LDR, val);
76 }
77
_flat_send_IPI_mask(unsigned long mask,int vector)78 static inline void _flat_send_IPI_mask(unsigned long mask, int vector)
79 {
80 unsigned long flags;
81
82 local_irq_save(flags);
83 __default_send_IPI_dest_field(mask, vector, apic->dest_logical);
84 local_irq_restore(flags);
85 }
86
flat_send_IPI_mask(const struct cpumask * cpumask,int vector)87 static void flat_send_IPI_mask(const struct cpumask *cpumask, int vector)
88 {
89 unsigned long mask = cpumask_bits(cpumask)[0];
90
91 _flat_send_IPI_mask(mask, vector);
92 }
93
94 static void
flat_send_IPI_mask_allbutself(const struct cpumask * cpumask,int vector)95 flat_send_IPI_mask_allbutself(const struct cpumask *cpumask, int vector)
96 {
97 unsigned long mask = cpumask_bits(cpumask)[0];
98 int cpu = smp_processor_id();
99
100 if (cpu < BITS_PER_LONG)
101 clear_bit(cpu, &mask);
102
103 _flat_send_IPI_mask(mask, vector);
104 }
105
flat_send_IPI_allbutself(int vector)106 static void flat_send_IPI_allbutself(int vector)
107 {
108 int cpu = smp_processor_id();
109 #ifdef CONFIG_HOTPLUG_CPU
110 int hotplug = 1;
111 #else
112 int hotplug = 0;
113 #endif
114 if (hotplug || vector == NMI_VECTOR) {
115 if (!cpumask_equal(cpu_online_mask, cpumask_of(cpu))) {
116 unsigned long mask = cpumask_bits(cpu_online_mask)[0];
117
118 if (cpu < BITS_PER_LONG)
119 clear_bit(cpu, &mask);
120
121 _flat_send_IPI_mask(mask, vector);
122 }
123 } else if (num_online_cpus() > 1) {
124 __default_send_IPI_shortcut(APIC_DEST_ALLBUT,
125 vector, apic->dest_logical);
126 }
127 }
128
flat_send_IPI_all(int vector)129 static void flat_send_IPI_all(int vector)
130 {
131 if (vector == NMI_VECTOR) {
132 flat_send_IPI_mask(cpu_online_mask, vector);
133 } else {
134 __default_send_IPI_shortcut(APIC_DEST_ALLINC,
135 vector, apic->dest_logical);
136 }
137 }
138
flat_get_apic_id(unsigned long x)139 static unsigned int flat_get_apic_id(unsigned long x)
140 {
141 unsigned int id;
142
143 id = (((x)>>24) & 0xFFu);
144
145 return id;
146 }
147
set_apic_id(unsigned int id)148 static unsigned long set_apic_id(unsigned int id)
149 {
150 unsigned long x;
151
152 x = ((id & 0xFFu)<<24);
153 return x;
154 }
155
read_xapic_id(void)156 static unsigned int read_xapic_id(void)
157 {
158 unsigned int id;
159
160 id = flat_get_apic_id(apic_read(APIC_ID));
161 return id;
162 }
163
flat_apic_id_registered(void)164 static int flat_apic_id_registered(void)
165 {
166 return physid_isset(read_xapic_id(), phys_cpu_present_map);
167 }
168
flat_phys_pkg_id(int initial_apic_id,int index_msb)169 static int flat_phys_pkg_id(int initial_apic_id, int index_msb)
170 {
171 return initial_apic_id >> index_msb;
172 }
173
flat_probe(void)174 static int flat_probe(void)
175 {
176 return 1;
177 }
178
179 static struct apic apic_flat = {
180 .name = "flat",
181 .probe = flat_probe,
182 .acpi_madt_oem_check = flat_acpi_madt_oem_check,
183 .apic_id_registered = flat_apic_id_registered,
184
185 .irq_delivery_mode = dest_LowestPrio,
186 .irq_dest_mode = 1, /* logical */
187
188 .target_cpus = flat_target_cpus,
189 .disable_esr = 0,
190 .dest_logical = APIC_DEST_LOGICAL,
191 .check_apicid_used = NULL,
192 .check_apicid_present = NULL,
193
194 .vector_allocation_domain = flat_vector_allocation_domain,
195 .init_apic_ldr = flat_init_apic_ldr,
196
197 .ioapic_phys_id_map = NULL,
198 .setup_apic_routing = NULL,
199 .multi_timer_check = NULL,
200 .cpu_present_to_apicid = default_cpu_present_to_apicid,
201 .apicid_to_cpu_present = NULL,
202 .setup_portio_remap = NULL,
203 .check_phys_apicid_present = default_check_phys_apicid_present,
204 .enable_apic_mode = NULL,
205 .phys_pkg_id = flat_phys_pkg_id,
206 .mps_oem_check = NULL,
207
208 .get_apic_id = flat_get_apic_id,
209 .set_apic_id = set_apic_id,
210 .apic_id_mask = 0xFFu << 24,
211
212 .cpu_mask_to_apicid = default_cpu_mask_to_apicid,
213 .cpu_mask_to_apicid_and = default_cpu_mask_to_apicid_and,
214
215 .send_IPI_mask = flat_send_IPI_mask,
216 .send_IPI_mask_allbutself = flat_send_IPI_mask_allbutself,
217 .send_IPI_allbutself = flat_send_IPI_allbutself,
218 .send_IPI_all = flat_send_IPI_all,
219 .send_IPI_self = apic_send_IPI_self,
220
221 .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
222 .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
223 .wait_for_init_deassert = NULL,
224 .smp_callin_clear_local_apic = NULL,
225 .inquire_remote_apic = default_inquire_remote_apic,
226
227 .read = native_apic_mem_read,
228 .write = native_apic_mem_write,
229 .icr_read = native_apic_icr_read,
230 .icr_write = native_apic_icr_write,
231 .wait_icr_idle = native_apic_wait_icr_idle,
232 .safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
233 };
234
235 /*
236 * Physflat mode is used when there are more than 8 CPUs on a system.
237 * We cannot use logical delivery in this case because the mask
238 * overflows, so use physical mode.
239 */
physflat_acpi_madt_oem_check(char * oem_id,char * oem_table_id)240 static int physflat_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
241 {
242 #ifdef CONFIG_ACPI
243 /*
244 * Quirk: some x86_64 machines can only use physical APIC mode
245 * regardless of how many processors are present (x86_64 ES7000
246 * is an example).
247 */
248 if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
249 (acpi_gbl_FADT.flags & ACPI_FADT_APIC_PHYSICAL)) {
250 printk(KERN_DEBUG "system APIC only can use physical flat");
251 return 1;
252 }
253
254 if (!strncmp(oem_id, "IBM", 3) && !strncmp(oem_table_id, "EXA", 3)) {
255 printk(KERN_DEBUG "IBM Summit detected, will use apic physical");
256 return 1;
257 }
258 #endif
259
260 return 0;
261 }
262
physflat_target_cpus(void)263 static const struct cpumask *physflat_target_cpus(void)
264 {
265 return cpu_online_mask;
266 }
267
physflat_vector_allocation_domain(int cpu,struct cpumask * retmask)268 static void physflat_vector_allocation_domain(int cpu, struct cpumask *retmask)
269 {
270 cpumask_clear(retmask);
271 cpumask_set_cpu(cpu, retmask);
272 }
273
physflat_send_IPI_mask(const struct cpumask * cpumask,int vector)274 static void physflat_send_IPI_mask(const struct cpumask *cpumask, int vector)
275 {
276 default_send_IPI_mask_sequence_phys(cpumask, vector);
277 }
278
physflat_send_IPI_mask_allbutself(const struct cpumask * cpumask,int vector)279 static void physflat_send_IPI_mask_allbutself(const struct cpumask *cpumask,
280 int vector)
281 {
282 default_send_IPI_mask_allbutself_phys(cpumask, vector);
283 }
284
physflat_send_IPI_allbutself(int vector)285 static void physflat_send_IPI_allbutself(int vector)
286 {
287 default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector);
288 }
289
physflat_send_IPI_all(int vector)290 static void physflat_send_IPI_all(int vector)
291 {
292 physflat_send_IPI_mask(cpu_online_mask, vector);
293 }
294
physflat_cpu_mask_to_apicid(const struct cpumask * cpumask)295 static unsigned int physflat_cpu_mask_to_apicid(const struct cpumask *cpumask)
296 {
297 int cpu;
298
299 /*
300 * We're using fixed IRQ delivery, can only return one phys APIC ID.
301 * May as well be the first.
302 */
303 cpu = cpumask_first(cpumask);
304 if ((unsigned)cpu < nr_cpu_ids)
305 return per_cpu(x86_cpu_to_apicid, cpu);
306 else
307 return BAD_APICID;
308 }
309
310 static unsigned int
physflat_cpu_mask_to_apicid_and(const struct cpumask * cpumask,const struct cpumask * andmask)311 physflat_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
312 const struct cpumask *andmask)
313 {
314 int cpu;
315
316 /*
317 * We're using fixed IRQ delivery, can only return one phys APIC ID.
318 * May as well be the first.
319 */
320 for_each_cpu_and(cpu, cpumask, andmask) {
321 if (cpumask_test_cpu(cpu, cpu_online_mask))
322 break;
323 }
324 return per_cpu(x86_cpu_to_apicid, cpu);
325 }
326
physflat_probe(void)327 static int physflat_probe(void)
328 {
329 if (apic == &apic_physflat || num_possible_cpus() > 8)
330 return 1;
331
332 return 0;
333 }
334
335 static struct apic apic_physflat = {
336
337 .name = "physical flat",
338 .probe = physflat_probe,
339 .acpi_madt_oem_check = physflat_acpi_madt_oem_check,
340 .apic_id_registered = flat_apic_id_registered,
341
342 .irq_delivery_mode = dest_Fixed,
343 .irq_dest_mode = 0, /* physical */
344
345 .target_cpus = physflat_target_cpus,
346 .disable_esr = 0,
347 .dest_logical = 0,
348 .check_apicid_used = NULL,
349 .check_apicid_present = NULL,
350
351 .vector_allocation_domain = physflat_vector_allocation_domain,
352 /* not needed, but shouldn't hurt: */
353 .init_apic_ldr = flat_init_apic_ldr,
354
355 .ioapic_phys_id_map = NULL,
356 .setup_apic_routing = NULL,
357 .multi_timer_check = NULL,
358 .cpu_present_to_apicid = default_cpu_present_to_apicid,
359 .apicid_to_cpu_present = NULL,
360 .setup_portio_remap = NULL,
361 .check_phys_apicid_present = default_check_phys_apicid_present,
362 .enable_apic_mode = NULL,
363 .phys_pkg_id = flat_phys_pkg_id,
364 .mps_oem_check = NULL,
365
366 .get_apic_id = flat_get_apic_id,
367 .set_apic_id = set_apic_id,
368 .apic_id_mask = 0xFFu << 24,
369
370 .cpu_mask_to_apicid = physflat_cpu_mask_to_apicid,
371 .cpu_mask_to_apicid_and = physflat_cpu_mask_to_apicid_and,
372
373 .send_IPI_mask = physflat_send_IPI_mask,
374 .send_IPI_mask_allbutself = physflat_send_IPI_mask_allbutself,
375 .send_IPI_allbutself = physflat_send_IPI_allbutself,
376 .send_IPI_all = physflat_send_IPI_all,
377 .send_IPI_self = apic_send_IPI_self,
378
379 .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
380 .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
381 .wait_for_init_deassert = NULL,
382 .smp_callin_clear_local_apic = NULL,
383 .inquire_remote_apic = default_inquire_remote_apic,
384
385 .read = native_apic_mem_read,
386 .write = native_apic_mem_write,
387 .icr_read = native_apic_icr_read,
388 .icr_write = native_apic_icr_write,
389 .wait_icr_idle = native_apic_wait_icr_idle,
390 .safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
391 };
392
393 /*
394 * We need to check for physflat first, so this order is important.
395 */
396 apic_drivers(apic_physflat, apic_flat);
397