1 /*
2 * Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
3 * Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
4 *
5 * Description:
6 * Architecture- / platform-specific boot-time initialization code for
7 * the IBM iSeries LPAR. Adapted from original code by Grant Erickson and
8 * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
9 * <dan@net4x.com>.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
15 */
16
17 #undef DEBUG
18
19 #include <linux/init.h>
20 #include <linux/threads.h>
21 #include <linux/smp.h>
22 #include <linux/param.h>
23 #include <linux/string.h>
24 #include <linux/export.h>
25 #include <linux/seq_file.h>
26 #include <linux/kdev_t.h>
27 #include <linux/kexec.h>
28 #include <linux/major.h>
29 #include <linux/root_dev.h>
30 #include <linux/kernel.h>
31 #include <linux/hrtimer.h>
32 #include <linux/tick.h>
33
34 #include <asm/processor.h>
35 #include <asm/machdep.h>
36 #include <asm/page.h>
37 #include <asm/mmu.h>
38 #include <asm/pgtable.h>
39 #include <asm/mmu_context.h>
40 #include <asm/cputable.h>
41 #include <asm/sections.h>
42 #include <asm/iommu.h>
43 #include <asm/firmware.h>
44 #include <asm/system.h>
45 #include <asm/time.h>
46 #include <asm/paca.h>
47 #include <asm/cache.h>
48 #include <asm/abs_addr.h>
49 #include <asm/iseries/hv_lp_config.h>
50 #include <asm/iseries/hv_call_event.h>
51 #include <asm/iseries/hv_call_xm.h>
52 #include <asm/iseries/it_lp_queue.h>
53 #include <asm/iseries/mf.h>
54 #include <asm/iseries/hv_lp_event.h>
55 #include <asm/iseries/lpar_map.h>
56 #include <asm/udbg.h>
57 #include <asm/irq.h>
58
59 #include "naca.h"
60 #include "setup.h"
61 #include "irq.h"
62 #include "vpd_areas.h"
63 #include "processor_vpd.h"
64 #include "it_lp_naca.h"
65 #include "main_store.h"
66 #include "call_sm.h"
67 #include "call_hpt.h"
68 #include "pci.h"
69
70 #ifdef DEBUG
71 #define DBG(fmt...) udbg_printf(fmt)
72 #else
73 #define DBG(fmt...)
74 #endif
75
76 /* Function Prototypes */
77 static unsigned long build_iSeries_Memory_Map(void);
78 static void iseries_shared_idle(void);
79 static void iseries_dedicated_idle(void);
80
81
82 struct MemoryBlock {
83 unsigned long absStart;
84 unsigned long absEnd;
85 unsigned long logicalStart;
86 unsigned long logicalEnd;
87 };
88
89 /*
90 * Process the main store vpd to determine where the holes in memory are
91 * and return the number of physical blocks and fill in the array of
92 * block data.
93 */
iSeries_process_Condor_mainstore_vpd(struct MemoryBlock * mb_array,unsigned long max_entries)94 static unsigned long iSeries_process_Condor_mainstore_vpd(
95 struct MemoryBlock *mb_array, unsigned long max_entries)
96 {
97 unsigned long holeFirstChunk, holeSizeChunks;
98 unsigned long numMemoryBlocks = 1;
99 struct IoHriMainStoreSegment4 *msVpd =
100 (struct IoHriMainStoreSegment4 *)xMsVpd;
101 unsigned long holeStart = msVpd->nonInterleavedBlocksStartAdr;
102 unsigned long holeEnd = msVpd->nonInterleavedBlocksEndAdr;
103 unsigned long holeSize = holeEnd - holeStart;
104
105 printk("Mainstore_VPD: Condor\n");
106 /*
107 * Determine if absolute memory has any
108 * holes so that we can interpret the
109 * access map we get back from the hypervisor
110 * correctly.
111 */
112 mb_array[0].logicalStart = 0;
113 mb_array[0].logicalEnd = 0x100000000UL;
114 mb_array[0].absStart = 0;
115 mb_array[0].absEnd = 0x100000000UL;
116
117 if (holeSize) {
118 numMemoryBlocks = 2;
119 holeStart = holeStart & 0x000fffffffffffffUL;
120 holeStart = addr_to_chunk(holeStart);
121 holeFirstChunk = holeStart;
122 holeSize = addr_to_chunk(holeSize);
123 holeSizeChunks = holeSize;
124 printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n",
125 holeFirstChunk, holeSizeChunks );
126 mb_array[0].logicalEnd = holeFirstChunk;
127 mb_array[0].absEnd = holeFirstChunk;
128 mb_array[1].logicalStart = holeFirstChunk;
129 mb_array[1].logicalEnd = 0x100000000UL - holeSizeChunks;
130 mb_array[1].absStart = holeFirstChunk + holeSizeChunks;
131 mb_array[1].absEnd = 0x100000000UL;
132 }
133 return numMemoryBlocks;
134 }
135
136 #define MaxSegmentAreas 32
137 #define MaxSegmentAdrRangeBlocks 128
138 #define MaxAreaRangeBlocks 4
139
iSeries_process_Regatta_mainstore_vpd(struct MemoryBlock * mb_array,unsigned long max_entries)140 static unsigned long iSeries_process_Regatta_mainstore_vpd(
141 struct MemoryBlock *mb_array, unsigned long max_entries)
142 {
143 struct IoHriMainStoreSegment5 *msVpdP =
144 (struct IoHriMainStoreSegment5 *)xMsVpd;
145 unsigned long numSegmentBlocks = 0;
146 u32 existsBits = msVpdP->msAreaExists;
147 unsigned long area_num;
148
149 printk("Mainstore_VPD: Regatta\n");
150
151 for (area_num = 0; area_num < MaxSegmentAreas; ++area_num ) {
152 unsigned long numAreaBlocks;
153 struct IoHriMainStoreArea4 *currentArea;
154
155 if (existsBits & 0x80000000) {
156 unsigned long block_num;
157
158 currentArea = &msVpdP->msAreaArray[area_num];
159 numAreaBlocks = currentArea->numAdrRangeBlocks;
160 printk("ms_vpd: processing area %2ld blocks=%ld",
161 area_num, numAreaBlocks);
162 for (block_num = 0; block_num < numAreaBlocks;
163 ++block_num ) {
164 /* Process an address range block */
165 struct MemoryBlock tempBlock;
166 unsigned long i;
167
168 tempBlock.absStart =
169 (unsigned long)currentArea->xAdrRangeBlock[block_num].blockStart;
170 tempBlock.absEnd =
171 (unsigned long)currentArea->xAdrRangeBlock[block_num].blockEnd;
172 tempBlock.logicalStart = 0;
173 tempBlock.logicalEnd = 0;
174 printk("\n block %ld absStart=%016lx absEnd=%016lx",
175 block_num, tempBlock.absStart,
176 tempBlock.absEnd);
177
178 for (i = 0; i < numSegmentBlocks; ++i) {
179 if (mb_array[i].absStart ==
180 tempBlock.absStart)
181 break;
182 }
183 if (i == numSegmentBlocks) {
184 if (numSegmentBlocks == max_entries)
185 panic("iSeries_process_mainstore_vpd: too many memory blocks");
186 mb_array[numSegmentBlocks] = tempBlock;
187 ++numSegmentBlocks;
188 } else
189 printk(" (duplicate)");
190 }
191 printk("\n");
192 }
193 existsBits <<= 1;
194 }
195 /* Now sort the blocks found into ascending sequence */
196 if (numSegmentBlocks > 1) {
197 unsigned long m, n;
198
199 for (m = 0; m < numSegmentBlocks - 1; ++m) {
200 for (n = numSegmentBlocks - 1; m < n; --n) {
201 if (mb_array[n].absStart <
202 mb_array[n-1].absStart) {
203 struct MemoryBlock tempBlock;
204
205 tempBlock = mb_array[n];
206 mb_array[n] = mb_array[n-1];
207 mb_array[n-1] = tempBlock;
208 }
209 }
210 }
211 }
212 /*
213 * Assign "logical" addresses to each block. These
214 * addresses correspond to the hypervisor "bitmap" space.
215 * Convert all addresses into units of 256K chunks.
216 */
217 {
218 unsigned long i, nextBitmapAddress;
219
220 printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks);
221 nextBitmapAddress = 0;
222 for (i = 0; i < numSegmentBlocks; ++i) {
223 unsigned long length = mb_array[i].absEnd -
224 mb_array[i].absStart;
225
226 mb_array[i].logicalStart = nextBitmapAddress;
227 mb_array[i].logicalEnd = nextBitmapAddress + length;
228 nextBitmapAddress += length;
229 printk(" Bitmap range: %016lx - %016lx\n"
230 " Absolute range: %016lx - %016lx\n",
231 mb_array[i].logicalStart,
232 mb_array[i].logicalEnd,
233 mb_array[i].absStart, mb_array[i].absEnd);
234 mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart &
235 0x000fffffffffffffUL);
236 mb_array[i].absEnd = addr_to_chunk(mb_array[i].absEnd &
237 0x000fffffffffffffUL);
238 mb_array[i].logicalStart =
239 addr_to_chunk(mb_array[i].logicalStart);
240 mb_array[i].logicalEnd = addr_to_chunk(mb_array[i].logicalEnd);
241 }
242 }
243
244 return numSegmentBlocks;
245 }
246
iSeries_process_mainstore_vpd(struct MemoryBlock * mb_array,unsigned long max_entries)247 static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array,
248 unsigned long max_entries)
249 {
250 unsigned long i;
251 unsigned long mem_blocks = 0;
252
253 if (mmu_has_feature(MMU_FTR_SLB))
254 mem_blocks = iSeries_process_Regatta_mainstore_vpd(mb_array,
255 max_entries);
256 else
257 mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array,
258 max_entries);
259
260 printk("Mainstore_VPD: numMemoryBlocks = %ld\n", mem_blocks);
261 for (i = 0; i < mem_blocks; ++i) {
262 printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n"
263 " abs chunks %016lx - %016lx\n",
264 i, mb_array[i].logicalStart, mb_array[i].logicalEnd,
265 mb_array[i].absStart, mb_array[i].absEnd);
266 }
267 return mem_blocks;
268 }
269
iSeries_get_cmdline(void)270 static void __init iSeries_get_cmdline(void)
271 {
272 char *p, *q;
273
274 /* copy the command line parameter from the primary VSP */
275 HvCallEvent_dmaToSp(cmd_line, 2 * 64* 1024, 256,
276 HvLpDma_Direction_RemoteToLocal);
277
278 p = cmd_line;
279 q = cmd_line + 255;
280 while(p < q) {
281 if (!*p || *p == '\n')
282 break;
283 ++p;
284 }
285 *p = 0;
286 }
287
iSeries_init_early(void)288 static void __init iSeries_init_early(void)
289 {
290 DBG(" -> iSeries_init_early()\n");
291
292 /* Snapshot the timebase, for use in later recalibration */
293 iSeries_time_init_early();
294
295 /*
296 * Initialize the DMA/TCE management
297 */
298 iommu_init_early_iSeries();
299
300 /* Initialize machine-dependency vectors */
301 #ifdef CONFIG_SMP
302 smp_init_iSeries();
303 #endif
304
305 /* Associate Lp Event Queue 0 with processor 0 */
306 HvCallEvent_setLpEventQueueInterruptProc(0, 0);
307
308 mf_init();
309
310 DBG(" <- iSeries_init_early()\n");
311 }
312
313 struct mschunks_map mschunks_map = {
314 /* XXX We don't use these, but Piranha might need them. */
315 .chunk_size = MSCHUNKS_CHUNK_SIZE,
316 .chunk_shift = MSCHUNKS_CHUNK_SHIFT,
317 .chunk_mask = MSCHUNKS_OFFSET_MASK,
318 };
319 EXPORT_SYMBOL(mschunks_map);
320
mschunks_alloc(unsigned long num_chunks)321 static void mschunks_alloc(unsigned long num_chunks)
322 {
323 klimit = _ALIGN(klimit, sizeof(u32));
324 mschunks_map.mapping = (u32 *)klimit;
325 klimit += num_chunks * sizeof(u32);
326 mschunks_map.num_chunks = num_chunks;
327 }
328
329 /*
330 * The iSeries may have very large memories ( > 128 GB ) and a partition
331 * may get memory in "chunks" that may be anywhere in the 2**52 real
332 * address space. The chunks are 256K in size. To map this to the
333 * memory model Linux expects, the AS/400 specific code builds a
334 * translation table to translate what Linux thinks are "physical"
335 * addresses to the actual real addresses. This allows us to make
336 * it appear to Linux that we have contiguous memory starting at
337 * physical address zero while in fact this could be far from the truth.
338 * To avoid confusion, I'll let the words physical and/or real address
339 * apply to the Linux addresses while I'll use "absolute address" to
340 * refer to the actual hardware real address.
341 *
342 * build_iSeries_Memory_Map gets information from the Hypervisor and
343 * looks at the Main Store VPD to determine the absolute addresses
344 * of the memory that has been assigned to our partition and builds
345 * a table used to translate Linux's physical addresses to these
346 * absolute addresses. Absolute addresses are needed when
347 * communicating with the hypervisor (e.g. to build HPT entries)
348 *
349 * Returns the physical memory size
350 */
351
build_iSeries_Memory_Map(void)352 static unsigned long __init build_iSeries_Memory_Map(void)
353 {
354 u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize;
355 u32 nextPhysChunk;
356 u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages;
357 u32 totalChunks,moreChunks;
358 u32 currChunk, thisChunk, absChunk;
359 u32 currDword;
360 u32 chunkBit;
361 u64 map;
362 struct MemoryBlock mb[32];
363 unsigned long numMemoryBlocks, curBlock;
364
365 /* Chunk size on iSeries is 256K bytes */
366 totalChunks = (u32)HvLpConfig_getMsChunks();
367 mschunks_alloc(totalChunks);
368
369 /*
370 * Get absolute address of our load area
371 * and map it to physical address 0
372 * This guarantees that the loadarea ends up at physical 0
373 * otherwise, it might not be returned by PLIC as the first
374 * chunks
375 */
376
377 loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr);
378 loadAreaSize = itLpNaca.xLoadAreaChunks;
379
380 /*
381 * Only add the pages already mapped here.
382 * Otherwise we might add the hpt pages
383 * The rest of the pages of the load area
384 * aren't in the HPT yet and can still
385 * be assigned an arbitrary physical address
386 */
387 if ((loadAreaSize * 64) > HvPagesToMap)
388 loadAreaSize = HvPagesToMap / 64;
389
390 loadAreaLastChunk = loadAreaFirstChunk + loadAreaSize - 1;
391
392 /*
393 * TODO Do we need to do something if the HPT is in the 64MB load area?
394 * This would be required if the itLpNaca.xLoadAreaChunks includes
395 * the HPT size
396 */
397
398 printk("Mapping load area - physical addr = 0000000000000000\n"
399 " absolute addr = %016lx\n",
400 chunk_to_addr(loadAreaFirstChunk));
401 printk("Load area size %dK\n", loadAreaSize * 256);
402
403 for (nextPhysChunk = 0; nextPhysChunk < loadAreaSize; ++nextPhysChunk)
404 mschunks_map.mapping[nextPhysChunk] =
405 loadAreaFirstChunk + nextPhysChunk;
406
407 /*
408 * Get absolute address of our HPT and remember it so
409 * we won't map it to any physical address
410 */
411 hptFirstChunk = (u32)addr_to_chunk(HvCallHpt_getHptAddress());
412 hptSizePages = (u32)HvCallHpt_getHptPages();
413 hptSizeChunks = hptSizePages >>
414 (MSCHUNKS_CHUNK_SHIFT - HW_PAGE_SHIFT);
415 hptLastChunk = hptFirstChunk + hptSizeChunks - 1;
416
417 printk("HPT absolute addr = %016lx, size = %dK\n",
418 chunk_to_addr(hptFirstChunk), hptSizeChunks * 256);
419
420 /*
421 * Determine if absolute memory has any
422 * holes so that we can interpret the
423 * access map we get back from the hypervisor
424 * correctly.
425 */
426 numMemoryBlocks = iSeries_process_mainstore_vpd(mb, 32);
427
428 /*
429 * Process the main store access map from the hypervisor
430 * to build up our physical -> absolute translation table
431 */
432 curBlock = 0;
433 currChunk = 0;
434 currDword = 0;
435 moreChunks = totalChunks;
436
437 while (moreChunks) {
438 map = HvCallSm_get64BitsOfAccessMap(itLpNaca.xLpIndex,
439 currDword);
440 thisChunk = currChunk;
441 while (map) {
442 chunkBit = map >> 63;
443 map <<= 1;
444 if (chunkBit) {
445 --moreChunks;
446 while (thisChunk >= mb[curBlock].logicalEnd) {
447 ++curBlock;
448 if (curBlock >= numMemoryBlocks)
449 panic("out of memory blocks");
450 }
451 if (thisChunk < mb[curBlock].logicalStart)
452 panic("memory block error");
453
454 absChunk = mb[curBlock].absStart +
455 (thisChunk - mb[curBlock].logicalStart);
456 if (((absChunk < hptFirstChunk) ||
457 (absChunk > hptLastChunk)) &&
458 ((absChunk < loadAreaFirstChunk) ||
459 (absChunk > loadAreaLastChunk))) {
460 mschunks_map.mapping[nextPhysChunk] =
461 absChunk;
462 ++nextPhysChunk;
463 }
464 }
465 ++thisChunk;
466 }
467 ++currDword;
468 currChunk += 64;
469 }
470
471 /*
472 * main store size (in chunks) is
473 * totalChunks - hptSizeChunks
474 * which should be equal to
475 * nextPhysChunk
476 */
477 return chunk_to_addr(nextPhysChunk);
478 }
479
480 /*
481 * Document me.
482 */
iSeries_setup_arch(void)483 static void __init iSeries_setup_arch(void)
484 {
485 if (get_lppaca()->shared_proc) {
486 ppc_md.idle_loop = iseries_shared_idle;
487 printk(KERN_DEBUG "Using shared processor idle loop\n");
488 } else {
489 ppc_md.idle_loop = iseries_dedicated_idle;
490 printk(KERN_DEBUG "Using dedicated idle loop\n");
491 }
492
493 /* Setup the Lp Event Queue */
494 setup_hvlpevent_queue();
495
496 printk("Max logical processors = %d\n",
497 itVpdAreas.xSlicMaxLogicalProcs);
498 printk("Max physical processors = %d\n",
499 itVpdAreas.xSlicMaxPhysicalProcs);
500
501 iSeries_pcibios_init();
502 }
503
iSeries_show_cpuinfo(struct seq_file * m)504 static void iSeries_show_cpuinfo(struct seq_file *m)
505 {
506 seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n");
507 }
508
iSeries_progress(char * st,unsigned short code)509 static void __init iSeries_progress(char * st, unsigned short code)
510 {
511 printk("Progress: [%04x] - %s\n", (unsigned)code, st);
512 mf_display_progress(code);
513 }
514
iSeries_fixup_klimit(void)515 static void __init iSeries_fixup_klimit(void)
516 {
517 /*
518 * Change klimit to take into account any ram disk
519 * that may be included
520 */
521 if (naca.xRamDisk)
522 klimit = KERNELBASE + (u64)naca.xRamDisk +
523 (naca.xRamDiskSize * HW_PAGE_SIZE);
524 }
525
iSeries_src_init(void)526 static int __init iSeries_src_init(void)
527 {
528 /* clear the progress line */
529 if (firmware_has_feature(FW_FEATURE_ISERIES))
530 ppc_md.progress(" ", 0xffff);
531 return 0;
532 }
533
534 late_initcall(iSeries_src_init);
535
process_iSeries_events(void)536 static inline void process_iSeries_events(void)
537 {
538 asm volatile ("li 0,0x5555; sc" : : : "r0", "r3");
539 }
540
yield_shared_processor(void)541 static void yield_shared_processor(void)
542 {
543 unsigned long tb;
544
545 HvCall_setEnabledInterrupts(HvCall_MaskIPI |
546 HvCall_MaskLpEvent |
547 HvCall_MaskLpProd |
548 HvCall_MaskTimeout);
549
550 tb = get_tb();
551 /* Compute future tb value when yield should expire */
552 HvCall_yieldProcessor(HvCall_YieldTimed, tb+tb_ticks_per_jiffy);
553
554 /*
555 * The decrementer stops during the yield. Force a fake decrementer
556 * here and let the timer_interrupt code sort out the actual time.
557 */
558 get_lppaca()->int_dword.fields.decr_int = 1;
559 ppc64_runlatch_on();
560 process_iSeries_events();
561 }
562
iseries_shared_idle(void)563 static void iseries_shared_idle(void)
564 {
565 while (1) {
566 tick_nohz_idle_enter();
567 rcu_idle_enter();
568 while (!need_resched() && !hvlpevent_is_pending()) {
569 local_irq_disable();
570 ppc64_runlatch_off();
571
572 /* Recheck with irqs off */
573 if (!need_resched() && !hvlpevent_is_pending())
574 yield_shared_processor();
575
576 HMT_medium();
577 local_irq_enable();
578 }
579
580 ppc64_runlatch_on();
581 rcu_idle_exit();
582 tick_nohz_idle_exit();
583
584 if (hvlpevent_is_pending())
585 process_iSeries_events();
586
587 preempt_enable_no_resched();
588 schedule();
589 preempt_disable();
590 }
591 }
592
iseries_dedicated_idle(void)593 static void iseries_dedicated_idle(void)
594 {
595 set_thread_flag(TIF_POLLING_NRFLAG);
596
597 while (1) {
598 tick_nohz_idle_enter();
599 rcu_idle_enter();
600 if (!need_resched()) {
601 while (!need_resched()) {
602 ppc64_runlatch_off();
603 HMT_low();
604
605 if (hvlpevent_is_pending()) {
606 HMT_medium();
607 ppc64_runlatch_on();
608 process_iSeries_events();
609 }
610 }
611
612 HMT_medium();
613 }
614
615 ppc64_runlatch_on();
616 rcu_idle_exit();
617 tick_nohz_idle_exit();
618 preempt_enable_no_resched();
619 schedule();
620 preempt_disable();
621 }
622 }
623
iseries_ioremap(phys_addr_t address,unsigned long size,unsigned long flags,void * caller)624 static void __iomem *iseries_ioremap(phys_addr_t address, unsigned long size,
625 unsigned long flags, void *caller)
626 {
627 return (void __iomem *)address;
628 }
629
iseries_iounmap(volatile void __iomem * token)630 static void iseries_iounmap(volatile void __iomem *token)
631 {
632 }
633
iseries_probe(void)634 static int __init iseries_probe(void)
635 {
636 unsigned long root = of_get_flat_dt_root();
637 if (!of_flat_dt_is_compatible(root, "IBM,iSeries"))
638 return 0;
639
640 hpte_init_iSeries();
641 /* iSeries does not support 16M pages */
642 cur_cpu_spec->mmu_features &= ~MMU_FTR_16M_PAGE;
643
644 return 1;
645 }
646
647 #ifdef CONFIG_KEXEC
iseries_kexec_prepare(struct kimage * image)648 static int iseries_kexec_prepare(struct kimage *image)
649 {
650 return -ENOSYS;
651 }
652 #endif
653
define_machine(iseries)654 define_machine(iseries) {
655 .name = "iSeries",
656 .setup_arch = iSeries_setup_arch,
657 .show_cpuinfo = iSeries_show_cpuinfo,
658 .init_IRQ = iSeries_init_IRQ,
659 .get_irq = iSeries_get_irq,
660 .init_early = iSeries_init_early,
661 .pcibios_fixup = iSeries_pci_final_fixup,
662 .pcibios_fixup_resources= iSeries_pcibios_fixup_resources,
663 .restart = mf_reboot,
664 .power_off = mf_power_off,
665 .halt = mf_power_off,
666 .get_boot_time = iSeries_get_boot_time,
667 .set_rtc_time = iSeries_set_rtc_time,
668 .get_rtc_time = iSeries_get_rtc_time,
669 .calibrate_decr = generic_calibrate_decr,
670 .progress = iSeries_progress,
671 .probe = iseries_probe,
672 .ioremap = iseries_ioremap,
673 .iounmap = iseries_iounmap,
674 #ifdef CONFIG_KEXEC
675 .machine_kexec_prepare = iseries_kexec_prepare,
676 #endif
677 /* XXX Implement enable_pmcs for iSeries */
678 };
679
iSeries_early_setup(void)680 void * __init iSeries_early_setup(void)
681 {
682 unsigned long phys_mem_size;
683
684 /* Identify CPU type. This is done again by the common code later
685 * on but calling this function multiple times is fine.
686 */
687 identify_cpu(0, mfspr(SPRN_PVR));
688 initialise_paca(&boot_paca, 0);
689
690 powerpc_firmware_features |= FW_FEATURE_ISERIES;
691 powerpc_firmware_features |= FW_FEATURE_LPAR;
692
693 #ifdef CONFIG_SMP
694 /* On iSeries we know we can never have more than 64 cpus */
695 nr_cpu_ids = max(nr_cpu_ids, 64);
696 #endif
697
698 iSeries_fixup_klimit();
699
700 /*
701 * Initialize the table which translate Linux physical addresses to
702 * AS/400 absolute addresses
703 */
704 phys_mem_size = build_iSeries_Memory_Map();
705
706 iSeries_get_cmdline();
707
708 return (void *) __pa(build_flat_dt(phys_mem_size));
709 }
710
hvputc(char c)711 static void hvputc(char c)
712 {
713 if (c == '\n')
714 hvputc('\r');
715
716 HvCall_writeLogBuffer(&c, 1);
717 }
718
udbg_init_iseries(void)719 void __init udbg_init_iseries(void)
720 {
721 udbg_putc = hvputc;
722 }
723