1 /*
2 * Copyright (C) Freescale Semicondutor, Inc. 2006. All rights reserved.
3 *
4 * Description:
5 * MPC832xE MDS board specific routines.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13 #include <linux/stddef.h>
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/errno.h>
17 #include <linux/reboot.h>
18 #include <linux/pci.h>
19 #include <linux/kdev_t.h>
20 #include <linux/major.h>
21 #include <linux/console.h>
22 #include <linux/delay.h>
23 #include <linux/seq_file.h>
24 #include <linux/root_dev.h>
25 #include <linux/initrd.h>
26 #include <linux/of_platform.h>
27 #include <linux/of_device.h>
28
29 #include <asm/system.h>
30 #include <linux/atomic.h>
31 #include <asm/time.h>
32 #include <asm/io.h>
33 #include <asm/machdep.h>
34 #include <asm/ipic.h>
35 #include <asm/irq.h>
36 #include <asm/prom.h>
37 #include <asm/udbg.h>
38 #include <sysdev/fsl_soc.h>
39 #include <sysdev/fsl_pci.h>
40 #include <asm/qe.h>
41 #include <asm/qe_ic.h>
42
43 #include "mpc83xx.h"
44
45 #undef DEBUG
46 #ifdef DEBUG
47 #define DBG(fmt...) udbg_printf(fmt)
48 #else
49 #define DBG(fmt...)
50 #endif
51
52 /* ************************************************************************
53 *
54 * Setup the architecture
55 *
56 */
mpc832x_sys_setup_arch(void)57 static void __init mpc832x_sys_setup_arch(void)
58 {
59 struct device_node *np;
60 u8 __iomem *bcsr_regs = NULL;
61
62 if (ppc_md.progress)
63 ppc_md.progress("mpc832x_sys_setup_arch()", 0);
64
65 /* Map BCSR area */
66 np = of_find_node_by_name(NULL, "bcsr");
67 if (np) {
68 struct resource res;
69
70 of_address_to_resource(np, 0, &res);
71 bcsr_regs = ioremap(res.start, resource_size(&res));
72 of_node_put(np);
73 }
74
75 mpc83xx_setup_pci();
76
77 #ifdef CONFIG_QUICC_ENGINE
78 qe_reset();
79
80 if ((np = of_find_node_by_name(NULL, "par_io")) != NULL) {
81 par_io_init(np);
82 of_node_put(np);
83
84 for (np = NULL; (np = of_find_node_by_name(np, "ucc")) != NULL;)
85 par_io_of_config(np);
86 }
87
88 if ((np = of_find_compatible_node(NULL, "network", "ucc_geth"))
89 != NULL){
90 /* Reset the Ethernet PHYs */
91 #define BCSR8_FETH_RST 0x50
92 clrbits8(&bcsr_regs[8], BCSR8_FETH_RST);
93 udelay(1000);
94 setbits8(&bcsr_regs[8], BCSR8_FETH_RST);
95 iounmap(bcsr_regs);
96 of_node_put(np);
97 }
98 #endif /* CONFIG_QUICC_ENGINE */
99 }
100
101 machine_device_initcall(mpc832x_mds, mpc83xx_declare_of_platform_devices);
102
103 /*
104 * Called very early, MMU is off, device-tree isn't unflattened
105 */
mpc832x_sys_probe(void)106 static int __init mpc832x_sys_probe(void)
107 {
108 unsigned long root = of_get_flat_dt_root();
109
110 return of_flat_dt_is_compatible(root, "MPC832xMDS");
111 }
112
define_machine(mpc832x_mds)113 define_machine(mpc832x_mds) {
114 .name = "MPC832x MDS",
115 .probe = mpc832x_sys_probe,
116 .setup_arch = mpc832x_sys_setup_arch,
117 .init_IRQ = mpc83xx_ipic_and_qe_init_IRQ,
118 .get_irq = ipic_get_irq,
119 .restart = mpc83xx_restart,
120 .time_init = mpc83xx_time_init,
121 .calibrate_decr = generic_calibrate_decr,
122 .progress = udbg_progress,
123 };
124