1/* 2 * P1023 RDS Device Tree Source 3 * 4 * Copyright 2010-2011 Freescale Semiconductor Inc. 5 * 6 * Author: Roy Zang <tie-fei.zang@freescale.com> 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions are met: 10 * * Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * * Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * * Neither the name of Freescale Semiconductor nor the 16 * names of its contributors may be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 19 * 20 * ALTERNATIVELY, this software may be distributed under the terms of the 21 * GNU General Public License ("GPL") as published by the Free Software 22 * Foundation, either version 2 of that License or (at your option) any 23 * later version. 24 * 25 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 26 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 27 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 28 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 29 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 31 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 32 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 34 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37/include/ "fsl/p1023si-pre.dtsi" 38 39/ { 40 model = "fsl,P1023"; 41 compatible = "fsl,P1023RDS"; 42 #address-cells = <2>; 43 #size-cells = <2>; 44 interrupt-parent = <&mpic>; 45 46 memory { 47 device_type = "memory"; 48 }; 49 50 soc: soc@ff600000 { 51 ranges = <0x0 0x0 0xff600000 0x200000>; 52 53 i2c@3000 { 54 rtc@68 { 55 compatible = "dallas,ds1374"; 56 reg = <0x68>; 57 }; 58 }; 59 60 spi@7000 { 61 fsl_dataflash@0 { 62 #address-cells = <1>; 63 #size-cells = <1>; 64 compatible = "atmel,at45db081d"; 65 reg = <0>; 66 spi-max-frequency = <40000000>; /* input clock */ 67 partition@u-boot { 68 /* 512KB for u-boot Bootloader Image */ 69 label = "u-boot-spi"; 70 reg = <0x00000000 0x00080000>; 71 read-only; 72 }; 73 partition@dtb { 74 /* 512KB for DTB Image */ 75 label = "dtb-spi"; 76 reg = <0x00080000 0x00080000>; 77 read-only; 78 }; 79 }; 80 }; 81 82 usb@22000 { 83 dr_mode = "host"; 84 phy_type = "ulpi"; 85 }; 86 }; 87 88 lbc: localbus@ff605000 { 89 reg = <0 0xff605000 0 0x1000>; 90 91 /* NOR Flash, BCSR */ 92 ranges = <0x0 0x0 0x0 0xee000000 0x02000000 93 0x1 0x0 0x0 0xe0000000 0x00008000>; 94 95 nor@0,0 { 96 #address-cells = <1>; 97 #size-cells = <1>; 98 compatible = "cfi-flash"; 99 reg = <0x0 0x0 0x02000000>; 100 bank-width = <2>; 101 device-width = <1>; 102 partition@0 { 103 label = "ramdisk"; 104 reg = <0x00000000 0x01c00000>; 105 }; 106 partition@1c00000 { 107 label = "kernel"; 108 reg = <0x01c00000 0x002e0000>; 109 }; 110 partiton@1ee0000 { 111 label = "dtb"; 112 reg = <0x01ee0000 0x00020000>; 113 }; 114 partition@1f00000 { 115 label = "firmware"; 116 reg = <0x01f00000 0x00080000>; 117 read-only; 118 }; 119 partition@1f80000 { 120 label = "u-boot"; 121 reg = <0x01f80000 0x00080000>; 122 read-only; 123 }; 124 }; 125 126 fpga@1,0 { 127 #address-cells = <1>; 128 #size-cells = <1>; 129 compatible = "fsl,p1023rds-fpga"; 130 reg = <1 0 0x8000>; 131 ranges = <0 1 0 0x8000>; 132 133 bcsr@20 { 134 compatible = "fsl,p1023rds-bcsr"; 135 reg = <0x20 0x20>; 136 }; 137 }; 138 }; 139 140 pci0: pcie@ff60a000 { 141 reg = <0 0xff60a000 0 0x1000>; 142 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 143 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>; 144 pcie@0 { 145 /* IRQ[0:3] are pulled up on board, set to active-low */ 146 interrupt-map-mask = <0xf800 0 0 7>; 147 interrupt-map = < 148 /* IDSEL 0x0 */ 149 0000 0 0 1 &mpic 0 1 0 0 150 0000 0 0 2 &mpic 1 1 0 0 151 0000 0 0 3 &mpic 2 1 0 0 152 0000 0 0 4 &mpic 3 1 0 0 153 >; 154 ranges = <0x2000000 0x0 0xc0000000 155 0x2000000 0x0 0xc0000000 156 0x0 0x20000000 157 158 0x1000000 0x0 0x0 159 0x1000000 0x0 0x0 160 0x0 0x100000>; 161 }; 162 }; 163 164 board_pci1: pci1: pcie@ff609000 { 165 reg = <0 0xff609000 0 0x1000>; 166 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 167 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; 168 pcie@0 { 169 /* 170 * IRQ[4:6] only for PCIe, set to active-high, 171 * IRQ[7] is pulled up on board, set to active-low 172 */ 173 interrupt-map-mask = <0xf800 0 0 7>; 174 interrupt-map = < 175 /* IDSEL 0x0 */ 176 0000 0 0 1 &mpic 4 2 0 0 177 0000 0 0 2 &mpic 5 2 0 0 178 0000 0 0 3 &mpic 6 2 0 0 179 0000 0 0 4 &mpic 7 1 0 0 180 >; 181 ranges = <0x2000000 0x0 0xa0000000 182 0x2000000 0x0 0xa0000000 183 0x0 0x20000000 184 185 0x1000000 0x0 0x0 186 0x1000000 0x0 0x0 187 0x0 0x100000>; 188 }; 189 }; 190 191 pci2: pcie@ff60b000 { 192 reg = <0 0xff60b000 0 0x1000>; 193 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 194 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; 195 pcie@0 { 196 /* 197 * IRQ[8:10] are pulled up on board, set to active-low 198 * IRQ[11] only for PCIe, set to active-high, 199 */ 200 interrupt-map-mask = <0xf800 0 0 7>; 201 interrupt-map = < 202 /* IDSEL 0x0 */ 203 0000 0 0 1 &mpic 8 1 0 0 204 0000 0 0 2 &mpic 9 1 0 0 205 0000 0 0 3 &mpic 10 1 0 0 206 0000 0 0 4 &mpic 11 2 0 0 207 >; 208 ranges = <0x2000000 0x0 0x80000000 209 0x2000000 0x0 0x80000000 210 0x0 0x20000000 211 212 0x1000000 0x0 0x0 213 0x1000000 0x0 0x0 214 0x0 0x100000>; 215 }; 216 }; 217}; 218 219/include/ "fsl/p1023si-post.dtsi" 220