1 /*
2 * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
3 * reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the NetLogic
9 * license below:
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 *
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in
19 * the documentation and/or other materials provided with the
20 * distribution.
21 *
22 * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
29 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
31 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
32 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35 #include <linux/kernel.h>
36 #include <linux/serial_8250.h>
37 #include <linux/pm.h>
38
39 #include <asm/reboot.h>
40 #include <asm/time.h>
41 #include <asm/bootinfo.h>
42
43 #include <asm/netlogic/interrupt.h>
44 #include <asm/netlogic/psb-bootinfo.h>
45 #include <asm/netlogic/haldefs.h>
46 #include <asm/netlogic/common.h>
47
48 #include <asm/netlogic/xlr/xlr.h>
49 #include <asm/netlogic/xlr/iomap.h>
50 #include <asm/netlogic/xlr/pic.h>
51 #include <asm/netlogic/xlr/gpio.h>
52
53 uint64_t nlm_io_base = DEFAULT_NETLOGIC_IO_BASE;
54 uint64_t nlm_pic_base;
55 struct psb_info nlm_prom_info;
56
57 unsigned long nlm_common_ebase = 0x0;
58
59 /* default to uniprocessor */
60 uint32_t nlm_coremask = 1, nlm_cpumask = 1;
61 int nlm_threads_per_core = 1;
62
nlm_early_serial_setup(void)63 static void __init nlm_early_serial_setup(void)
64 {
65 struct uart_port s;
66 unsigned long uart_base;
67
68 uart_base = (unsigned long)nlm_mmio_base(NETLOGIC_IO_UART_0_OFFSET);
69 memset(&s, 0, sizeof(s));
70 s.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
71 s.iotype = UPIO_MEM32;
72 s.regshift = 2;
73 s.irq = PIC_UART_0_IRQ;
74 s.uartclk = PIC_CLKS_PER_SEC;
75 s.serial_in = nlm_xlr_uart_in;
76 s.serial_out = nlm_xlr_uart_out;
77 s.mapbase = uart_base;
78 s.membase = (unsigned char __iomem *)uart_base;
79 early_serial_setup(&s);
80 }
81
nlm_linux_exit(void)82 static void nlm_linux_exit(void)
83 {
84 uint64_t gpiobase;
85
86 gpiobase = nlm_mmio_base(NETLOGIC_IO_GPIO_OFFSET);
87 /* trigger a chip reset by writing 1 to GPIO_SWRESET_REG */
88 nlm_write_reg(gpiobase, NETLOGIC_GPIO_SWRESET_REG, 1);
89 for ( ; ; )
90 cpu_wait();
91 }
92
plat_mem_setup(void)93 void __init plat_mem_setup(void)
94 {
95 panic_timeout = 5;
96 _machine_restart = (void (*)(char *))nlm_linux_exit;
97 _machine_halt = nlm_linux_exit;
98 pm_power_off = nlm_linux_exit;
99 }
100
get_system_type(void)101 const char *get_system_type(void)
102 {
103 return "Netlogic XLR/XLS Series";
104 }
105
nlm_get_cpu_frequency(void)106 unsigned int nlm_get_cpu_frequency(void)
107 {
108 return (unsigned int)nlm_prom_info.cpu_frequency;
109 }
110
prom_free_prom_memory(void)111 void __init prom_free_prom_memory(void)
112 {
113 /* Nothing yet */
114 }
115
build_arcs_cmdline(int * argv)116 static void __init build_arcs_cmdline(int *argv)
117 {
118 int i, remain, len;
119 char *arg;
120
121 remain = sizeof(arcs_cmdline) - 1;
122 arcs_cmdline[0] = '\0';
123 for (i = 0; argv[i] != 0; i++) {
124 arg = (char *)(long)argv[i];
125 len = strlen(arg);
126 if (len + 1 > remain)
127 break;
128 strcat(arcs_cmdline, arg);
129 strcat(arcs_cmdline, " ");
130 remain -= len + 1;
131 }
132
133 /* Add the default options here */
134 if ((strstr(arcs_cmdline, "console=")) == NULL) {
135 arg = "console=ttyS0,38400 ";
136 len = strlen(arg);
137 if (len > remain)
138 goto fail;
139 strcat(arcs_cmdline, arg);
140 remain -= len;
141 }
142 #ifdef CONFIG_BLK_DEV_INITRD
143 if ((strstr(arcs_cmdline, "rdinit=")) == NULL) {
144 arg = "rdinit=/sbin/init ";
145 len = strlen(arg);
146 if (len > remain)
147 goto fail;
148 strcat(arcs_cmdline, arg);
149 remain -= len;
150 }
151 #endif
152 return;
153 fail:
154 panic("Cannot add %s, command line too big!", arg);
155 }
156
prom_add_memory(void)157 static void prom_add_memory(void)
158 {
159 struct nlm_boot_mem_map *bootm;
160 u64 start, size;
161 u64 pref_backup = 512; /* avoid pref walking beyond end */
162 int i;
163
164 bootm = (void *)(long)nlm_prom_info.psb_mem_map;
165 for (i = 0; i < bootm->nr_map; i++) {
166 if (bootm->map[i].type != BOOT_MEM_RAM)
167 continue;
168 start = bootm->map[i].addr;
169 size = bootm->map[i].size;
170
171 /* Work around for using bootloader mem */
172 if (i == 0 && start == 0 && size == 0x0c000000)
173 size = 0x0ff00000;
174
175 add_memory_region(start, size - pref_backup, BOOT_MEM_RAM);
176 }
177 }
178
prom_init(void)179 void __init prom_init(void)
180 {
181 int *argv, *envp; /* passed as 32 bit ptrs */
182 struct psb_info *prom_infop;
183
184 /* truncate to 32 bit and sign extend all args */
185 argv = (int *)(long)(int)fw_arg1;
186 envp = (int *)(long)(int)fw_arg2;
187 prom_infop = (struct psb_info *)(long)(int)fw_arg3;
188
189 nlm_prom_info = *prom_infop;
190 nlm_pic_base = nlm_mmio_base(NETLOGIC_IO_PIC_OFFSET);
191
192 nlm_early_serial_setup();
193 build_arcs_cmdline(argv);
194 nlm_common_ebase = read_c0_ebase() & (~((1 << 12) - 1));
195 prom_add_memory();
196
197 #ifdef CONFIG_SMP
198 nlm_wakeup_secondary_cpus(nlm_prom_info.online_cpu_map);
199 register_smp_ops(&nlm_smp_ops);
200 #endif
201 }
202