1 /***************************************************************************/
2 
3 /*
4  *	timers.c -- generic ColdFire hardware timer support.
5  *
6  *	Copyright (C) 1999-2008, Greg Ungerer <gerg@snapgear.com>
7  */
8 
9 /***************************************************************************/
10 
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/sched.h>
14 #include <linux/interrupt.h>
15 #include <linux/irq.h>
16 #include <linux/profile.h>
17 #include <linux/clocksource.h>
18 #include <asm/io.h>
19 #include <asm/traps.h>
20 #include <asm/machdep.h>
21 #include <asm/coldfire.h>
22 #include <asm/mcftimer.h>
23 #include <asm/mcfsim.h>
24 
25 /***************************************************************************/
26 
27 /*
28  *	By default use timer1 as the system clock timer.
29  */
30 #define	FREQ	(MCF_BUSCLK / 16)
31 #define	TA(a)	(MCFTIMER_BASE1 + (a))
32 
33 /*
34  *	These provide the underlying interrupt vector support.
35  *	Unfortunately it is a little different on each ColdFire.
36  */
37 void coldfire_profile_init(void);
38 
39 #if defined(CONFIG_M532x)
40 #define	__raw_readtrr	__raw_readl
41 #define	__raw_writetrr	__raw_writel
42 #else
43 #define	__raw_readtrr	__raw_readw
44 #define	__raw_writetrr	__raw_writew
45 #endif
46 
47 static u32 mcftmr_cycles_per_jiffy;
48 static u32 mcftmr_cnt;
49 
50 /***************************************************************************/
51 
mcftmr_tick(int irq,void * dummy)52 static irqreturn_t mcftmr_tick(int irq, void *dummy)
53 {
54 	/* Reset the ColdFire timer */
55 	__raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, TA(MCFTIMER_TER));
56 
57 	mcftmr_cnt += mcftmr_cycles_per_jiffy;
58 	return arch_timer_interrupt(irq, dummy);
59 }
60 
61 /***************************************************************************/
62 
63 static struct irqaction mcftmr_timer_irq = {
64 	.name	 = "timer",
65 	.flags	 = IRQF_DISABLED | IRQF_TIMER,
66 	.handler = mcftmr_tick,
67 };
68 
69 /***************************************************************************/
70 
mcftmr_read_clk(struct clocksource * cs)71 static cycle_t mcftmr_read_clk(struct clocksource *cs)
72 {
73 	unsigned long flags;
74 	u32 cycles;
75 	u16 tcn;
76 
77 	local_irq_save(flags);
78 	tcn = __raw_readw(TA(MCFTIMER_TCN));
79 	cycles = mcftmr_cnt;
80 	local_irq_restore(flags);
81 
82 	return cycles + tcn;
83 }
84 
85 /***************************************************************************/
86 
87 static struct clocksource mcftmr_clk = {
88 	.name	= "tmr",
89 	.rating	= 250,
90 	.read	= mcftmr_read_clk,
91 	.mask	= CLOCKSOURCE_MASK(32),
92 	.flags	= CLOCK_SOURCE_IS_CONTINUOUS,
93 };
94 
95 /***************************************************************************/
96 
hw_timer_init(void)97 void hw_timer_init(void)
98 {
99 	__raw_writew(MCFTIMER_TMR_DISABLE, TA(MCFTIMER_TMR));
100 	mcftmr_cycles_per_jiffy = FREQ / HZ;
101 	/*
102 	 *	The coldfire timer runs from 0 to TRR included, then 0
103 	 *	again and so on.  It counts thus actually TRR + 1 steps
104 	 *	for 1 tick, not TRR.  So if you want n cycles,
105 	 *	initialize TRR with n - 1.
106 	 */
107 	__raw_writetrr(mcftmr_cycles_per_jiffy - 1, TA(MCFTIMER_TRR));
108 	__raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
109 		MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, TA(MCFTIMER_TMR));
110 
111 	clocksource_register_hz(&mcftmr_clk, FREQ);
112 
113 	setup_irq(MCF_IRQ_TIMER, &mcftmr_timer_irq);
114 
115 #ifdef CONFIG_HIGHPROFILE
116 	coldfire_profile_init();
117 #endif
118 }
119 
120 /***************************************************************************/
121 #ifdef CONFIG_HIGHPROFILE
122 /***************************************************************************/
123 
124 /*
125  *	By default use timer2 as the profiler clock timer.
126  */
127 #define	PA(a)	(MCFTIMER_BASE2 + (a))
128 
129 /*
130  *	Choose a reasonably fast profile timer. Make it an odd value to
131  *	try and get good coverage of kernel operations.
132  */
133 #define	PROFILEHZ	1013
134 
135 /*
136  *	Use the other timer to provide high accuracy profiling info.
137  */
coldfire_profile_tick(int irq,void * dummy)138 irqreturn_t coldfire_profile_tick(int irq, void *dummy)
139 {
140 	/* Reset ColdFire timer2 */
141 	__raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, PA(MCFTIMER_TER));
142 	if (current->pid)
143 		profile_tick(CPU_PROFILING);
144 	return IRQ_HANDLED;
145 }
146 
147 /***************************************************************************/
148 
149 static struct irqaction coldfire_profile_irq = {
150 	.name	 = "profile timer",
151 	.flags	 = IRQF_DISABLED | IRQF_TIMER,
152 	.handler = coldfire_profile_tick,
153 };
154 
coldfire_profile_init(void)155 void coldfire_profile_init(void)
156 {
157 	printk(KERN_INFO "PROFILE: lodging TIMER2 @ %dHz as profile timer\n",
158 	       PROFILEHZ);
159 
160 	/* Set up TIMER 2 as high speed profile clock */
161 	__raw_writew(MCFTIMER_TMR_DISABLE, PA(MCFTIMER_TMR));
162 
163 	__raw_writetrr(((MCF_BUSCLK / 16) / PROFILEHZ), PA(MCFTIMER_TRR));
164 	__raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
165 		MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, PA(MCFTIMER_TMR));
166 
167 	setup_irq(MCF_IRQ_PROFILER, &coldfire_profile_irq);
168 }
169 
170 /***************************************************************************/
171 #endif	/* CONFIG_HIGHPROFILE */
172 /***************************************************************************/
173