1 /***************************************************************************/
2
3 /*
4 * sltimers.c -- generic ColdFire slice timer support.
5 *
6 * Copyright (C) 2009-2010, Philippe De Muyter <phdm@macqel.be>
7 * based on
8 * timers.c -- generic ColdFire hardware timer support.
9 * Copyright (C) 1999-2008, Greg Ungerer <gerg@snapgear.com>
10 */
11
12 /***************************************************************************/
13
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/sched.h>
17 #include <linux/interrupt.h>
18 #include <linux/irq.h>
19 #include <linux/profile.h>
20 #include <linux/clocksource.h>
21 #include <asm/io.h>
22 #include <asm/traps.h>
23 #include <asm/machdep.h>
24 #include <asm/coldfire.h>
25 #include <asm/mcfslt.h>
26 #include <asm/mcfsim.h>
27
28 /***************************************************************************/
29
30 #ifdef CONFIG_HIGHPROFILE
31
32 /*
33 * By default use Slice Timer 1 as the profiler clock timer.
34 */
35 #define PA(a) (MCF_MBAR + MCFSLT_TIMER1 + (a))
36
37 /*
38 * Choose a reasonably fast profile timer. Make it an odd value to
39 * try and get good coverage of kernel operations.
40 */
41 #define PROFILEHZ 1013
42
mcfslt_profile_tick(int irq,void * dummy)43 irqreturn_t mcfslt_profile_tick(int irq, void *dummy)
44 {
45 /* Reset Slice Timer 1 */
46 __raw_writel(MCFSLT_SSR_BE | MCFSLT_SSR_TE, PA(MCFSLT_SSR));
47 if (current->pid)
48 profile_tick(CPU_PROFILING);
49 return IRQ_HANDLED;
50 }
51
52 static struct irqaction mcfslt_profile_irq = {
53 .name = "profile timer",
54 .flags = IRQF_DISABLED | IRQF_TIMER,
55 .handler = mcfslt_profile_tick,
56 };
57
mcfslt_profile_init(void)58 void mcfslt_profile_init(void)
59 {
60 printk(KERN_INFO "PROFILE: lodging TIMER 1 @ %dHz as profile timer\n",
61 PROFILEHZ);
62
63 setup_irq(MCF_IRQ_PROFILER, &mcfslt_profile_irq);
64
65 /* Set up TIMER 2 as high speed profile clock */
66 __raw_writel(MCF_BUSCLK / PROFILEHZ - 1, PA(MCFSLT_STCNT));
67 __raw_writel(MCFSLT_SCR_RUN | MCFSLT_SCR_IEN | MCFSLT_SCR_TEN,
68 PA(MCFSLT_SCR));
69
70 }
71
72 #endif /* CONFIG_HIGHPROFILE */
73
74 /***************************************************************************/
75
76 /*
77 * By default use Slice Timer 0 as the system clock timer.
78 */
79 #define TA(a) (MCF_MBAR + MCFSLT_TIMER0 + (a))
80
81 static u32 mcfslt_cycles_per_jiffy;
82 static u32 mcfslt_cnt;
83
mcfslt_tick(int irq,void * dummy)84 static irqreturn_t mcfslt_tick(int irq, void *dummy)
85 {
86 /* Reset Slice Timer 0 */
87 __raw_writel(MCFSLT_SSR_BE | MCFSLT_SSR_TE, TA(MCFSLT_SSR));
88 mcfslt_cnt += mcfslt_cycles_per_jiffy;
89 return arch_timer_interrupt(irq, dummy);
90 }
91
92 static struct irqaction mcfslt_timer_irq = {
93 .name = "timer",
94 .flags = IRQF_DISABLED | IRQF_TIMER,
95 .handler = mcfslt_tick,
96 };
97
mcfslt_read_clk(struct clocksource * cs)98 static cycle_t mcfslt_read_clk(struct clocksource *cs)
99 {
100 unsigned long flags;
101 u32 cycles, scnt;
102
103 local_irq_save(flags);
104 scnt = __raw_readl(TA(MCFSLT_SCNT));
105 cycles = mcfslt_cnt;
106 if (__raw_readl(TA(MCFSLT_SSR)) & MCFSLT_SSR_TE) {
107 cycles += mcfslt_cycles_per_jiffy;
108 scnt = __raw_readl(TA(MCFSLT_SCNT));
109 }
110 local_irq_restore(flags);
111
112 /* subtract because slice timers count down */
113 return cycles + ((mcfslt_cycles_per_jiffy - 1) - scnt);
114 }
115
116 static struct clocksource mcfslt_clk = {
117 .name = "slt",
118 .rating = 250,
119 .read = mcfslt_read_clk,
120 .mask = CLOCKSOURCE_MASK(32),
121 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
122 };
123
hw_timer_init(void)124 void hw_timer_init(void)
125 {
126 mcfslt_cycles_per_jiffy = MCF_BUSCLK / HZ;
127 /*
128 * The coldfire slice timer (SLT) runs from STCNT to 0 included,
129 * then STCNT again and so on. It counts thus actually
130 * STCNT + 1 steps for 1 tick, not STCNT. So if you want
131 * n cycles, initialize STCNT with n - 1.
132 */
133 __raw_writel(mcfslt_cycles_per_jiffy - 1, TA(MCFSLT_STCNT));
134 __raw_writel(MCFSLT_SCR_RUN | MCFSLT_SCR_IEN | MCFSLT_SCR_TEN,
135 TA(MCFSLT_SCR));
136 /* initialize mcfslt_cnt knowing that slice timers count down */
137 mcfslt_cnt = mcfslt_cycles_per_jiffy;
138
139 setup_irq(MCF_IRQ_TIMER, &mcfslt_timer_irq);
140
141 clocksource_register_hz(&mcfslt_clk, MCF_BUSCLK);
142
143 #ifdef CONFIG_HIGHPROFILE
144 mcfslt_profile_init();
145 #endif
146 }
147