1 /*
2 * linux/arch/m68k/kernel/traps.c
3 *
4 * Copyright (C) 1993, 1994 by Hamish Macdonald
5 *
6 * 68040 fixes by Michael Rausch
7 * 68040 fixes by Martin Apel
8 * 68040 fixes and writeback by Richard Zidlicky
9 * 68060 fixes by Roman Hodek
10 * 68060 fixes by Jesper Skov
11 *
12 * This file is subject to the terms and conditions of the GNU General Public
13 * License. See the file COPYING in the main directory of this archive
14 * for more details.
15 */
16
17 /*
18 * Sets up all exception vectors
19 */
20
21 #include <linux/sched.h>
22 #include <linux/signal.h>
23 #include <linux/kernel.h>
24 #include <linux/mm.h>
25 #include <linux/module.h>
26 #include <linux/user.h>
27 #include <linux/string.h>
28 #include <linux/linkage.h>
29 #include <linux/init.h>
30 #include <linux/ptrace.h>
31 #include <linux/kallsyms.h>
32
33 #include <asm/setup.h>
34 #include <asm/fpu.h>
35 #include <asm/system.h>
36 #include <asm/uaccess.h>
37 #include <asm/traps.h>
38 #include <asm/pgalloc.h>
39 #include <asm/machdep.h>
40 #include <asm/siginfo.h>
41
42
43 static const char *vec_names[] = {
44 [VEC_RESETSP] = "RESET SP",
45 [VEC_RESETPC] = "RESET PC",
46 [VEC_BUSERR] = "BUS ERROR",
47 [VEC_ADDRERR] = "ADDRESS ERROR",
48 [VEC_ILLEGAL] = "ILLEGAL INSTRUCTION",
49 [VEC_ZERODIV] = "ZERO DIVIDE",
50 [VEC_CHK] = "CHK",
51 [VEC_TRAP] = "TRAPcc",
52 [VEC_PRIV] = "PRIVILEGE VIOLATION",
53 [VEC_TRACE] = "TRACE",
54 [VEC_LINE10] = "LINE 1010",
55 [VEC_LINE11] = "LINE 1111",
56 [VEC_RESV12] = "UNASSIGNED RESERVED 12",
57 [VEC_COPROC] = "COPROCESSOR PROTOCOL VIOLATION",
58 [VEC_FORMAT] = "FORMAT ERROR",
59 [VEC_UNINT] = "UNINITIALIZED INTERRUPT",
60 [VEC_RESV16] = "UNASSIGNED RESERVED 16",
61 [VEC_RESV17] = "UNASSIGNED RESERVED 17",
62 [VEC_RESV18] = "UNASSIGNED RESERVED 18",
63 [VEC_RESV19] = "UNASSIGNED RESERVED 19",
64 [VEC_RESV20] = "UNASSIGNED RESERVED 20",
65 [VEC_RESV21] = "UNASSIGNED RESERVED 21",
66 [VEC_RESV22] = "UNASSIGNED RESERVED 22",
67 [VEC_RESV23] = "UNASSIGNED RESERVED 23",
68 [VEC_SPUR] = "SPURIOUS INTERRUPT",
69 [VEC_INT1] = "LEVEL 1 INT",
70 [VEC_INT2] = "LEVEL 2 INT",
71 [VEC_INT3] = "LEVEL 3 INT",
72 [VEC_INT4] = "LEVEL 4 INT",
73 [VEC_INT5] = "LEVEL 5 INT",
74 [VEC_INT6] = "LEVEL 6 INT",
75 [VEC_INT7] = "LEVEL 7 INT",
76 [VEC_SYS] = "SYSCALL",
77 [VEC_TRAP1] = "TRAP #1",
78 [VEC_TRAP2] = "TRAP #2",
79 [VEC_TRAP3] = "TRAP #3",
80 [VEC_TRAP4] = "TRAP #4",
81 [VEC_TRAP5] = "TRAP #5",
82 [VEC_TRAP6] = "TRAP #6",
83 [VEC_TRAP7] = "TRAP #7",
84 [VEC_TRAP8] = "TRAP #8",
85 [VEC_TRAP9] = "TRAP #9",
86 [VEC_TRAP10] = "TRAP #10",
87 [VEC_TRAP11] = "TRAP #11",
88 [VEC_TRAP12] = "TRAP #12",
89 [VEC_TRAP13] = "TRAP #13",
90 [VEC_TRAP14] = "TRAP #14",
91 [VEC_TRAP15] = "TRAP #15",
92 [VEC_FPBRUC] = "FPCP BSUN",
93 [VEC_FPIR] = "FPCP INEXACT",
94 [VEC_FPDIVZ] = "FPCP DIV BY 0",
95 [VEC_FPUNDER] = "FPCP UNDERFLOW",
96 [VEC_FPOE] = "FPCP OPERAND ERROR",
97 [VEC_FPOVER] = "FPCP OVERFLOW",
98 [VEC_FPNAN] = "FPCP SNAN",
99 [VEC_FPUNSUP] = "FPCP UNSUPPORTED OPERATION",
100 [VEC_MMUCFG] = "MMU CONFIGURATION ERROR",
101 [VEC_MMUILL] = "MMU ILLEGAL OPERATION ERROR",
102 [VEC_MMUACC] = "MMU ACCESS LEVEL VIOLATION ERROR",
103 [VEC_RESV59] = "UNASSIGNED RESERVED 59",
104 [VEC_UNIMPEA] = "UNASSIGNED RESERVED 60",
105 [VEC_UNIMPII] = "UNASSIGNED RESERVED 61",
106 [VEC_RESV62] = "UNASSIGNED RESERVED 62",
107 [VEC_RESV63] = "UNASSIGNED RESERVED 63",
108 };
109
110 static const char *space_names[] = {
111 [0] = "Space 0",
112 [USER_DATA] = "User Data",
113 [USER_PROGRAM] = "User Program",
114 #ifndef CONFIG_SUN3
115 [3] = "Space 3",
116 #else
117 [FC_CONTROL] = "Control",
118 #endif
119 [4] = "Space 4",
120 [SUPER_DATA] = "Super Data",
121 [SUPER_PROGRAM] = "Super Program",
122 [CPU_SPACE] = "CPU"
123 };
124
125 void die_if_kernel(char *,struct pt_regs *,int);
126 asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
127 unsigned long error_code);
128 int send_fault_sig(struct pt_regs *regs);
129
130 asmlinkage void trap_c(struct frame *fp);
131
132 #if defined (CONFIG_M68060)
access_error060(struct frame * fp)133 static inline void access_error060 (struct frame *fp)
134 {
135 unsigned long fslw = fp->un.fmt4.pc; /* is really FSLW for access error */
136
137 #ifdef DEBUG
138 printk("fslw=%#lx, fa=%#lx\n", fslw, fp->un.fmt4.effaddr);
139 #endif
140
141 if (fslw & MMU060_BPE) {
142 /* branch prediction error -> clear branch cache */
143 __asm__ __volatile__ ("movec %/cacr,%/d0\n\t"
144 "orl #0x00400000,%/d0\n\t"
145 "movec %/d0,%/cacr"
146 : : : "d0" );
147 /* return if there's no other error */
148 if (!(fslw & MMU060_ERR_BITS) && !(fslw & MMU060_SEE))
149 return;
150 }
151
152 if (fslw & (MMU060_DESC_ERR | MMU060_WP | MMU060_SP)) {
153 unsigned long errorcode;
154 unsigned long addr = fp->un.fmt4.effaddr;
155
156 if (fslw & MMU060_MA)
157 addr = (addr + PAGE_SIZE - 1) & PAGE_MASK;
158
159 errorcode = 1;
160 if (fslw & MMU060_DESC_ERR) {
161 __flush_tlb040_one(addr);
162 errorcode = 0;
163 }
164 if (fslw & MMU060_W)
165 errorcode |= 2;
166 #ifdef DEBUG
167 printk("errorcode = %d\n", errorcode );
168 #endif
169 do_page_fault(&fp->ptregs, addr, errorcode);
170 } else if (fslw & (MMU060_SEE)){
171 /* Software Emulation Error.
172 * fault during mem_read/mem_write in ifpsp060/os.S
173 */
174 send_fault_sig(&fp->ptregs);
175 } else if (!(fslw & (MMU060_RE|MMU060_WE)) ||
176 send_fault_sig(&fp->ptregs) > 0) {
177 printk("pc=%#lx, fa=%#lx\n", fp->ptregs.pc, fp->un.fmt4.effaddr);
178 printk( "68060 access error, fslw=%lx\n", fslw );
179 trap_c( fp );
180 }
181 }
182 #endif /* CONFIG_M68060 */
183
184 #if defined (CONFIG_M68040)
probe040(int iswrite,unsigned long addr,int wbs)185 static inline unsigned long probe040(int iswrite, unsigned long addr, int wbs)
186 {
187 unsigned long mmusr;
188 mm_segment_t old_fs = get_fs();
189
190 set_fs(MAKE_MM_SEG(wbs));
191
192 if (iswrite)
193 asm volatile (".chip 68040; ptestw (%0); .chip 68k" : : "a" (addr));
194 else
195 asm volatile (".chip 68040; ptestr (%0); .chip 68k" : : "a" (addr));
196
197 asm volatile (".chip 68040; movec %%mmusr,%0; .chip 68k" : "=r" (mmusr));
198
199 set_fs(old_fs);
200
201 return mmusr;
202 }
203
do_040writeback1(unsigned short wbs,unsigned long wba,unsigned long wbd)204 static inline int do_040writeback1(unsigned short wbs, unsigned long wba,
205 unsigned long wbd)
206 {
207 int res = 0;
208 mm_segment_t old_fs = get_fs();
209
210 /* set_fs can not be moved, otherwise put_user() may oops */
211 set_fs(MAKE_MM_SEG(wbs));
212
213 switch (wbs & WBSIZ_040) {
214 case BA_SIZE_BYTE:
215 res = put_user(wbd & 0xff, (char __user *)wba);
216 break;
217 case BA_SIZE_WORD:
218 res = put_user(wbd & 0xffff, (short __user *)wba);
219 break;
220 case BA_SIZE_LONG:
221 res = put_user(wbd, (int __user *)wba);
222 break;
223 }
224
225 /* set_fs can not be moved, otherwise put_user() may oops */
226 set_fs(old_fs);
227
228
229 #ifdef DEBUG
230 printk("do_040writeback1, res=%d\n",res);
231 #endif
232
233 return res;
234 }
235
236 /* after an exception in a writeback the stack frame corresponding
237 * to that exception is discarded, set a few bits in the old frame
238 * to simulate what it should look like
239 */
fix_xframe040(struct frame * fp,unsigned long wba,unsigned short wbs)240 static inline void fix_xframe040(struct frame *fp, unsigned long wba, unsigned short wbs)
241 {
242 fp->un.fmt7.faddr = wba;
243 fp->un.fmt7.ssw = wbs & 0xff;
244 if (wba != current->thread.faddr)
245 fp->un.fmt7.ssw |= MA_040;
246 }
247
do_040writebacks(struct frame * fp)248 static inline void do_040writebacks(struct frame *fp)
249 {
250 int res = 0;
251 #if 0
252 if (fp->un.fmt7.wb1s & WBV_040)
253 printk("access_error040: cannot handle 1st writeback. oops.\n");
254 #endif
255
256 if ((fp->un.fmt7.wb2s & WBV_040) &&
257 !(fp->un.fmt7.wb2s & WBTT_040)) {
258 res = do_040writeback1(fp->un.fmt7.wb2s, fp->un.fmt7.wb2a,
259 fp->un.fmt7.wb2d);
260 if (res)
261 fix_xframe040(fp, fp->un.fmt7.wb2a, fp->un.fmt7.wb2s);
262 else
263 fp->un.fmt7.wb2s = 0;
264 }
265
266 /* do the 2nd wb only if the first one was successful (except for a kernel wb) */
267 if (fp->un.fmt7.wb3s & WBV_040 && (!res || fp->un.fmt7.wb3s & 4)) {
268 res = do_040writeback1(fp->un.fmt7.wb3s, fp->un.fmt7.wb3a,
269 fp->un.fmt7.wb3d);
270 if (res)
271 {
272 fix_xframe040(fp, fp->un.fmt7.wb3a, fp->un.fmt7.wb3s);
273
274 fp->un.fmt7.wb2s = fp->un.fmt7.wb3s;
275 fp->un.fmt7.wb3s &= (~WBV_040);
276 fp->un.fmt7.wb2a = fp->un.fmt7.wb3a;
277 fp->un.fmt7.wb2d = fp->un.fmt7.wb3d;
278 }
279 else
280 fp->un.fmt7.wb3s = 0;
281 }
282
283 if (res)
284 send_fault_sig(&fp->ptregs);
285 }
286
287 /*
288 * called from sigreturn(), must ensure userspace code didn't
289 * manipulate exception frame to circumvent protection, then complete
290 * pending writebacks
291 * we just clear TM2 to turn it into a userspace access
292 */
berr_040cleanup(struct frame * fp)293 asmlinkage void berr_040cleanup(struct frame *fp)
294 {
295 fp->un.fmt7.wb2s &= ~4;
296 fp->un.fmt7.wb3s &= ~4;
297
298 do_040writebacks(fp);
299 }
300
access_error040(struct frame * fp)301 static inline void access_error040(struct frame *fp)
302 {
303 unsigned short ssw = fp->un.fmt7.ssw;
304 unsigned long mmusr;
305
306 #ifdef DEBUG
307 printk("ssw=%#x, fa=%#lx\n", ssw, fp->un.fmt7.faddr);
308 printk("wb1s=%#x, wb2s=%#x, wb3s=%#x\n", fp->un.fmt7.wb1s,
309 fp->un.fmt7.wb2s, fp->un.fmt7.wb3s);
310 printk ("wb2a=%lx, wb3a=%lx, wb2d=%lx, wb3d=%lx\n",
311 fp->un.fmt7.wb2a, fp->un.fmt7.wb3a,
312 fp->un.fmt7.wb2d, fp->un.fmt7.wb3d);
313 #endif
314
315 if (ssw & ATC_040) {
316 unsigned long addr = fp->un.fmt7.faddr;
317 unsigned long errorcode;
318
319 /*
320 * The MMU status has to be determined AFTER the address
321 * has been corrected if there was a misaligned access (MA).
322 */
323 if (ssw & MA_040)
324 addr = (addr + 7) & -8;
325
326 /* MMU error, get the MMUSR info for this access */
327 mmusr = probe040(!(ssw & RW_040), addr, ssw);
328 #ifdef DEBUG
329 printk("mmusr = %lx\n", mmusr);
330 #endif
331 errorcode = 1;
332 if (!(mmusr & MMU_R_040)) {
333 /* clear the invalid atc entry */
334 __flush_tlb040_one(addr);
335 errorcode = 0;
336 }
337
338 /* despite what documentation seems to say, RMW
339 * accesses have always both the LK and RW bits set */
340 if (!(ssw & RW_040) || (ssw & LK_040))
341 errorcode |= 2;
342
343 if (do_page_fault(&fp->ptregs, addr, errorcode)) {
344 #ifdef DEBUG
345 printk("do_page_fault() !=0\n");
346 #endif
347 if (user_mode(&fp->ptregs)){
348 /* delay writebacks after signal delivery */
349 #ifdef DEBUG
350 printk(".. was usermode - return\n");
351 #endif
352 return;
353 }
354 /* disable writeback into user space from kernel
355 * (if do_page_fault didn't fix the mapping,
356 * the writeback won't do good)
357 */
358 disable_wb:
359 #ifdef DEBUG
360 printk(".. disabling wb2\n");
361 #endif
362 if (fp->un.fmt7.wb2a == fp->un.fmt7.faddr)
363 fp->un.fmt7.wb2s &= ~WBV_040;
364 if (fp->un.fmt7.wb3a == fp->un.fmt7.faddr)
365 fp->un.fmt7.wb3s &= ~WBV_040;
366 }
367 } else {
368 /* In case of a bus error we either kill the process or expect
369 * the kernel to catch the fault, which then is also responsible
370 * for cleaning up the mess.
371 */
372 current->thread.signo = SIGBUS;
373 current->thread.faddr = fp->un.fmt7.faddr;
374 if (send_fault_sig(&fp->ptregs) >= 0)
375 printk("68040 bus error (ssw=%x, faddr=%lx)\n", ssw,
376 fp->un.fmt7.faddr);
377 goto disable_wb;
378 }
379
380 do_040writebacks(fp);
381 }
382 #endif /* CONFIG_M68040 */
383
384 #if defined(CONFIG_SUN3)
385 #include <asm/sun3mmu.h>
386
387 extern int mmu_emu_handle_fault (unsigned long, int, int);
388
389 /* sun3 version of bus_error030 */
390
bus_error030(struct frame * fp)391 static inline void bus_error030 (struct frame *fp)
392 {
393 unsigned char buserr_type = sun3_get_buserr ();
394 unsigned long addr, errorcode;
395 unsigned short ssw = fp->un.fmtb.ssw;
396 extern unsigned long _sun3_map_test_start, _sun3_map_test_end;
397
398 #ifdef DEBUG
399 if (ssw & (FC | FB))
400 printk ("Instruction fault at %#010lx\n",
401 ssw & FC ?
402 fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
403 :
404 fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
405 if (ssw & DF)
406 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
407 ssw & RW ? "read" : "write",
408 fp->un.fmtb.daddr,
409 space_names[ssw & DFC], fp->ptregs.pc);
410 #endif
411
412 /*
413 * Check if this page should be demand-mapped. This needs to go before
414 * the testing for a bad kernel-space access (demand-mapping applies
415 * to kernel accesses too).
416 */
417
418 if ((ssw & DF)
419 && (buserr_type & (SUN3_BUSERR_PROTERR | SUN3_BUSERR_INVALID))) {
420 if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 0))
421 return;
422 }
423
424 /* Check for kernel-space pagefault (BAD). */
425 if (fp->ptregs.sr & PS_S) {
426 /* kernel fault must be a data fault to user space */
427 if (! ((ssw & DF) && ((ssw & DFC) == USER_DATA))) {
428 // try checking the kernel mappings before surrender
429 if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 1))
430 return;
431 /* instruction fault or kernel data fault! */
432 if (ssw & (FC | FB))
433 printk ("Instruction fault at %#010lx\n",
434 fp->ptregs.pc);
435 if (ssw & DF) {
436 /* was this fault incurred testing bus mappings? */
437 if((fp->ptregs.pc >= (unsigned long)&_sun3_map_test_start) &&
438 (fp->ptregs.pc <= (unsigned long)&_sun3_map_test_end)) {
439 send_fault_sig(&fp->ptregs);
440 return;
441 }
442
443 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
444 ssw & RW ? "read" : "write",
445 fp->un.fmtb.daddr,
446 space_names[ssw & DFC], fp->ptregs.pc);
447 }
448 printk ("BAD KERNEL BUSERR\n");
449
450 die_if_kernel("Oops", &fp->ptregs,0);
451 force_sig(SIGKILL, current);
452 return;
453 }
454 } else {
455 /* user fault */
456 if (!(ssw & (FC | FB)) && !(ssw & DF))
457 /* not an instruction fault or data fault! BAD */
458 panic ("USER BUSERR w/o instruction or data fault");
459 }
460
461
462 /* First handle the data fault, if any. */
463 if (ssw & DF) {
464 addr = fp->un.fmtb.daddr;
465
466 // errorcode bit 0: 0 -> no page 1 -> protection fault
467 // errorcode bit 1: 0 -> read fault 1 -> write fault
468
469 // (buserr_type & SUN3_BUSERR_PROTERR) -> protection fault
470 // (buserr_type & SUN3_BUSERR_INVALID) -> invalid page fault
471
472 if (buserr_type & SUN3_BUSERR_PROTERR)
473 errorcode = 0x01;
474 else if (buserr_type & SUN3_BUSERR_INVALID)
475 errorcode = 0x00;
476 else {
477 #ifdef DEBUG
478 printk ("*** unexpected busfault type=%#04x\n", buserr_type);
479 printk ("invalid %s access at %#lx from pc %#lx\n",
480 !(ssw & RW) ? "write" : "read", addr,
481 fp->ptregs.pc);
482 #endif
483 die_if_kernel ("Oops", &fp->ptregs, buserr_type);
484 force_sig (SIGBUS, current);
485 return;
486 }
487
488 //todo: wtf is RM bit? --m
489 if (!(ssw & RW) || ssw & RM)
490 errorcode |= 0x02;
491
492 /* Handle page fault. */
493 do_page_fault (&fp->ptregs, addr, errorcode);
494
495 /* Retry the data fault now. */
496 return;
497 }
498
499 /* Now handle the instruction fault. */
500
501 /* Get the fault address. */
502 if (fp->ptregs.format == 0xA)
503 addr = fp->ptregs.pc + 4;
504 else
505 addr = fp->un.fmtb.baddr;
506 if (ssw & FC)
507 addr -= 2;
508
509 if (buserr_type & SUN3_BUSERR_INVALID) {
510 if (!mmu_emu_handle_fault (fp->un.fmtb.daddr, 1, 0))
511 do_page_fault (&fp->ptregs, addr, 0);
512 } else {
513 #ifdef DEBUG
514 printk ("protection fault on insn access (segv).\n");
515 #endif
516 force_sig (SIGSEGV, current);
517 }
518 }
519 #else
520 #if defined(CPU_M68020_OR_M68030)
bus_error030(struct frame * fp)521 static inline void bus_error030 (struct frame *fp)
522 {
523 volatile unsigned short temp;
524 unsigned short mmusr;
525 unsigned long addr, errorcode;
526 unsigned short ssw = fp->un.fmtb.ssw;
527 #ifdef DEBUG
528 unsigned long desc;
529
530 printk ("pid = %x ", current->pid);
531 printk ("SSW=%#06x ", ssw);
532
533 if (ssw & (FC | FB))
534 printk ("Instruction fault at %#010lx\n",
535 ssw & FC ?
536 fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
537 :
538 fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
539 if (ssw & DF)
540 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
541 ssw & RW ? "read" : "write",
542 fp->un.fmtb.daddr,
543 space_names[ssw & DFC], fp->ptregs.pc);
544 #endif
545
546 /* ++andreas: If a data fault and an instruction fault happen
547 at the same time map in both pages. */
548
549 /* First handle the data fault, if any. */
550 if (ssw & DF) {
551 addr = fp->un.fmtb.daddr;
552
553 #ifdef DEBUG
554 asm volatile ("ptestr %3,%2@,#7,%0\n\t"
555 "pmove %%psr,%1"
556 : "=a&" (desc), "=m" (temp)
557 : "a" (addr), "d" (ssw));
558 #else
559 asm volatile ("ptestr %2,%1@,#7\n\t"
560 "pmove %%psr,%0"
561 : "=m" (temp) : "a" (addr), "d" (ssw));
562 #endif
563 mmusr = temp;
564
565 #ifdef DEBUG
566 printk("mmusr is %#x for addr %#lx in task %p\n",
567 mmusr, addr, current);
568 printk("descriptor address is %#lx, contents %#lx\n",
569 __va(desc), *(unsigned long *)__va(desc));
570 #endif
571
572 errorcode = (mmusr & MMU_I) ? 0 : 1;
573 if (!(ssw & RW) || (ssw & RM))
574 errorcode |= 2;
575
576 if (mmusr & (MMU_I | MMU_WP)) {
577 if (ssw & 4) {
578 printk("Data %s fault at %#010lx in %s (pc=%#lx)\n",
579 ssw & RW ? "read" : "write",
580 fp->un.fmtb.daddr,
581 space_names[ssw & DFC], fp->ptregs.pc);
582 goto buserr;
583 }
584 /* Don't try to do anything further if an exception was
585 handled. */
586 if (do_page_fault (&fp->ptregs, addr, errorcode) < 0)
587 return;
588 } else if (!(mmusr & MMU_I)) {
589 /* probably a 020 cas fault */
590 if (!(ssw & RM) && send_fault_sig(&fp->ptregs) > 0)
591 printk("unexpected bus error (%#x,%#x)\n", ssw, mmusr);
592 } else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
593 printk("invalid %s access at %#lx from pc %#lx\n",
594 !(ssw & RW) ? "write" : "read", addr,
595 fp->ptregs.pc);
596 die_if_kernel("Oops",&fp->ptregs,mmusr);
597 force_sig(SIGSEGV, current);
598 return;
599 } else {
600 #if 0
601 static volatile long tlong;
602 #endif
603
604 printk("weird %s access at %#lx from pc %#lx (ssw is %#x)\n",
605 !(ssw & RW) ? "write" : "read", addr,
606 fp->ptregs.pc, ssw);
607 asm volatile ("ptestr #1,%1@,#0\n\t"
608 "pmove %%psr,%0"
609 : "=m" (temp)
610 : "a" (addr));
611 mmusr = temp;
612
613 printk ("level 0 mmusr is %#x\n", mmusr);
614 #if 0
615 asm volatile ("pmove %%tt0,%0"
616 : "=m" (tlong));
617 printk("tt0 is %#lx, ", tlong);
618 asm volatile ("pmove %%tt1,%0"
619 : "=m" (tlong));
620 printk("tt1 is %#lx\n", tlong);
621 #endif
622 #ifdef DEBUG
623 printk("Unknown SIGSEGV - 1\n");
624 #endif
625 die_if_kernel("Oops",&fp->ptregs,mmusr);
626 force_sig(SIGSEGV, current);
627 return;
628 }
629
630 /* setup an ATC entry for the access about to be retried */
631 if (!(ssw & RW) || (ssw & RM))
632 asm volatile ("ploadw %1,%0@" : /* no outputs */
633 : "a" (addr), "d" (ssw));
634 else
635 asm volatile ("ploadr %1,%0@" : /* no outputs */
636 : "a" (addr), "d" (ssw));
637 }
638
639 /* Now handle the instruction fault. */
640
641 if (!(ssw & (FC|FB)))
642 return;
643
644 if (fp->ptregs.sr & PS_S) {
645 printk("Instruction fault at %#010lx\n",
646 fp->ptregs.pc);
647 buserr:
648 printk ("BAD KERNEL BUSERR\n");
649 die_if_kernel("Oops",&fp->ptregs,0);
650 force_sig(SIGKILL, current);
651 return;
652 }
653
654 /* get the fault address */
655 if (fp->ptregs.format == 10)
656 addr = fp->ptregs.pc + 4;
657 else
658 addr = fp->un.fmtb.baddr;
659 if (ssw & FC)
660 addr -= 2;
661
662 if ((ssw & DF) && ((addr ^ fp->un.fmtb.daddr) & PAGE_MASK) == 0)
663 /* Insn fault on same page as data fault. But we
664 should still create the ATC entry. */
665 goto create_atc_entry;
666
667 #ifdef DEBUG
668 asm volatile ("ptestr #1,%2@,#7,%0\n\t"
669 "pmove %%psr,%1"
670 : "=a&" (desc), "=m" (temp)
671 : "a" (addr));
672 #else
673 asm volatile ("ptestr #1,%1@,#7\n\t"
674 "pmove %%psr,%0"
675 : "=m" (temp) : "a" (addr));
676 #endif
677 mmusr = temp;
678
679 #ifdef DEBUG
680 printk ("mmusr is %#x for addr %#lx in task %p\n",
681 mmusr, addr, current);
682 printk ("descriptor address is %#lx, contents %#lx\n",
683 __va(desc), *(unsigned long *)__va(desc));
684 #endif
685
686 if (mmusr & MMU_I)
687 do_page_fault (&fp->ptregs, addr, 0);
688 else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
689 printk ("invalid insn access at %#lx from pc %#lx\n",
690 addr, fp->ptregs.pc);
691 #ifdef DEBUG
692 printk("Unknown SIGSEGV - 2\n");
693 #endif
694 die_if_kernel("Oops",&fp->ptregs,mmusr);
695 force_sig(SIGSEGV, current);
696 return;
697 }
698
699 create_atc_entry:
700 /* setup an ATC entry for the access about to be retried */
701 asm volatile ("ploadr #2,%0@" : /* no outputs */
702 : "a" (addr));
703 }
704 #endif /* CPU_M68020_OR_M68030 */
705 #endif /* !CONFIG_SUN3 */
706
707 #if defined(CONFIG_COLDFIRE) && defined(CONFIG_MMU)
708 #include <asm/mcfmmu.h>
709
710 /*
711 * The following table converts the FS encoding of a ColdFire
712 * exception stack frame into the error_code value needed by
713 * do_fault.
714 */
715 static const unsigned char fs_err_code[] = {
716 0, /* 0000 */
717 0, /* 0001 */
718 0, /* 0010 */
719 0, /* 0011 */
720 1, /* 0100 */
721 0, /* 0101 */
722 0, /* 0110 */
723 0, /* 0111 */
724 2, /* 1000 */
725 3, /* 1001 */
726 2, /* 1010 */
727 0, /* 1011 */
728 1, /* 1100 */
729 1, /* 1101 */
730 0, /* 1110 */
731 0 /* 1111 */
732 };
733
access_errorcf(unsigned int fs,struct frame * fp)734 static inline void access_errorcf(unsigned int fs, struct frame *fp)
735 {
736 unsigned long mmusr, addr;
737 unsigned int err_code;
738 int need_page_fault;
739
740 mmusr = mmu_read(MMUSR);
741 addr = mmu_read(MMUAR);
742
743 /*
744 * error_code:
745 * bit 0 == 0 means no page found, 1 means protection fault
746 * bit 1 == 0 means read, 1 means write
747 */
748 switch (fs) {
749 case 5: /* 0101 TLB opword X miss */
750 need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 0, 0);
751 addr = fp->ptregs.pc;
752 break;
753 case 6: /* 0110 TLB extension word X miss */
754 need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 0, 1);
755 addr = fp->ptregs.pc + sizeof(long);
756 break;
757 case 10: /* 1010 TLB W miss */
758 need_page_fault = cf_tlb_miss(&fp->ptregs, 1, 1, 0);
759 break;
760 case 14: /* 1110 TLB R miss */
761 need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 1, 0);
762 break;
763 default:
764 /* 0000 Normal */
765 /* 0001 Reserved */
766 /* 0010 Interrupt during debug service routine */
767 /* 0011 Reserved */
768 /* 0100 X Protection */
769 /* 0111 IFP in emulator mode */
770 /* 1000 W Protection*/
771 /* 1001 Write error*/
772 /* 1011 Reserved*/
773 /* 1100 R Protection*/
774 /* 1101 R Protection*/
775 /* 1111 OEP in emulator mode*/
776 need_page_fault = 1;
777 break;
778 }
779
780 if (need_page_fault) {
781 err_code = fs_err_code[fs];
782 if ((fs == 13) && (mmusr & MMUSR_WF)) /* rd-mod-wr access */
783 err_code |= 2; /* bit1 - write, bit0 - protection */
784 do_page_fault(&fp->ptregs, addr, err_code);
785 }
786 }
787 #endif /* CONFIG_COLDFIRE CONFIG_MMU */
788
buserr_c(struct frame * fp)789 asmlinkage void buserr_c(struct frame *fp)
790 {
791 /* Only set esp0 if coming from user mode */
792 if (user_mode(&fp->ptregs))
793 current->thread.esp0 = (unsigned long) fp;
794
795 #ifdef DEBUG
796 printk ("*** Bus Error *** Format is %x\n", fp->ptregs.format);
797 #endif
798
799 #if defined(CONFIG_COLDFIRE) && defined(CONFIG_MMU)
800 if (CPU_IS_COLDFIRE) {
801 unsigned int fs;
802 fs = (fp->ptregs.vector & 0x3) |
803 ((fp->ptregs.vector & 0xc00) >> 8);
804 switch (fs) {
805 case 0x5:
806 case 0x6:
807 case 0x7:
808 case 0x9:
809 case 0xa:
810 case 0xd:
811 case 0xe:
812 case 0xf:
813 access_errorcf(fs, fp);
814 return;
815 default:
816 break;
817 }
818 }
819 #endif /* CONFIG_COLDFIRE && CONFIG_MMU */
820
821 switch (fp->ptregs.format) {
822 #if defined (CONFIG_M68060)
823 case 4: /* 68060 access error */
824 access_error060 (fp);
825 break;
826 #endif
827 #if defined (CONFIG_M68040)
828 case 0x7: /* 68040 access error */
829 access_error040 (fp);
830 break;
831 #endif
832 #if defined (CPU_M68020_OR_M68030)
833 case 0xa:
834 case 0xb:
835 bus_error030 (fp);
836 break;
837 #endif
838 default:
839 die_if_kernel("bad frame format",&fp->ptregs,0);
840 #ifdef DEBUG
841 printk("Unknown SIGSEGV - 4\n");
842 #endif
843 force_sig(SIGSEGV, current);
844 }
845 }
846
847
848 static int kstack_depth_to_print = 48;
849
show_trace(unsigned long * stack)850 void show_trace(unsigned long *stack)
851 {
852 unsigned long *endstack;
853 unsigned long addr;
854 int i;
855
856 printk("Call Trace:");
857 addr = (unsigned long)stack + THREAD_SIZE - 1;
858 endstack = (unsigned long *)(addr & -THREAD_SIZE);
859 i = 0;
860 while (stack + 1 <= endstack) {
861 addr = *stack++;
862 /*
863 * If the address is either in the text segment of the
864 * kernel, or in the region which contains vmalloc'ed
865 * memory, it *may* be the address of a calling
866 * routine; if so, print it so that someone tracing
867 * down the cause of the crash will be able to figure
868 * out the call path that was taken.
869 */
870 if (__kernel_text_address(addr)) {
871 #ifndef CONFIG_KALLSYMS
872 if (i % 5 == 0)
873 printk("\n ");
874 #endif
875 printk(" [<%08lx>] %pS\n", addr, (void *)addr);
876 i++;
877 }
878 }
879 printk("\n");
880 }
881
show_registers(struct pt_regs * regs)882 void show_registers(struct pt_regs *regs)
883 {
884 struct frame *fp = (struct frame *)regs;
885 mm_segment_t old_fs = get_fs();
886 u16 c, *cp;
887 unsigned long addr;
888 int i;
889
890 print_modules();
891 printk("PC: [<%08lx>] %pS\n", regs->pc, (void *)regs->pc);
892 printk("SR: %04x SP: %p a2: %08lx\n", regs->sr, regs, regs->a2);
893 printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n",
894 regs->d0, regs->d1, regs->d2, regs->d3);
895 printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n",
896 regs->d4, regs->d5, regs->a0, regs->a1);
897
898 printk("Process %s (pid: %d, task=%p)\n",
899 current->comm, task_pid_nr(current), current);
900 addr = (unsigned long)&fp->un;
901 printk("Frame format=%X ", regs->format);
902 switch (regs->format) {
903 case 0x2:
904 printk("instr addr=%08lx\n", fp->un.fmt2.iaddr);
905 addr += sizeof(fp->un.fmt2);
906 break;
907 case 0x3:
908 printk("eff addr=%08lx\n", fp->un.fmt3.effaddr);
909 addr += sizeof(fp->un.fmt3);
910 break;
911 case 0x4:
912 printk((CPU_IS_060 ? "fault addr=%08lx fslw=%08lx\n"
913 : "eff addr=%08lx pc=%08lx\n"),
914 fp->un.fmt4.effaddr, fp->un.fmt4.pc);
915 addr += sizeof(fp->un.fmt4);
916 break;
917 case 0x7:
918 printk("eff addr=%08lx ssw=%04x faddr=%08lx\n",
919 fp->un.fmt7.effaddr, fp->un.fmt7.ssw, fp->un.fmt7.faddr);
920 printk("wb 1 stat/addr/data: %04x %08lx %08lx\n",
921 fp->un.fmt7.wb1s, fp->un.fmt7.wb1a, fp->un.fmt7.wb1dpd0);
922 printk("wb 2 stat/addr/data: %04x %08lx %08lx\n",
923 fp->un.fmt7.wb2s, fp->un.fmt7.wb2a, fp->un.fmt7.wb2d);
924 printk("wb 3 stat/addr/data: %04x %08lx %08lx\n",
925 fp->un.fmt7.wb3s, fp->un.fmt7.wb3a, fp->un.fmt7.wb3d);
926 printk("push data: %08lx %08lx %08lx %08lx\n",
927 fp->un.fmt7.wb1dpd0, fp->un.fmt7.pd1, fp->un.fmt7.pd2,
928 fp->un.fmt7.pd3);
929 addr += sizeof(fp->un.fmt7);
930 break;
931 case 0x9:
932 printk("instr addr=%08lx\n", fp->un.fmt9.iaddr);
933 addr += sizeof(fp->un.fmt9);
934 break;
935 case 0xa:
936 printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
937 fp->un.fmta.ssw, fp->un.fmta.isc, fp->un.fmta.isb,
938 fp->un.fmta.daddr, fp->un.fmta.dobuf);
939 addr += sizeof(fp->un.fmta);
940 break;
941 case 0xb:
942 printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
943 fp->un.fmtb.ssw, fp->un.fmtb.isc, fp->un.fmtb.isb,
944 fp->un.fmtb.daddr, fp->un.fmtb.dobuf);
945 printk("baddr=%08lx dibuf=%08lx ver=%x\n",
946 fp->un.fmtb.baddr, fp->un.fmtb.dibuf, fp->un.fmtb.ver);
947 addr += sizeof(fp->un.fmtb);
948 break;
949 default:
950 printk("\n");
951 }
952 show_stack(NULL, (unsigned long *)addr);
953
954 printk("Code:");
955 set_fs(KERNEL_DS);
956 cp = (u16 *)regs->pc;
957 for (i = -8; i < 16; i++) {
958 if (get_user(c, cp + i) && i >= 0) {
959 printk(" Bad PC value.");
960 break;
961 }
962 printk(i ? " %04x" : " <%04x>", c);
963 }
964 set_fs(old_fs);
965 printk ("\n");
966 }
967
show_stack(struct task_struct * task,unsigned long * stack)968 void show_stack(struct task_struct *task, unsigned long *stack)
969 {
970 unsigned long *p;
971 unsigned long *endstack;
972 int i;
973
974 if (!stack) {
975 if (task)
976 stack = (unsigned long *)task->thread.esp0;
977 else
978 stack = (unsigned long *)&stack;
979 }
980 endstack = (unsigned long *)(((unsigned long)stack + THREAD_SIZE - 1) & -THREAD_SIZE);
981
982 printk("Stack from %08lx:", (unsigned long)stack);
983 p = stack;
984 for (i = 0; i < kstack_depth_to_print; i++) {
985 if (p + 1 > endstack)
986 break;
987 if (i % 8 == 0)
988 printk("\n ");
989 printk(" %08lx", *p++);
990 }
991 printk("\n");
992 show_trace(stack);
993 }
994
995 /*
996 * The architecture-independent backtrace generator
997 */
dump_stack(void)998 void dump_stack(void)
999 {
1000 unsigned long stack;
1001
1002 show_trace(&stack);
1003 }
1004
1005 EXPORT_SYMBOL(dump_stack);
1006
1007 /*
1008 * The vector number returned in the frame pointer may also contain
1009 * the "fs" (Fault Status) bits on ColdFire. These are in the bottom
1010 * 2 bits, and upper 2 bits. So we need to mask out the real vector
1011 * number before using it in comparisons. You don't need to do this on
1012 * real 68k parts, but it won't hurt either.
1013 */
1014
bad_super_trap(struct frame * fp)1015 void bad_super_trap (struct frame *fp)
1016 {
1017 int vector = (fp->ptregs.vector >> 2) & 0xff;
1018
1019 console_verbose();
1020 if (vector < ARRAY_SIZE(vec_names))
1021 printk ("*** %s *** FORMAT=%X\n",
1022 vec_names[vector],
1023 fp->ptregs.format);
1024 else
1025 printk ("*** Exception %d *** FORMAT=%X\n",
1026 vector, fp->ptregs.format);
1027 if (vector == VEC_ADDRERR && CPU_IS_020_OR_030) {
1028 unsigned short ssw = fp->un.fmtb.ssw;
1029
1030 printk ("SSW=%#06x ", ssw);
1031
1032 if (ssw & RC)
1033 printk ("Pipe stage C instruction fault at %#010lx\n",
1034 (fp->ptregs.format) == 0xA ?
1035 fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2);
1036 if (ssw & RB)
1037 printk ("Pipe stage B instruction fault at %#010lx\n",
1038 (fp->ptregs.format) == 0xA ?
1039 fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
1040 if (ssw & DF)
1041 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
1042 ssw & RW ? "read" : "write",
1043 fp->un.fmtb.daddr, space_names[ssw & DFC],
1044 fp->ptregs.pc);
1045 }
1046 printk ("Current process id is %d\n", task_pid_nr(current));
1047 die_if_kernel("BAD KERNEL TRAP", &fp->ptregs, 0);
1048 }
1049
trap_c(struct frame * fp)1050 asmlinkage void trap_c(struct frame *fp)
1051 {
1052 int sig;
1053 int vector = (fp->ptregs.vector >> 2) & 0xff;
1054 siginfo_t info;
1055
1056 if (fp->ptregs.sr & PS_S) {
1057 if (vector == VEC_TRACE) {
1058 /* traced a trapping instruction on a 68020/30,
1059 * real exception will be executed afterwards.
1060 */
1061 } else if (!handle_kernel_fault(&fp->ptregs))
1062 bad_super_trap(fp);
1063 return;
1064 }
1065
1066 /* send the appropriate signal to the user program */
1067 switch (vector) {
1068 case VEC_ADDRERR:
1069 info.si_code = BUS_ADRALN;
1070 sig = SIGBUS;
1071 break;
1072 case VEC_ILLEGAL:
1073 case VEC_LINE10:
1074 case VEC_LINE11:
1075 info.si_code = ILL_ILLOPC;
1076 sig = SIGILL;
1077 break;
1078 case VEC_PRIV:
1079 info.si_code = ILL_PRVOPC;
1080 sig = SIGILL;
1081 break;
1082 case VEC_COPROC:
1083 info.si_code = ILL_COPROC;
1084 sig = SIGILL;
1085 break;
1086 case VEC_TRAP1:
1087 case VEC_TRAP2:
1088 case VEC_TRAP3:
1089 case VEC_TRAP4:
1090 case VEC_TRAP5:
1091 case VEC_TRAP6:
1092 case VEC_TRAP7:
1093 case VEC_TRAP8:
1094 case VEC_TRAP9:
1095 case VEC_TRAP10:
1096 case VEC_TRAP11:
1097 case VEC_TRAP12:
1098 case VEC_TRAP13:
1099 case VEC_TRAP14:
1100 info.si_code = ILL_ILLTRP;
1101 sig = SIGILL;
1102 break;
1103 case VEC_FPBRUC:
1104 case VEC_FPOE:
1105 case VEC_FPNAN:
1106 info.si_code = FPE_FLTINV;
1107 sig = SIGFPE;
1108 break;
1109 case VEC_FPIR:
1110 info.si_code = FPE_FLTRES;
1111 sig = SIGFPE;
1112 break;
1113 case VEC_FPDIVZ:
1114 info.si_code = FPE_FLTDIV;
1115 sig = SIGFPE;
1116 break;
1117 case VEC_FPUNDER:
1118 info.si_code = FPE_FLTUND;
1119 sig = SIGFPE;
1120 break;
1121 case VEC_FPOVER:
1122 info.si_code = FPE_FLTOVF;
1123 sig = SIGFPE;
1124 break;
1125 case VEC_ZERODIV:
1126 info.si_code = FPE_INTDIV;
1127 sig = SIGFPE;
1128 break;
1129 case VEC_CHK:
1130 case VEC_TRAP:
1131 info.si_code = FPE_INTOVF;
1132 sig = SIGFPE;
1133 break;
1134 case VEC_TRACE: /* ptrace single step */
1135 info.si_code = TRAP_TRACE;
1136 sig = SIGTRAP;
1137 break;
1138 case VEC_TRAP15: /* breakpoint */
1139 info.si_code = TRAP_BRKPT;
1140 sig = SIGTRAP;
1141 break;
1142 default:
1143 info.si_code = ILL_ILLOPC;
1144 sig = SIGILL;
1145 break;
1146 }
1147 info.si_signo = sig;
1148 info.si_errno = 0;
1149 switch (fp->ptregs.format) {
1150 default:
1151 info.si_addr = (void *) fp->ptregs.pc;
1152 break;
1153 case 2:
1154 info.si_addr = (void *) fp->un.fmt2.iaddr;
1155 break;
1156 case 7:
1157 info.si_addr = (void *) fp->un.fmt7.effaddr;
1158 break;
1159 case 9:
1160 info.si_addr = (void *) fp->un.fmt9.iaddr;
1161 break;
1162 case 10:
1163 info.si_addr = (void *) fp->un.fmta.daddr;
1164 break;
1165 case 11:
1166 info.si_addr = (void *) fp->un.fmtb.daddr;
1167 break;
1168 }
1169 force_sig_info (sig, &info, current);
1170 }
1171
die_if_kernel(char * str,struct pt_regs * fp,int nr)1172 void die_if_kernel (char *str, struct pt_regs *fp, int nr)
1173 {
1174 if (!(fp->sr & PS_S))
1175 return;
1176
1177 console_verbose();
1178 printk("%s: %08x\n",str,nr);
1179 show_registers(fp);
1180 add_taint(TAINT_DIE);
1181 do_exit(SIGSEGV);
1182 }
1183
set_esp0(unsigned long ssp)1184 asmlinkage void set_esp0(unsigned long ssp)
1185 {
1186 current->thread.esp0 = ssp;
1187 }
1188
1189 /*
1190 * This function is called if an error occur while accessing
1191 * user-space from the fpsp040 code.
1192 */
fpsp040_die(void)1193 asmlinkage void fpsp040_die(void)
1194 {
1195 do_exit(SIGSEGV);
1196 }
1197
1198 #ifdef CONFIG_M68KFPU_EMU
fpemu_signal(int signal,int code,void * addr)1199 asmlinkage void fpemu_signal(int signal, int code, void *addr)
1200 {
1201 siginfo_t info;
1202
1203 info.si_signo = signal;
1204 info.si_errno = 0;
1205 info.si_code = code;
1206 info.si_addr = addr;
1207 force_sig_info(signal, &info, current);
1208 }
1209 #endif
1210