1 /*
2 * Copyright (C) 2000-2007, Axis Communications AB.
3 */
4
5 #include <linux/kernel.h>
6 #include <linux/sched.h>
7 #include <linux/mm.h>
8 #include <linux/smp.h>
9 #include <linux/errno.h>
10 #include <linux/ptrace.h>
11 #include <linux/user.h>
12 #include <linux/signal.h>
13 #include <linux/security.h>
14
15 #include <asm/uaccess.h>
16 #include <asm/page.h>
17 #include <asm/pgtable.h>
18 #include <asm/system.h>
19 #include <asm/processor.h>
20 #include <arch/hwregs/supp_reg.h>
21
22 /*
23 * Determines which bits in CCS the user has access to.
24 * 1 = access, 0 = no access.
25 */
26 #define CCS_MASK 0x00087c00 /* SXNZVC */
27
28 #define SBIT_USER (1 << (S_CCS_BITNR + CCS_SHIFT))
29
30 static int put_debugreg(long pid, unsigned int regno, long data);
31 static long get_debugreg(long pid, unsigned int regno);
32 static unsigned long get_pseudo_pc(struct task_struct *child);
33 void deconfigure_bp(long pid);
34
35 extern unsigned long cris_signal_return_page;
36
37 /*
38 * Get contents of register REGNO in task TASK.
39 */
get_reg(struct task_struct * task,unsigned int regno)40 long get_reg(struct task_struct *task, unsigned int regno)
41 {
42 /* USP is a special case, it's not in the pt_regs struct but
43 * in the tasks thread struct
44 */
45 unsigned long ret;
46
47 if (regno <= PT_EDA)
48 ret = ((unsigned long *)task_pt_regs(task))[regno];
49 else if (regno == PT_USP)
50 ret = task->thread.usp;
51 else if (regno == PT_PPC)
52 ret = get_pseudo_pc(task);
53 else if (regno <= PT_MAX)
54 ret = get_debugreg(task->pid, regno);
55 else
56 ret = 0;
57
58 return ret;
59 }
60
61 /*
62 * Write contents of register REGNO in task TASK.
63 */
put_reg(struct task_struct * task,unsigned int regno,unsigned long data)64 int put_reg(struct task_struct *task, unsigned int regno, unsigned long data)
65 {
66 if (regno <= PT_EDA)
67 ((unsigned long *)task_pt_regs(task))[regno] = data;
68 else if (regno == PT_USP)
69 task->thread.usp = data;
70 else if (regno == PT_PPC) {
71 /* Write pseudo-PC to ERP only if changed. */
72 if (data != get_pseudo_pc(task))
73 task_pt_regs(task)->erp = data;
74 } else if (regno <= PT_MAX)
75 return put_debugreg(task->pid, regno, data);
76 else
77 return -1;
78 return 0;
79 }
80
user_enable_single_step(struct task_struct * child)81 void user_enable_single_step(struct task_struct *child)
82 {
83 unsigned long tmp;
84
85 /*
86 * Set up SPC if not set already (in which case we have no other
87 * choice but to trust it).
88 */
89 if (!get_reg(child, PT_SPC)) {
90 /* In case we're stopped in a delay slot. */
91 tmp = get_reg(child, PT_ERP) & ~1;
92 put_reg(child, PT_SPC, tmp);
93 }
94 tmp = get_reg(child, PT_CCS) | SBIT_USER;
95 put_reg(child, PT_CCS, tmp);
96 }
97
user_disable_single_step(struct task_struct * child)98 void user_disable_single_step(struct task_struct *child)
99 {
100 put_reg(child, PT_SPC, 0);
101
102 if (!get_debugreg(child->pid, PT_BP_CTRL)) {
103 unsigned long tmp;
104 /* If no h/w bp configured, disable S bit. */
105 tmp = get_reg(child, PT_CCS) & ~SBIT_USER;
106 put_reg(child, PT_CCS, tmp);
107 }
108 }
109
110 /*
111 * Called by kernel/ptrace.c when detaching.
112 *
113 * Make sure the single step bit is not set.
114 */
115 void
ptrace_disable(struct task_struct * child)116 ptrace_disable(struct task_struct *child)
117 {
118 unsigned long tmp;
119
120 /* Deconfigure SPC and S-bit. */
121 user_disable_single_step(child);
122 put_reg(child, PT_SPC, 0);
123
124 /* Deconfigure any watchpoints associated with the child. */
125 deconfigure_bp(child->pid);
126 }
127
128
arch_ptrace(struct task_struct * child,long request,unsigned long addr,unsigned long data)129 long arch_ptrace(struct task_struct *child, long request,
130 unsigned long addr, unsigned long data)
131 {
132 int ret;
133 unsigned int regno = addr >> 2;
134 unsigned long __user *datap = (unsigned long __user *)data;
135
136 switch (request) {
137 /* Read word at location address. */
138 case PTRACE_PEEKTEXT:
139 case PTRACE_PEEKDATA: {
140 unsigned long tmp;
141 int copied;
142
143 ret = -EIO;
144
145 /* The signal trampoline page is outside the normal user-addressable
146 * space but still accessible. This is hack to make it possible to
147 * access the signal handler code in GDB.
148 */
149 if ((addr & PAGE_MASK) == cris_signal_return_page) {
150 /* The trampoline page is globally mapped, no page table to traverse.*/
151 tmp = *(unsigned long*)addr;
152 } else {
153 copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
154
155 if (copied != sizeof(tmp))
156 break;
157 }
158
159 ret = put_user(tmp,datap);
160 break;
161 }
162
163 /* Read the word at location address in the USER area. */
164 case PTRACE_PEEKUSR: {
165 unsigned long tmp;
166
167 ret = -EIO;
168 if ((addr & 3) || regno > PT_MAX)
169 break;
170
171 tmp = get_reg(child, regno);
172 ret = put_user(tmp, datap);
173 break;
174 }
175
176 /* Write the word at location address. */
177 case PTRACE_POKETEXT:
178 case PTRACE_POKEDATA:
179 ret = generic_ptrace_pokedata(child, addr, data);
180 break;
181
182 /* Write the word at location address in the USER area. */
183 case PTRACE_POKEUSR:
184 ret = -EIO;
185 if ((addr & 3) || regno > PT_MAX)
186 break;
187
188 if (regno == PT_CCS) {
189 /* don't allow the tracing process to change stuff like
190 * interrupt enable, kernel/user bit, dma enables etc.
191 */
192 data &= CCS_MASK;
193 data |= get_reg(child, PT_CCS) & ~CCS_MASK;
194 }
195 if (put_reg(child, regno, data))
196 break;
197 ret = 0;
198 break;
199
200 /* Get all GP registers from the child. */
201 case PTRACE_GETREGS: {
202 int i;
203 unsigned long tmp;
204
205 for (i = 0; i <= PT_MAX; i++) {
206 tmp = get_reg(child, i);
207
208 if (put_user(tmp, datap)) {
209 ret = -EFAULT;
210 goto out_tsk;
211 }
212
213 datap++;
214 }
215
216 ret = 0;
217 break;
218 }
219
220 /* Set all GP registers in the child. */
221 case PTRACE_SETREGS: {
222 int i;
223 unsigned long tmp;
224
225 for (i = 0; i <= PT_MAX; i++) {
226 if (get_user(tmp, datap)) {
227 ret = -EFAULT;
228 goto out_tsk;
229 }
230
231 if (i == PT_CCS) {
232 tmp &= CCS_MASK;
233 tmp |= get_reg(child, PT_CCS) & ~CCS_MASK;
234 }
235
236 put_reg(child, i, tmp);
237 datap++;
238 }
239
240 ret = 0;
241 break;
242 }
243
244 default:
245 ret = ptrace_request(child, request, addr, data);
246 break;
247 }
248
249 out_tsk:
250 return ret;
251 }
252
do_syscall_trace(void)253 void do_syscall_trace(void)
254 {
255 if (!test_thread_flag(TIF_SYSCALL_TRACE))
256 return;
257
258 if (!(current->ptrace & PT_PTRACED))
259 return;
260
261 /* the 0x80 provides a way for the tracing parent to distinguish
262 between a syscall stop and SIGTRAP delivery */
263 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
264 ? 0x80 : 0));
265
266 /*
267 * This isn't the same as continuing with a signal, but it will do for
268 * normal use.
269 */
270 if (current->exit_code) {
271 send_sig(current->exit_code, current, 1);
272 current->exit_code = 0;
273 }
274 }
275
276 /* Returns the size of an instruction that has a delay slot. */
277
insn_size(struct task_struct * child,unsigned long pc)278 static int insn_size(struct task_struct *child, unsigned long pc)
279 {
280 unsigned long opcode;
281 int copied;
282 int opsize = 0;
283
284 /* Read the opcode at pc (do what PTRACE_PEEKTEXT would do). */
285 copied = access_process_vm(child, pc, &opcode, sizeof(opcode), 0);
286 if (copied != sizeof(opcode))
287 return 0;
288
289 switch ((opcode & 0x0f00) >> 8) {
290 case 0x0:
291 case 0x9:
292 case 0xb:
293 opsize = 2;
294 break;
295 case 0xe:
296 case 0xf:
297 opsize = 6;
298 break;
299 case 0xd:
300 /* Could be 4 or 6; check more bits. */
301 if ((opcode & 0xff) == 0xff)
302 opsize = 4;
303 else
304 opsize = 6;
305 break;
306 default:
307 panic("ERROR: Couldn't find size of opcode 0x%lx at 0x%lx\n",
308 opcode, pc);
309 }
310
311 return opsize;
312 }
313
get_pseudo_pc(struct task_struct * child)314 static unsigned long get_pseudo_pc(struct task_struct *child)
315 {
316 /* Default value for PC is ERP. */
317 unsigned long pc = get_reg(child, PT_ERP);
318
319 if (pc & 0x1) {
320 unsigned long spc = get_reg(child, PT_SPC);
321 /* Delay slot bit set. Report as stopped on proper
322 instruction. */
323 if (spc) {
324 /* Rely on SPC if set. FIXME: We might want to check
325 that EXS indicates we stopped due to a single-step
326 exception. */
327 pc = spc;
328 } else {
329 /* Calculate the PC from the size of the instruction
330 that the delay slot we're in belongs to. */
331 pc += insn_size(child, pc & ~1) - 1;
332 }
333 }
334 return pc;
335 }
336
337 static long bp_owner = 0;
338
339 /* Reachable from exit_thread in signal.c, so not static. */
deconfigure_bp(long pid)340 void deconfigure_bp(long pid)
341 {
342 int bp;
343
344 /* Only deconfigure if the pid is the owner. */
345 if (bp_owner != pid)
346 return;
347
348 for (bp = 0; bp < 6; bp++) {
349 unsigned long tmp;
350 /* Deconfigure start and end address (also gets rid of ownership). */
351 put_debugreg(pid, PT_BP + 3 + (bp * 2), 0);
352 put_debugreg(pid, PT_BP + 4 + (bp * 2), 0);
353
354 /* Deconfigure relevant bits in control register. */
355 tmp = get_debugreg(pid, PT_BP_CTRL) & ~(3 << (2 + (bp * 4)));
356 put_debugreg(pid, PT_BP_CTRL, tmp);
357 }
358 /* No owner now. */
359 bp_owner = 0;
360 }
361
put_debugreg(long pid,unsigned int regno,long data)362 static int put_debugreg(long pid, unsigned int regno, long data)
363 {
364 int ret = 0;
365 register int old_srs;
366
367 #ifdef CONFIG_ETRAX_KGDB
368 /* Ignore write, but pretend it was ok if value is 0
369 (we don't want POKEUSR/SETREGS failing unnessecarily). */
370 return (data == 0) ? ret : -1;
371 #endif
372
373 /* Simple owner management. */
374 if (!bp_owner)
375 bp_owner = pid;
376 else if (bp_owner != pid) {
377 /* Ignore write, but pretend it was ok if value is 0
378 (we don't want POKEUSR/SETREGS failing unnessecarily). */
379 return (data == 0) ? ret : -1;
380 }
381
382 /* Remember old SRS. */
383 SPEC_REG_RD(SPEC_REG_SRS, old_srs);
384 /* Switch to BP bank. */
385 SUPP_BANK_SEL(BANK_BP);
386
387 switch (regno - PT_BP) {
388 case 0:
389 SUPP_REG_WR(0, data); break;
390 case 1:
391 case 2:
392 if (data)
393 ret = -1;
394 break;
395 case 3:
396 SUPP_REG_WR(3, data); break;
397 case 4:
398 SUPP_REG_WR(4, data); break;
399 case 5:
400 SUPP_REG_WR(5, data); break;
401 case 6:
402 SUPP_REG_WR(6, data); break;
403 case 7:
404 SUPP_REG_WR(7, data); break;
405 case 8:
406 SUPP_REG_WR(8, data); break;
407 case 9:
408 SUPP_REG_WR(9, data); break;
409 case 10:
410 SUPP_REG_WR(10, data); break;
411 case 11:
412 SUPP_REG_WR(11, data); break;
413 case 12:
414 SUPP_REG_WR(12, data); break;
415 case 13:
416 SUPP_REG_WR(13, data); break;
417 case 14:
418 SUPP_REG_WR(14, data); break;
419 default:
420 ret = -1;
421 break;
422 }
423
424 /* Restore SRS. */
425 SPEC_REG_WR(SPEC_REG_SRS, old_srs);
426 /* Just for show. */
427 NOP();
428 NOP();
429 NOP();
430
431 return ret;
432 }
433
get_debugreg(long pid,unsigned int regno)434 static long get_debugreg(long pid, unsigned int regno)
435 {
436 register int old_srs;
437 register long data;
438
439 if (pid != bp_owner) {
440 return 0;
441 }
442
443 /* Remember old SRS. */
444 SPEC_REG_RD(SPEC_REG_SRS, old_srs);
445 /* Switch to BP bank. */
446 SUPP_BANK_SEL(BANK_BP);
447
448 switch (regno - PT_BP) {
449 case 0:
450 SUPP_REG_RD(0, data); break;
451 case 1:
452 case 2:
453 /* error return value? */
454 data = 0;
455 break;
456 case 3:
457 SUPP_REG_RD(3, data); break;
458 case 4:
459 SUPP_REG_RD(4, data); break;
460 case 5:
461 SUPP_REG_RD(5, data); break;
462 case 6:
463 SUPP_REG_RD(6, data); break;
464 case 7:
465 SUPP_REG_RD(7, data); break;
466 case 8:
467 SUPP_REG_RD(8, data); break;
468 case 9:
469 SUPP_REG_RD(9, data); break;
470 case 10:
471 SUPP_REG_RD(10, data); break;
472 case 11:
473 SUPP_REG_RD(11, data); break;
474 case 12:
475 SUPP_REG_RD(12, data); break;
476 case 13:
477 SUPP_REG_RD(13, data); break;
478 case 14:
479 SUPP_REG_RD(14, data); break;
480 default:
481 /* error return value? */
482 data = 0;
483 }
484
485 /* Restore SRS. */
486 SPEC_REG_WR(SPEC_REG_SRS, old_srs);
487 /* Just for show. */
488 NOP();
489 NOP();
490 NOP();
491
492 return data;
493 }
494