1 /*
2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
5 *
6 * Licensed under the GPL-2
7 */
8
9 #include <linux/device.h>
10 #include <linux/platform_device.h>
11 #include <linux/mtd/mtd.h>
12 #include <linux/mtd/physmap.h>
13 #include <linux/mtd/partitions.h>
14 #include <linux/spi/spi.h>
15 #include <linux/spi/flash.h>
16 #include <linux/irq.h>
17 #include <linux/interrupt.h>
18 #include <asm/bfin5xx_spi.h>
19 #include <asm/dma.h>
20 #include <asm/gpio.h>
21 #include <asm/nand.h>
22 #include <asm/portmux.h>
23 #include <asm/dpmc.h>
24 #include <linux/input.h>
25
26 /*
27 * Name the Board for the /proc/cpuinfo
28 */
29 const char bfin_board_name[] = "ADI BF538-EZKIT";
30
31 /*
32 * Driver needs to know address, irq and flag pin.
33 */
34
35
36 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
37 static struct platform_device rtc_device = {
38 .name = "rtc-bfin",
39 .id = -1,
40 };
41 #endif
42
43 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
44 #ifdef CONFIG_SERIAL_BFIN_UART0
45 static struct resource bfin_uart0_resources[] = {
46 {
47 .start = UART0_THR,
48 .end = UART0_GCTL+2,
49 .flags = IORESOURCE_MEM,
50 },
51 {
52 .start = IRQ_UART0_TX,
53 .end = IRQ_UART0_TX,
54 .flags = IORESOURCE_IRQ,
55 },
56 {
57 .start = IRQ_UART0_RX,
58 .end = IRQ_UART0_RX,
59 .flags = IORESOURCE_IRQ,
60 },
61 {
62 .start = IRQ_UART0_ERROR,
63 .end = IRQ_UART0_ERROR,
64 .flags = IORESOURCE_IRQ,
65 },
66 {
67 .start = CH_UART0_TX,
68 .end = CH_UART0_TX,
69 .flags = IORESOURCE_DMA,
70 },
71 {
72 .start = CH_UART0_RX,
73 .end = CH_UART0_RX,
74 .flags = IORESOURCE_DMA,
75 },
76 #ifdef CONFIG_BFIN_UART0_CTSRTS
77 { /* CTS pin */
78 .start = GPIO_PG7,
79 .end = GPIO_PG7,
80 .flags = IORESOURCE_IO,
81 },
82 { /* RTS pin */
83 .start = GPIO_PG6,
84 .end = GPIO_PG6,
85 .flags = IORESOURCE_IO,
86 },
87 #endif
88 };
89
90 static unsigned short bfin_uart0_peripherals[] = {
91 P_UART0_TX, P_UART0_RX, 0
92 };
93
94 static struct platform_device bfin_uart0_device = {
95 .name = "bfin-uart",
96 .id = 0,
97 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
98 .resource = bfin_uart0_resources,
99 .dev = {
100 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
101 },
102 };
103 #endif
104 #ifdef CONFIG_SERIAL_BFIN_UART1
105 static struct resource bfin_uart1_resources[] = {
106 {
107 .start = UART1_THR,
108 .end = UART1_GCTL+2,
109 .flags = IORESOURCE_MEM,
110 },
111 {
112 .start = IRQ_UART1_TX,
113 .end = IRQ_UART1_TX,
114 .flags = IORESOURCE_IRQ,
115 },
116 {
117 .start = IRQ_UART1_RX,
118 .end = IRQ_UART1_RX,
119 .flags = IORESOURCE_IRQ,
120 },
121 {
122 .start = IRQ_UART1_ERROR,
123 .end = IRQ_UART1_ERROR,
124 .flags = IORESOURCE_IRQ,
125 },
126 {
127 .start = CH_UART1_TX,
128 .end = CH_UART1_TX,
129 .flags = IORESOURCE_DMA,
130 },
131 {
132 .start = CH_UART1_RX,
133 .end = CH_UART1_RX,
134 .flags = IORESOURCE_DMA,
135 },
136 };
137
138 static unsigned short bfin_uart1_peripherals[] = {
139 P_UART1_TX, P_UART1_RX, 0
140 };
141
142 static struct platform_device bfin_uart1_device = {
143 .name = "bfin-uart",
144 .id = 1,
145 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
146 .resource = bfin_uart1_resources,
147 .dev = {
148 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
149 },
150 };
151 #endif
152 #ifdef CONFIG_SERIAL_BFIN_UART2
153 static struct resource bfin_uart2_resources[] = {
154 {
155 .start = UART2_THR,
156 .end = UART2_GCTL+2,
157 .flags = IORESOURCE_MEM,
158 },
159 {
160 .start = IRQ_UART2_TX,
161 .end = IRQ_UART2_TX,
162 .flags = IORESOURCE_IRQ,
163 },
164 {
165 .start = IRQ_UART2_RX,
166 .end = IRQ_UART2_RX,
167 .flags = IORESOURCE_IRQ,
168 },
169 {
170 .start = IRQ_UART2_ERROR,
171 .end = IRQ_UART2_ERROR,
172 .flags = IORESOURCE_IRQ,
173 },
174 {
175 .start = CH_UART2_TX,
176 .end = CH_UART2_TX,
177 .flags = IORESOURCE_DMA,
178 },
179 {
180 .start = CH_UART2_RX,
181 .end = CH_UART2_RX,
182 .flags = IORESOURCE_DMA,
183 },
184 };
185
186 static unsigned short bfin_uart2_peripherals[] = {
187 P_UART2_TX, P_UART2_RX, 0
188 };
189
190 static struct platform_device bfin_uart2_device = {
191 .name = "bfin-uart",
192 .id = 2,
193 .num_resources = ARRAY_SIZE(bfin_uart2_resources),
194 .resource = bfin_uart2_resources,
195 .dev = {
196 .platform_data = &bfin_uart2_peripherals, /* Passed to driver */
197 },
198 };
199 #endif
200 #endif
201
202 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
203 #ifdef CONFIG_BFIN_SIR0
204 static struct resource bfin_sir0_resources[] = {
205 {
206 .start = 0xFFC00400,
207 .end = 0xFFC004FF,
208 .flags = IORESOURCE_MEM,
209 },
210 {
211 .start = IRQ_UART0_RX,
212 .end = IRQ_UART0_RX+1,
213 .flags = IORESOURCE_IRQ,
214 },
215 {
216 .start = CH_UART0_RX,
217 .end = CH_UART0_RX+1,
218 .flags = IORESOURCE_DMA,
219 },
220 };
221 static struct platform_device bfin_sir0_device = {
222 .name = "bfin_sir",
223 .id = 0,
224 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
225 .resource = bfin_sir0_resources,
226 };
227 #endif
228 #ifdef CONFIG_BFIN_SIR1
229 static struct resource bfin_sir1_resources[] = {
230 {
231 .start = 0xFFC02000,
232 .end = 0xFFC020FF,
233 .flags = IORESOURCE_MEM,
234 },
235 {
236 .start = IRQ_UART1_RX,
237 .end = IRQ_UART1_RX+1,
238 .flags = IORESOURCE_IRQ,
239 },
240 {
241 .start = CH_UART1_RX,
242 .end = CH_UART1_RX+1,
243 .flags = IORESOURCE_DMA,
244 },
245 };
246 static struct platform_device bfin_sir1_device = {
247 .name = "bfin_sir",
248 .id = 1,
249 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
250 .resource = bfin_sir1_resources,
251 };
252 #endif
253 #ifdef CONFIG_BFIN_SIR2
254 static struct resource bfin_sir2_resources[] = {
255 {
256 .start = 0xFFC02100,
257 .end = 0xFFC021FF,
258 .flags = IORESOURCE_MEM,
259 },
260 {
261 .start = IRQ_UART2_RX,
262 .end = IRQ_UART2_RX+1,
263 .flags = IORESOURCE_IRQ,
264 },
265 {
266 .start = CH_UART2_RX,
267 .end = CH_UART2_RX+1,
268 .flags = IORESOURCE_DMA,
269 },
270 };
271 static struct platform_device bfin_sir2_device = {
272 .name = "bfin_sir",
273 .id = 2,
274 .num_resources = ARRAY_SIZE(bfin_sir2_resources),
275 .resource = bfin_sir2_resources,
276 };
277 #endif
278 #endif
279
280 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
281 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
282 static struct resource bfin_sport0_uart_resources[] = {
283 {
284 .start = SPORT0_TCR1,
285 .end = SPORT0_MRCS3+4,
286 .flags = IORESOURCE_MEM,
287 },
288 {
289 .start = IRQ_SPORT0_RX,
290 .end = IRQ_SPORT0_RX+1,
291 .flags = IORESOURCE_IRQ,
292 },
293 {
294 .start = IRQ_SPORT0_ERROR,
295 .end = IRQ_SPORT0_ERROR,
296 .flags = IORESOURCE_IRQ,
297 },
298 };
299
300 static unsigned short bfin_sport0_peripherals[] = {
301 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
302 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
303 };
304
305 static struct platform_device bfin_sport0_uart_device = {
306 .name = "bfin-sport-uart",
307 .id = 0,
308 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
309 .resource = bfin_sport0_uart_resources,
310 .dev = {
311 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
312 },
313 };
314 #endif
315 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
316 static struct resource bfin_sport1_uart_resources[] = {
317 {
318 .start = SPORT1_TCR1,
319 .end = SPORT1_MRCS3+4,
320 .flags = IORESOURCE_MEM,
321 },
322 {
323 .start = IRQ_SPORT1_RX,
324 .end = IRQ_SPORT1_RX+1,
325 .flags = IORESOURCE_IRQ,
326 },
327 {
328 .start = IRQ_SPORT1_ERROR,
329 .end = IRQ_SPORT1_ERROR,
330 .flags = IORESOURCE_IRQ,
331 },
332 };
333
334 static unsigned short bfin_sport1_peripherals[] = {
335 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
336 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
337 };
338
339 static struct platform_device bfin_sport1_uart_device = {
340 .name = "bfin-sport-uart",
341 .id = 1,
342 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
343 .resource = bfin_sport1_uart_resources,
344 .dev = {
345 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
346 },
347 };
348 #endif
349 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
350 static struct resource bfin_sport2_uart_resources[] = {
351 {
352 .start = SPORT2_TCR1,
353 .end = SPORT2_MRCS3+4,
354 .flags = IORESOURCE_MEM,
355 },
356 {
357 .start = IRQ_SPORT2_RX,
358 .end = IRQ_SPORT2_RX+1,
359 .flags = IORESOURCE_IRQ,
360 },
361 {
362 .start = IRQ_SPORT2_ERROR,
363 .end = IRQ_SPORT2_ERROR,
364 .flags = IORESOURCE_IRQ,
365 },
366 };
367
368 static unsigned short bfin_sport2_peripherals[] = {
369 P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
370 P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
371 };
372
373 static struct platform_device bfin_sport2_uart_device = {
374 .name = "bfin-sport-uart",
375 .id = 2,
376 .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
377 .resource = bfin_sport2_uart_resources,
378 .dev = {
379 .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
380 },
381 };
382 #endif
383 #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
384 static struct resource bfin_sport3_uart_resources[] = {
385 {
386 .start = SPORT3_TCR1,
387 .end = SPORT3_MRCS3+4,
388 .flags = IORESOURCE_MEM,
389 },
390 {
391 .start = IRQ_SPORT3_RX,
392 .end = IRQ_SPORT3_RX+1,
393 .flags = IORESOURCE_IRQ,
394 },
395 {
396 .start = IRQ_SPORT3_ERROR,
397 .end = IRQ_SPORT3_ERROR,
398 .flags = IORESOURCE_IRQ,
399 },
400 };
401
402 static unsigned short bfin_sport3_peripherals[] = {
403 P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS,
404 P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0
405 };
406
407 static struct platform_device bfin_sport3_uart_device = {
408 .name = "bfin-sport-uart",
409 .id = 3,
410 .num_resources = ARRAY_SIZE(bfin_sport3_uart_resources),
411 .resource = bfin_sport3_uart_resources,
412 .dev = {
413 .platform_data = &bfin_sport3_peripherals, /* Passed to driver */
414 },
415 };
416 #endif
417 #endif
418
419 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
420 static unsigned short bfin_can_peripherals[] = {
421 P_CAN0_RX, P_CAN0_TX, 0
422 };
423
424 static struct resource bfin_can_resources[] = {
425 {
426 .start = 0xFFC02A00,
427 .end = 0xFFC02FFF,
428 .flags = IORESOURCE_MEM,
429 },
430 {
431 .start = IRQ_CAN_RX,
432 .end = IRQ_CAN_RX,
433 .flags = IORESOURCE_IRQ,
434 },
435 {
436 .start = IRQ_CAN_TX,
437 .end = IRQ_CAN_TX,
438 .flags = IORESOURCE_IRQ,
439 },
440 {
441 .start = IRQ_CAN_ERROR,
442 .end = IRQ_CAN_ERROR,
443 .flags = IORESOURCE_IRQ,
444 },
445 };
446
447 static struct platform_device bfin_can_device = {
448 .name = "bfin_can",
449 .num_resources = ARRAY_SIZE(bfin_can_resources),
450 .resource = bfin_can_resources,
451 .dev = {
452 .platform_data = &bfin_can_peripherals, /* Passed to driver */
453 },
454 };
455 #endif
456
457 /*
458 * USB-LAN EzExtender board
459 * Driver needs to know address, irq and flag pin.
460 */
461 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
462 #include <linux/smc91x.h>
463
464 static struct smc91x_platdata smc91x_info = {
465 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
466 .leda = RPC_LED_100_10,
467 .ledb = RPC_LED_TX_RX,
468 };
469
470 static struct resource smc91x_resources[] = {
471 {
472 .name = "smc91x-regs",
473 .start = 0x20310300,
474 .end = 0x20310300 + 16,
475 .flags = IORESOURCE_MEM,
476 }, {
477 .start = IRQ_PF0,
478 .end = IRQ_PF0,
479 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
480 },
481 };
482 static struct platform_device smc91x_device = {
483 .name = "smc91x",
484 .id = 0,
485 .num_resources = ARRAY_SIZE(smc91x_resources),
486 .resource = smc91x_resources,
487 .dev = {
488 .platform_data = &smc91x_info,
489 },
490 };
491 #endif
492
493 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
494 /* all SPI peripherals info goes here */
495 #if defined(CONFIG_MTD_M25P80) \
496 || defined(CONFIG_MTD_M25P80_MODULE)
497 /* SPI flash chip (m25p16) */
498 static struct mtd_partition bfin_spi_flash_partitions[] = {
499 {
500 .name = "bootloader(spi)",
501 .size = 0x00040000,
502 .offset = 0,
503 .mask_flags = MTD_CAP_ROM
504 }, {
505 .name = "linux kernel(spi)",
506 .size = 0x1c0000,
507 .offset = 0x40000
508 }
509 };
510
511 static struct flash_platform_data bfin_spi_flash_data = {
512 .name = "m25p80",
513 .parts = bfin_spi_flash_partitions,
514 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
515 .type = "m25p16",
516 };
517
518 static struct bfin5xx_spi_chip spi_flash_chip_info = {
519 .enable_dma = 0, /* use dma transfer with this chip*/
520 };
521 #endif
522
523 #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
524 #include <linux/spi/ad7879.h>
525 static const struct ad7879_platform_data bfin_ad7879_ts_info = {
526 .model = 7879, /* Model = AD7879 */
527 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
528 .pressure_max = 10000,
529 .pressure_min = 0,
530 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
531 .acquisition_time = 1, /* 4us acquisition time per sample */
532 .median = 2, /* do 8 measurements */
533 .averaging = 1, /* take the average of 4 middle samples */
534 .pen_down_acc_interval = 255, /* 9.4 ms */
535 .gpio_export = 1, /* Export GPIO to gpiolib */
536 .gpio_base = -1, /* Dynamic allocation */
537 };
538 #endif
539
540 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
541 #include <asm/bfin-lq035q1.h>
542
543 static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
544 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
545 .ppi_mode = USE_RGB565_16_BIT_PPI,
546 .use_bl = 0, /* let something else control the LCD Blacklight */
547 .gpio_bl = GPIO_PF7,
548 };
549
550 static struct resource bfin_lq035q1_resources[] = {
551 {
552 .start = IRQ_PPI_ERROR,
553 .end = IRQ_PPI_ERROR,
554 .flags = IORESOURCE_IRQ,
555 },
556 };
557
558 static struct platform_device bfin_lq035q1_device = {
559 .name = "bfin-lq035q1",
560 .id = -1,
561 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
562 .resource = bfin_lq035q1_resources,
563 .dev = {
564 .platform_data = &bfin_lq035q1_data,
565 },
566 };
567 #endif
568
569 static struct spi_board_info bf538_spi_board_info[] __initdata = {
570 #if defined(CONFIG_MTD_M25P80) \
571 || defined(CONFIG_MTD_M25P80_MODULE)
572 {
573 /* the modalias must be the same as spi device driver name */
574 .modalias = "m25p80", /* Name of spi_driver for this device */
575 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
576 .bus_num = 0, /* Framework bus number */
577 .chip_select = 1, /* SPI_SSEL1*/
578 .platform_data = &bfin_spi_flash_data,
579 .controller_data = &spi_flash_chip_info,
580 .mode = SPI_MODE_3,
581 },
582 #endif
583 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
584 {
585 .modalias = "ad7879",
586 .platform_data = &bfin_ad7879_ts_info,
587 .irq = IRQ_PF3,
588 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
589 .bus_num = 0,
590 .chip_select = 1,
591 .mode = SPI_CPHA | SPI_CPOL,
592 },
593 #endif
594 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
595 {
596 .modalias = "bfin-lq035q1-spi",
597 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
598 .bus_num = 0,
599 .chip_select = 2,
600 .mode = SPI_CPHA | SPI_CPOL,
601 },
602 #endif
603 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
604 {
605 .modalias = "spidev",
606 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
607 .bus_num = 0,
608 .chip_select = 1,
609 },
610 #endif
611 };
612
613 /* SPI (0) */
614 static struct resource bfin_spi0_resource[] = {
615 [0] = {
616 .start = SPI0_REGBASE,
617 .end = SPI0_REGBASE + 0xFF,
618 .flags = IORESOURCE_MEM,
619 },
620 [1] = {
621 .start = CH_SPI0,
622 .end = CH_SPI0,
623 .flags = IORESOURCE_DMA,
624 },
625 [2] = {
626 .start = IRQ_SPI0,
627 .end = IRQ_SPI0,
628 .flags = IORESOURCE_IRQ,
629 }
630 };
631
632 /* SPI (1) */
633 static struct resource bfin_spi1_resource[] = {
634 [0] = {
635 .start = SPI1_REGBASE,
636 .end = SPI1_REGBASE + 0xFF,
637 .flags = IORESOURCE_MEM,
638 },
639 [1] = {
640 .start = CH_SPI1,
641 .end = CH_SPI1,
642 .flags = IORESOURCE_DMA,
643 },
644 [2] = {
645 .start = IRQ_SPI1,
646 .end = IRQ_SPI1,
647 .flags = IORESOURCE_IRQ,
648 }
649 };
650
651 /* SPI (2) */
652 static struct resource bfin_spi2_resource[] = {
653 [0] = {
654 .start = SPI2_REGBASE,
655 .end = SPI2_REGBASE + 0xFF,
656 .flags = IORESOURCE_MEM,
657 },
658 [1] = {
659 .start = CH_SPI2,
660 .end = CH_SPI2,
661 .flags = IORESOURCE_DMA,
662 },
663 [2] = {
664 .start = IRQ_SPI2,
665 .end = IRQ_SPI2,
666 .flags = IORESOURCE_IRQ,
667 }
668 };
669
670 /* SPI controller data */
671 static struct bfin5xx_spi_master bf538_spi_master_info0 = {
672 .num_chipselect = 8,
673 .enable_dma = 1, /* master has the ability to do dma transfer */
674 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
675 };
676
677 static struct platform_device bf538_spi_master0 = {
678 .name = "bfin-spi",
679 .id = 0, /* Bus number */
680 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
681 .resource = bfin_spi0_resource,
682 .dev = {
683 .platform_data = &bf538_spi_master_info0, /* Passed to driver */
684 },
685 };
686
687 static struct bfin5xx_spi_master bf538_spi_master_info1 = {
688 .num_chipselect = 2,
689 .enable_dma = 1, /* master has the ability to do dma transfer */
690 .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
691 };
692
693 static struct platform_device bf538_spi_master1 = {
694 .name = "bfin-spi",
695 .id = 1, /* Bus number */
696 .num_resources = ARRAY_SIZE(bfin_spi1_resource),
697 .resource = bfin_spi1_resource,
698 .dev = {
699 .platform_data = &bf538_spi_master_info1, /* Passed to driver */
700 },
701 };
702
703 static struct bfin5xx_spi_master bf538_spi_master_info2 = {
704 .num_chipselect = 2,
705 .enable_dma = 1, /* master has the ability to do dma transfer */
706 .pin_req = {P_SPI2_SCK, P_SPI2_MISO, P_SPI2_MOSI, 0},
707 };
708
709 static struct platform_device bf538_spi_master2 = {
710 .name = "bfin-spi",
711 .id = 2, /* Bus number */
712 .num_resources = ARRAY_SIZE(bfin_spi2_resource),
713 .resource = bfin_spi2_resource,
714 .dev = {
715 .platform_data = &bf538_spi_master_info2, /* Passed to driver */
716 },
717 };
718
719 #endif /* spi master and devices */
720
721 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
722 static struct resource bfin_twi0_resource[] = {
723 [0] = {
724 .start = TWI0_REGBASE,
725 .end = TWI0_REGBASE + 0xFF,
726 .flags = IORESOURCE_MEM,
727 },
728 [1] = {
729 .start = IRQ_TWI0,
730 .end = IRQ_TWI0,
731 .flags = IORESOURCE_IRQ,
732 },
733 };
734
735 static struct platform_device i2c_bfin_twi0_device = {
736 .name = "i2c-bfin-twi",
737 .id = 0,
738 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
739 .resource = bfin_twi0_resource,
740 };
741
742 #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
743 static struct resource bfin_twi1_resource[] = {
744 [0] = {
745 .start = TWI1_REGBASE,
746 .end = TWI1_REGBASE + 0xFF,
747 .flags = IORESOURCE_MEM,
748 },
749 [1] = {
750 .start = IRQ_TWI1,
751 .end = IRQ_TWI1,
752 .flags = IORESOURCE_IRQ,
753 },
754 };
755
756 static struct platform_device i2c_bfin_twi1_device = {
757 .name = "i2c-bfin-twi",
758 .id = 1,
759 .num_resources = ARRAY_SIZE(bfin_twi1_resource),
760 .resource = bfin_twi1_resource,
761 };
762 #endif
763 #endif
764
765 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
766 #include <linux/gpio_keys.h>
767
768 static struct gpio_keys_button bfin_gpio_keys_table[] = {
769 {BTN_0, GPIO_PC7, 1, "gpio-keys: BTN0"},
770 };
771
772 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
773 .buttons = bfin_gpio_keys_table,
774 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
775 };
776
777 static struct platform_device bfin_device_gpiokeys = {
778 .name = "gpio-keys",
779 .dev = {
780 .platform_data = &bfin_gpio_keys_data,
781 },
782 };
783 #endif
784
785 static const unsigned int cclk_vlev_datasheet[] =
786 {
787 /*
788 * Internal VLEV BF538SBBC1533
789 ****temporarily using these values until data sheet is updated
790 */
791 VRPAIR(VLEV_100, 150000000),
792 VRPAIR(VLEV_100, 250000000),
793 VRPAIR(VLEV_110, 276000000),
794 VRPAIR(VLEV_115, 301000000),
795 VRPAIR(VLEV_120, 525000000),
796 VRPAIR(VLEV_125, 550000000),
797 VRPAIR(VLEV_130, 600000000),
798 };
799
800 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
801 .tuple_tab = cclk_vlev_datasheet,
802 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
803 .vr_settling_time = 25 /* us */,
804 };
805
806 static struct platform_device bfin_dpmc = {
807 .name = "bfin dpmc",
808 .dev = {
809 .platform_data = &bfin_dmpc_vreg_data,
810 },
811 };
812
813 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
814 static struct mtd_partition ezkit_partitions[] = {
815 {
816 .name = "bootloader(nor)",
817 .size = 0x40000,
818 .offset = 0,
819 }, {
820 .name = "linux kernel(nor)",
821 .size = 0x180000,
822 .offset = MTDPART_OFS_APPEND,
823 }, {
824 .name = "file system(nor)",
825 .size = MTDPART_SIZ_FULL,
826 .offset = MTDPART_OFS_APPEND,
827 }
828 };
829
830 static struct physmap_flash_data ezkit_flash_data = {
831 .width = 2,
832 .parts = ezkit_partitions,
833 .nr_parts = ARRAY_SIZE(ezkit_partitions),
834 };
835
836 static struct resource ezkit_flash_resource = {
837 .start = 0x20000000,
838 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
839 .end = 0x202fffff,
840 #else
841 .end = 0x203fffff,
842 #endif
843 .flags = IORESOURCE_MEM,
844 };
845
846 static struct platform_device ezkit_flash_device = {
847 .name = "physmap-flash",
848 .id = 0,
849 .dev = {
850 .platform_data = &ezkit_flash_data,
851 },
852 .num_resources = 1,
853 .resource = &ezkit_flash_resource,
854 };
855 #endif
856
857 static struct platform_device *cm_bf538_devices[] __initdata = {
858
859 &bfin_dpmc,
860
861 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
862 &rtc_device,
863 #endif
864
865 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
866 #ifdef CONFIG_SERIAL_BFIN_UART0
867 &bfin_uart0_device,
868 #endif
869 #ifdef CONFIG_SERIAL_BFIN_UART1
870 &bfin_uart1_device,
871 #endif
872 #ifdef CONFIG_SERIAL_BFIN_UART2
873 &bfin_uart2_device,
874 #endif
875 #endif
876
877 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
878 &bf538_spi_master0,
879 &bf538_spi_master1,
880 &bf538_spi_master2,
881 #endif
882
883 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
884 &i2c_bfin_twi0_device,
885 &i2c_bfin_twi1_device,
886 #endif
887
888 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
889 #ifdef CONFIG_BFIN_SIR0
890 &bfin_sir0_device,
891 #endif
892 #ifdef CONFIG_BFIN_SIR1
893 &bfin_sir1_device,
894 #endif
895 #ifdef CONFIG_BFIN_SIR2
896 &bfin_sir2_device,
897 #endif
898 #endif
899
900 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
901 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
902 &bfin_sport0_uart_device,
903 #endif
904 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
905 &bfin_sport1_uart_device,
906 #endif
907 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
908 &bfin_sport2_uart_device,
909 #endif
910 #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
911 &bfin_sport3_uart_device,
912 #endif
913 #endif
914
915 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
916 &bfin_can_device,
917 #endif
918
919 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
920 &smc91x_device,
921 #endif
922
923 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
924 &bfin_lq035q1_device,
925 #endif
926
927 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
928 &bfin_device_gpiokeys,
929 #endif
930
931 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
932 &ezkit_flash_device,
933 #endif
934 };
935
ezkit_init(void)936 static int __init ezkit_init(void)
937 {
938 printk(KERN_INFO "%s(): registering device resources\n", __func__);
939 platform_add_devices(cm_bf538_devices, ARRAY_SIZE(cm_bf538_devices));
940
941 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
942 spi_register_board_info(bf538_spi_board_info,
943 ARRAY_SIZE(bf538_spi_board_info));
944 #endif
945
946 return 0;
947 }
948
949 arch_initcall(ezkit_init);
950
951 static struct platform_device *ezkit_early_devices[] __initdata = {
952 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
953 #ifdef CONFIG_SERIAL_BFIN_UART0
954 &bfin_uart0_device,
955 #endif
956 #ifdef CONFIG_SERIAL_BFIN_UART1
957 &bfin_uart1_device,
958 #endif
959 #ifdef CONFIG_SERIAL_BFIN_UART2
960 &bfin_uart2_device,
961 #endif
962 #endif
963
964 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
965 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
966 &bfin_sport0_uart_device,
967 #endif
968 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
969 &bfin_sport1_uart_device,
970 #endif
971 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
972 &bfin_sport2_uart_device,
973 #endif
974 #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
975 &bfin_sport3_uart_device,
976 #endif
977 #endif
978 };
979
native_machine_early_platform_add_devices(void)980 void __init native_machine_early_platform_add_devices(void)
981 {
982 printk(KERN_INFO "register early platform devices\n");
983 early_platform_add_devices(ezkit_early_devices,
984 ARRAY_SIZE(ezkit_early_devices));
985 }
986