1 /*
2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2008-2009 Bluetechnix
4 * 2005 National ICT Australia (NICTA)
5 * Aidan Williams <aidan@nicta.com.au>
6 *
7 * Licensed under the GPL-2 or later.
8 */
9
10 #include <linux/device.h>
11 #include <linux/export.h>
12 #include <linux/etherdevice.h>
13 #include <linux/platform_device.h>
14 #include <linux/mtd/mtd.h>
15 #include <linux/mtd/partitions.h>
16 #include <linux/mtd/physmap.h>
17 #include <linux/spi/spi.h>
18 #include <linux/spi/flash.h>
19 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
20 #include <linux/usb/isp1362.h>
21 #endif
22 #include <linux/ata_platform.h>
23 #include <linux/irq.h>
24 #include <asm/dma.h>
25 #include <asm/bfin5xx_spi.h>
26 #include <asm/portmux.h>
27 #include <asm/dpmc.h>
28
29 /*
30 * Name the Board for the /proc/cpuinfo
31 */
32 const char bfin_board_name[] = "Bluetechnix CM BF537E";
33
34 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
35 /* all SPI peripherals info goes here */
36
37 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
38 static struct mtd_partition bfin_spi_flash_partitions[] = {
39 {
40 .name = "bootloader(spi)",
41 .size = 0x00020000,
42 .offset = 0,
43 .mask_flags = MTD_CAP_ROM
44 }, {
45 .name = "linux kernel(spi)",
46 .size = 0xe0000,
47 .offset = 0x20000
48 }, {
49 .name = "file system(spi)",
50 .size = 0x700000,
51 .offset = 0x00100000,
52 }
53 };
54
55 static struct flash_platform_data bfin_spi_flash_data = {
56 .name = "m25p80",
57 .parts = bfin_spi_flash_partitions,
58 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
59 .type = "m25p64",
60 };
61
62 /* SPI flash chip (m25p64) */
63 static struct bfin5xx_spi_chip spi_flash_chip_info = {
64 .enable_dma = 0, /* use dma transfer with this chip*/
65 };
66 #endif
67
68 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
69 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
70 .enable_dma = 0,
71 };
72 #endif
73
74 static struct spi_board_info bfin_spi_board_info[] __initdata = {
75 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
76 {
77 /* the modalias must be the same as spi device driver name */
78 .modalias = "m25p80", /* Name of spi_driver for this device */
79 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
80 .bus_num = 0, /* Framework bus number */
81 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
82 .platform_data = &bfin_spi_flash_data,
83 .controller_data = &spi_flash_chip_info,
84 .mode = SPI_MODE_3,
85 },
86 #endif
87
88 #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
89 {
90 .modalias = "ad183x",
91 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
92 .bus_num = 0,
93 .chip_select = 4,
94 },
95 #endif
96
97 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
98 {
99 .modalias = "mmc_spi",
100 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
101 .bus_num = 0,
102 .chip_select = 1,
103 .controller_data = &mmc_spi_chip_info,
104 .mode = SPI_MODE_3,
105 },
106 #endif
107 };
108
109 /* SPI (0) */
110 static struct resource bfin_spi0_resource[] = {
111 [0] = {
112 .start = SPI0_REGBASE,
113 .end = SPI0_REGBASE + 0xFF,
114 .flags = IORESOURCE_MEM,
115 },
116 [1] = {
117 .start = CH_SPI,
118 .end = CH_SPI,
119 .flags = IORESOURCE_DMA,
120 },
121 [2] = {
122 .start = IRQ_SPI,
123 .end = IRQ_SPI,
124 .flags = IORESOURCE_IRQ,
125 },
126 };
127
128 /* SPI controller data */
129 static struct bfin5xx_spi_master bfin_spi0_info = {
130 .num_chipselect = 8,
131 .enable_dma = 1, /* master has the ability to do dma transfer */
132 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
133 };
134
135 static struct platform_device bfin_spi0_device = {
136 .name = "bfin-spi",
137 .id = 0, /* Bus number */
138 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
139 .resource = bfin_spi0_resource,
140 .dev = {
141 .platform_data = &bfin_spi0_info, /* Passed to driver */
142 },
143 };
144 #endif /* spi master and devices */
145
146 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
147 static struct platform_device rtc_device = {
148 .name = "rtc-bfin",
149 .id = -1,
150 };
151 #endif
152
153 #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
154 static struct platform_device hitachi_fb_device = {
155 .name = "hitachi-tx09",
156 };
157 #endif
158
159 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
160 #include <linux/smc91x.h>
161
162 static struct smc91x_platdata smc91x_info = {
163 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
164 .leda = RPC_LED_100_10,
165 .ledb = RPC_LED_TX_RX,
166 };
167
168 static struct resource smc91x_resources[] = {
169 {
170 .start = 0x20200300,
171 .end = 0x20200300 + 16,
172 .flags = IORESOURCE_MEM,
173 }, {
174 .start = IRQ_PF14,
175 .end = IRQ_PF14,
176 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
177 },
178 };
179
180 static struct platform_device smc91x_device = {
181 .name = "smc91x",
182 .id = 0,
183 .num_resources = ARRAY_SIZE(smc91x_resources),
184 .resource = smc91x_resources,
185 .dev = {
186 .platform_data = &smc91x_info,
187 },
188 };
189 #endif
190
191 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
192 static struct resource isp1362_hcd_resources[] = {
193 {
194 .start = 0x20308000,
195 .end = 0x20308000,
196 .flags = IORESOURCE_MEM,
197 }, {
198 .start = 0x20308004,
199 .end = 0x20308004,
200 .flags = IORESOURCE_MEM,
201 }, {
202 .start = IRQ_PG15,
203 .end = IRQ_PG15,
204 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
205 },
206 };
207
208 static struct isp1362_platform_data isp1362_priv = {
209 .sel15Kres = 1,
210 .clknotstop = 0,
211 .oc_enable = 0,
212 .int_act_high = 0,
213 .int_edge_triggered = 0,
214 .remote_wakeup_connected = 0,
215 .no_power_switching = 1,
216 .power_switching_mode = 0,
217 };
218
219 static struct platform_device isp1362_hcd_device = {
220 .name = "isp1362-hcd",
221 .id = 0,
222 .dev = {
223 .platform_data = &isp1362_priv,
224 },
225 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
226 .resource = isp1362_hcd_resources,
227 };
228 #endif
229
230 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
231 static struct resource net2272_bfin_resources[] = {
232 {
233 .start = 0x20300000,
234 .end = 0x20300000 + 0x100,
235 .flags = IORESOURCE_MEM,
236 }, {
237 .start = IRQ_PG13,
238 .end = IRQ_PG13,
239 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
240 },
241 };
242
243 static struct platform_device net2272_bfin_device = {
244 .name = "net2272",
245 .id = -1,
246 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
247 .resource = net2272_bfin_resources,
248 };
249 #endif
250
251 #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
252 static struct mtd_partition cm_partitions[] = {
253 {
254 .name = "bootloader(nor)",
255 .size = 0x40000,
256 .offset = 0,
257 }, {
258 .name = "linux kernel(nor)",
259 .size = 0x100000,
260 .offset = MTDPART_OFS_APPEND,
261 }, {
262 .name = "file system(nor)",
263 .size = MTDPART_SIZ_FULL,
264 .offset = MTDPART_OFS_APPEND,
265 }
266 };
267
268 static struct physmap_flash_data cm_flash_data = {
269 .width = 2,
270 .parts = cm_partitions,
271 .nr_parts = ARRAY_SIZE(cm_partitions),
272 };
273
274 static unsigned cm_flash_gpios[] = { GPIO_PF4 };
275
276 static struct resource cm_flash_resource[] = {
277 {
278 .name = "cfi_probe",
279 .start = 0x20000000,
280 .end = 0x201fffff,
281 .flags = IORESOURCE_MEM,
282 }, {
283 .start = (unsigned long)cm_flash_gpios,
284 .end = ARRAY_SIZE(cm_flash_gpios),
285 .flags = IORESOURCE_IRQ,
286 }
287 };
288
289 static struct platform_device cm_flash_device = {
290 .name = "gpio-addr-flash",
291 .id = 0,
292 .dev = {
293 .platform_data = &cm_flash_data,
294 },
295 .num_resources = ARRAY_SIZE(cm_flash_resource),
296 .resource = cm_flash_resource,
297 };
298 #endif
299
300 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
301 #ifdef CONFIG_SERIAL_BFIN_UART0
302 static struct resource bfin_uart0_resources[] = {
303 {
304 .start = UART0_THR,
305 .end = UART0_GCTL+2,
306 .flags = IORESOURCE_MEM,
307 },
308 {
309 .start = IRQ_UART0_TX,
310 .end = IRQ_UART0_TX,
311 .flags = IORESOURCE_IRQ,
312 },
313 {
314 .start = IRQ_UART0_RX,
315 .end = IRQ_UART0_RX,
316 .flags = IORESOURCE_IRQ,
317 },
318 {
319 .start = IRQ_UART0_ERROR,
320 .end = IRQ_UART0_ERROR,
321 .flags = IORESOURCE_IRQ,
322 },
323 {
324 .start = CH_UART0_TX,
325 .end = CH_UART0_TX,
326 .flags = IORESOURCE_DMA,
327 },
328 {
329 .start = CH_UART0_RX,
330 .end = CH_UART0_RX,
331 .flags = IORESOURCE_DMA,
332 },
333 #ifdef CONFIG_BFIN_UART0_CTSRTS
334 {
335 /*
336 * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
337 */
338 .start = -1,
339 .end = -1,
340 .flags = IORESOURCE_IO,
341 },
342 {
343 /*
344 * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
345 */
346 .start = -1,
347 .end = -1,
348 .flags = IORESOURCE_IO,
349 },
350 #endif
351 };
352
353 static unsigned short bfin_uart0_peripherals[] = {
354 P_UART0_TX, P_UART0_RX, 0
355 };
356
357 static struct platform_device bfin_uart0_device = {
358 .name = "bfin-uart",
359 .id = 0,
360 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
361 .resource = bfin_uart0_resources,
362 .dev = {
363 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
364 },
365 };
366 #endif
367 #ifdef CONFIG_SERIAL_BFIN_UART1
368 static struct resource bfin_uart1_resources[] = {
369 {
370 .start = UART1_THR,
371 .end = UART1_GCTL+2,
372 .flags = IORESOURCE_MEM,
373 },
374 {
375 .start = IRQ_UART1_TX,
376 .end = IRQ_UART1_TX,
377 .flags = IORESOURCE_IRQ,
378 },
379 {
380 .start = IRQ_UART1_RX,
381 .end = IRQ_UART1_RX,
382 .flags = IORESOURCE_IRQ,
383 },
384 {
385 .start = IRQ_UART1_ERROR,
386 .end = IRQ_UART1_ERROR,
387 .flags = IORESOURCE_IRQ,
388 },
389 {
390 .start = CH_UART1_TX,
391 .end = CH_UART1_TX,
392 .flags = IORESOURCE_DMA,
393 },
394 {
395 .start = CH_UART1_RX,
396 .end = CH_UART1_RX,
397 .flags = IORESOURCE_DMA,
398 },
399 #ifdef CONFIG_BFIN_UART1_CTSRTS
400 {
401 /*
402 * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
403 */
404 .start = -1,
405 .end = -1,
406 .flags = IORESOURCE_IO,
407 },
408 {
409 /*
410 * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
411 */
412 .start = -1,
413 .end = -1,
414 .flags = IORESOURCE_IO,
415 },
416 #endif
417 };
418
419 static unsigned short bfin_uart1_peripherals[] = {
420 P_UART1_TX, P_UART1_RX, 0
421 };
422
423 static struct platform_device bfin_uart1_device = {
424 .name = "bfin-uart",
425 .id = 1,
426 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
427 .resource = bfin_uart1_resources,
428 .dev = {
429 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
430 },
431 };
432 #endif
433 #endif
434
435 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
436 #ifdef CONFIG_BFIN_SIR0
437 static struct resource bfin_sir0_resources[] = {
438 {
439 .start = 0xFFC00400,
440 .end = 0xFFC004FF,
441 .flags = IORESOURCE_MEM,
442 },
443 {
444 .start = IRQ_UART0_RX,
445 .end = IRQ_UART0_RX+1,
446 .flags = IORESOURCE_IRQ,
447 },
448 {
449 .start = CH_UART0_RX,
450 .end = CH_UART0_RX+1,
451 .flags = IORESOURCE_DMA,
452 },
453 };
454 static struct platform_device bfin_sir0_device = {
455 .name = "bfin_sir",
456 .id = 0,
457 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
458 .resource = bfin_sir0_resources,
459 };
460 #endif
461 #ifdef CONFIG_BFIN_SIR1
462 static struct resource bfin_sir1_resources[] = {
463 {
464 .start = 0xFFC02000,
465 .end = 0xFFC020FF,
466 .flags = IORESOURCE_MEM,
467 },
468 {
469 .start = IRQ_UART1_RX,
470 .end = IRQ_UART1_RX+1,
471 .flags = IORESOURCE_IRQ,
472 },
473 {
474 .start = CH_UART1_RX,
475 .end = CH_UART1_RX+1,
476 .flags = IORESOURCE_DMA,
477 },
478 };
479 static struct platform_device bfin_sir1_device = {
480 .name = "bfin_sir",
481 .id = 1,
482 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
483 .resource = bfin_sir1_resources,
484 };
485 #endif
486 #endif
487
488 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
489 static struct resource bfin_twi0_resource[] = {
490 [0] = {
491 .start = TWI0_REGBASE,
492 .end = TWI0_REGBASE,
493 .flags = IORESOURCE_MEM,
494 },
495 [1] = {
496 .start = IRQ_TWI,
497 .end = IRQ_TWI,
498 .flags = IORESOURCE_IRQ,
499 },
500 };
501
502 static struct platform_device i2c_bfin_twi_device = {
503 .name = "i2c-bfin-twi",
504 .id = 0,
505 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
506 .resource = bfin_twi0_resource,
507 };
508 #endif
509
510 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
511 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
512 static struct resource bfin_sport0_uart_resources[] = {
513 {
514 .start = SPORT0_TCR1,
515 .end = SPORT0_MRCS3+4,
516 .flags = IORESOURCE_MEM,
517 },
518 {
519 .start = IRQ_SPORT0_RX,
520 .end = IRQ_SPORT0_RX+1,
521 .flags = IORESOURCE_IRQ,
522 },
523 {
524 .start = IRQ_SPORT0_ERROR,
525 .end = IRQ_SPORT0_ERROR,
526 .flags = IORESOURCE_IRQ,
527 },
528 };
529
530 static unsigned short bfin_sport0_peripherals[] = {
531 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
532 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
533 };
534
535 static struct platform_device bfin_sport0_uart_device = {
536 .name = "bfin-sport-uart",
537 .id = 0,
538 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
539 .resource = bfin_sport0_uart_resources,
540 .dev = {
541 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
542 },
543 };
544 #endif
545 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
546 static struct resource bfin_sport1_uart_resources[] = {
547 {
548 .start = SPORT1_TCR1,
549 .end = SPORT1_MRCS3+4,
550 .flags = IORESOURCE_MEM,
551 },
552 {
553 .start = IRQ_SPORT1_RX,
554 .end = IRQ_SPORT1_RX+1,
555 .flags = IORESOURCE_IRQ,
556 },
557 {
558 .start = IRQ_SPORT1_ERROR,
559 .end = IRQ_SPORT1_ERROR,
560 .flags = IORESOURCE_IRQ,
561 },
562 };
563
564 static unsigned short bfin_sport1_peripherals[] = {
565 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
566 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
567 };
568
569 static struct platform_device bfin_sport1_uart_device = {
570 .name = "bfin-sport-uart",
571 .id = 1,
572 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
573 .resource = bfin_sport1_uart_resources,
574 .dev = {
575 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
576 },
577 };
578 #endif
579 #endif
580
581 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
582 #include <linux/bfin_mac.h>
583 static const unsigned short bfin_mac_peripherals[] = P_MII0;
584
585 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
586 {
587 .addr = 1,
588 .irq = IRQ_MAC_PHYINT,
589 },
590 };
591
592 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
593 .phydev_number = 1,
594 .phydev_data = bfin_phydev_data,
595 .phy_mode = PHY_INTERFACE_MODE_MII,
596 .mac_peripherals = bfin_mac_peripherals,
597 };
598
599 static struct platform_device bfin_mii_bus = {
600 .name = "bfin_mii_bus",
601 .dev = {
602 .platform_data = &bfin_mii_bus_data,
603 }
604 };
605
606 static struct platform_device bfin_mac_device = {
607 .name = "bfin_mac",
608 .dev = {
609 .platform_data = &bfin_mii_bus,
610 }
611 };
612 #endif
613
614 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
615 #define PATA_INT IRQ_PF14
616
617 static struct pata_platform_info bfin_pata_platform_data = {
618 .ioport_shift = 2,
619 .irq_type = IRQF_TRIGGER_HIGH,
620 };
621
622 static struct resource bfin_pata_resources[] = {
623 {
624 .start = 0x2030C000,
625 .end = 0x2030C01F,
626 .flags = IORESOURCE_MEM,
627 },
628 {
629 .start = 0x2030D018,
630 .end = 0x2030D01B,
631 .flags = IORESOURCE_MEM,
632 },
633 {
634 .start = PATA_INT,
635 .end = PATA_INT,
636 .flags = IORESOURCE_IRQ,
637 },
638 };
639
640 static struct platform_device bfin_pata_device = {
641 .name = "pata_platform",
642 .id = -1,
643 .num_resources = ARRAY_SIZE(bfin_pata_resources),
644 .resource = bfin_pata_resources,
645 .dev = {
646 .platform_data = &bfin_pata_platform_data,
647 }
648 };
649 #endif
650
651 static const unsigned int cclk_vlev_datasheet[] =
652 {
653 VRPAIR(VLEV_085, 250000000),
654 VRPAIR(VLEV_090, 376000000),
655 VRPAIR(VLEV_095, 426000000),
656 VRPAIR(VLEV_100, 426000000),
657 VRPAIR(VLEV_105, 476000000),
658 VRPAIR(VLEV_110, 476000000),
659 VRPAIR(VLEV_115, 476000000),
660 VRPAIR(VLEV_120, 500000000),
661 VRPAIR(VLEV_125, 533000000),
662 VRPAIR(VLEV_130, 600000000),
663 };
664
665 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
666 .tuple_tab = cclk_vlev_datasheet,
667 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
668 .vr_settling_time = 25 /* us */,
669 };
670
671 static struct platform_device bfin_dpmc = {
672 .name = "bfin dpmc",
673 .dev = {
674 .platform_data = &bfin_dmpc_vreg_data,
675 },
676 };
677
678 static struct platform_device *cm_bf537e_devices[] __initdata = {
679
680 &bfin_dpmc,
681
682 #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
683 &hitachi_fb_device,
684 #endif
685
686 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
687 &rtc_device,
688 #endif
689
690 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
691 #ifdef CONFIG_SERIAL_BFIN_UART0
692 &bfin_uart0_device,
693 #endif
694 #ifdef CONFIG_SERIAL_BFIN_UART1
695 &bfin_uart1_device,
696 #endif
697 #endif
698
699 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
700 #ifdef CONFIG_BFIN_SIR0
701 &bfin_sir0_device,
702 #endif
703 #ifdef CONFIG_BFIN_SIR1
704 &bfin_sir1_device,
705 #endif
706 #endif
707
708 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
709 &i2c_bfin_twi_device,
710 #endif
711
712 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
713 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
714 &bfin_sport0_uart_device,
715 #endif
716 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
717 &bfin_sport1_uart_device,
718 #endif
719 #endif
720
721 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
722 &isp1362_hcd_device,
723 #endif
724
725 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
726 &smc91x_device,
727 #endif
728
729 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
730 &bfin_mii_bus,
731 &bfin_mac_device,
732 #endif
733
734 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
735 &net2272_bfin_device,
736 #endif
737
738 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
739 &bfin_spi0_device,
740 #endif
741
742 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
743 &bfin_pata_device,
744 #endif
745
746 #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
747 &cm_flash_device,
748 #endif
749 };
750
net2272_init(void)751 static int __init net2272_init(void)
752 {
753 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
754 int ret;
755
756 ret = gpio_request(GPIO_PG14, "net2272");
757 if (ret)
758 return ret;
759
760 /* Reset USB Chip, PG14 */
761 gpio_direction_output(GPIO_PG14, 0);
762 mdelay(2);
763 gpio_set_value(GPIO_PG14, 1);
764 #endif
765
766 return 0;
767 }
768
cm_bf537e_init(void)769 static int __init cm_bf537e_init(void)
770 {
771 printk(KERN_INFO "%s(): registering device resources\n", __func__);
772 platform_add_devices(cm_bf537e_devices, ARRAY_SIZE(cm_bf537e_devices));
773 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
774 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
775 #endif
776
777 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
778 irq_set_status_flags(PATA_INT, IRQ_NOAUTOEN);
779 #endif
780
781 if (net2272_init())
782 pr_warning("unable to configure net2272; it probably won't work\n");
783
784 return 0;
785 }
786
787 arch_initcall(cm_bf537e_init);
788
789 static struct platform_device *cm_bf537e_early_devices[] __initdata = {
790 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
791 #ifdef CONFIG_SERIAL_BFIN_UART0
792 &bfin_uart0_device,
793 #endif
794 #ifdef CONFIG_SERIAL_BFIN_UART1
795 &bfin_uart1_device,
796 #endif
797 #endif
798
799 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
800 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
801 &bfin_sport0_uart_device,
802 #endif
803 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
804 &bfin_sport1_uart_device,
805 #endif
806 #endif
807 };
808
native_machine_early_platform_add_devices(void)809 void __init native_machine_early_platform_add_devices(void)
810 {
811 printk(KERN_INFO "register early platform devices\n");
812 early_platform_add_devices(cm_bf537e_early_devices,
813 ARRAY_SIZE(cm_bf537e_early_devices));
814 }
815
bfin_get_ether_addr(char * addr)816 void bfin_get_ether_addr(char *addr)
817 {
818 random_ether_addr(addr);
819 printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
820 }
821 EXPORT_SYMBOL(bfin_get_ether_addr);
822