1 /*
2  * board initialization should put one of these structures into platform_data
3  * and place the bfin-rotary onto platform_bus named "bfin-rotary".
4  *
5  * Copyright 2008-2010 Analog Devices Inc.
6  *
7  * Licensed under the GPL-2 or later.
8  */
9 
10 #ifndef _BFIN_ROTARY_H
11 #define _BFIN_ROTARY_H
12 
13 /* mode bitmasks */
14 #define ROT_QUAD_ENC	CNTMODE_QUADENC	/* quadrature/grey code encoder mode */
15 #define ROT_BIN_ENC	CNTMODE_BINENC	/* binary encoder mode */
16 #define ROT_UD_CNT	CNTMODE_UDCNT	/* rotary counter mode */
17 #define ROT_DIR_CNT	CNTMODE_DIRCNT	/* direction counter mode */
18 
19 #define ROT_DEBE	DEBE		/* Debounce Enable */
20 
21 #define ROT_CDGINV	CDGINV		/* CDG Pin Polarity Invert */
22 #define ROT_CUDINV	CUDINV		/* CUD Pin Polarity Invert */
23 #define ROT_CZMINV	CZMINV		/* CZM Pin Polarity Invert */
24 
25 struct bfin_rotary_platform_data {
26 	/* set rotary UP KEY_### or BTN_### in case you prefer
27 	 * bfin-rotary to send EV_KEY otherwise set 0
28 	 */
29 	unsigned int rotary_up_key;
30 	/* set rotary DOWN KEY_### or BTN_### in case you prefer
31 	 * bfin-rotary to send EV_KEY otherwise set 0
32 	 */
33 	unsigned int rotary_down_key;
34 	/* set rotary BUTTON KEY_### or BTN_### */
35 	unsigned int rotary_button_key;
36 	/* set rotary Relative Axis REL_### in case you prefer
37 	 * bfin-rotary to send EV_REL otherwise set 0
38 	 */
39 	unsigned int rotary_rel_code;
40 	unsigned short debounce;	/* 0..17 */
41 	unsigned short mode;
42 };
43 
44 /* CNT_CONFIG bitmasks */
45 #define CNTE		(1 << 0)	/* Counter Enable */
46 #define DEBE		(1 << 1)	/* Debounce Enable */
47 #define CDGINV		(1 << 4)	/* CDG Pin Polarity Invert */
48 #define CUDINV		(1 << 5)	/* CUD Pin Polarity Invert */
49 #define CZMINV		(1 << 6)	/* CZM Pin Polarity Invert */
50 #define CNTMODE_SHIFT	8
51 #define CNTMODE		(0x7 << CNTMODE_SHIFT)	/* Counter Operating Mode */
52 #define ZMZC		(1 << 1)	/* CZM Zeroes Counter Enable */
53 #define BNDMODE_SHIFT	12
54 #define BNDMODE		(0x3 << BNDMODE_SHIFT)	/* Boundary register Mode */
55 #define INPDIS		(1 << 15)	/* CUG and CDG Input Disable */
56 
57 #define CNTMODE_QUADENC	(0 << CNTMODE_SHIFT)	/* quadrature encoder mode */
58 #define CNTMODE_BINENC	(1 << CNTMODE_SHIFT)	/* binary encoder mode */
59 #define CNTMODE_UDCNT	(2 << CNTMODE_SHIFT)	/* up/down counter mode */
60 #define CNTMODE_DIRCNT	(4 << CNTMODE_SHIFT)	/* direction counter mode */
61 #define CNTMODE_DIRTMR	(5 << CNTMODE_SHIFT)	/* direction timer mode */
62 
63 #define BNDMODE_COMP	(0 << BNDMODE_SHIFT)	/* boundary compare mode */
64 #define BNDMODE_ZERO	(1 << BNDMODE_SHIFT)	/* boundary compare and zero mode */
65 #define BNDMODE_CAPT	(2 << BNDMODE_SHIFT)	/* boundary capture mode */
66 #define BNDMODE_AEXT	(3 << BNDMODE_SHIFT)	/* boundary auto-extend mode */
67 
68 /* CNT_IMASK bitmasks */
69 #define ICIE		(1 << 0)	/* Illegal Gray/Binary Code Interrupt Enable */
70 #define UCIE		(1 << 1)	/* Up count Interrupt Enable */
71 #define DCIE		(1 << 2)	/* Down count Interrupt Enable */
72 #define MINCIE		(1 << 3)	/* Min Count Interrupt Enable */
73 #define MAXCIE		(1 << 4)	/* Max Count Interrupt Enable */
74 #define COV31IE		(1 << 5)	/* Bit 31 Overflow Interrupt Enable */
75 #define COV15IE		(1 << 6)	/* Bit 15 Overflow Interrupt Enable */
76 #define CZEROIE		(1 << 7)	/* Count to Zero Interrupt Enable */
77 #define CZMIE		(1 << 8)	/* CZM Pin Interrupt Enable */
78 #define CZMEIE		(1 << 9)	/* CZM Error Interrupt Enable */
79 #define CZMZIE		(1 << 10)	/* CZM Zeroes Counter Interrupt Enable */
80 
81 /* CNT_STATUS bitmasks */
82 #define ICII		(1 << 0)	/* Illegal Gray/Binary Code Interrupt Identifier */
83 #define UCII		(1 << 1)	/* Up count Interrupt Identifier */
84 #define DCII		(1 << 2)	/* Down count Interrupt Identifier */
85 #define MINCII		(1 << 3)	/* Min Count Interrupt Identifier */
86 #define MAXCII		(1 << 4)	/* Max Count Interrupt Identifier */
87 #define COV31II		(1 << 5)	/* Bit 31 Overflow Interrupt Identifier */
88 #define COV15II		(1 << 6)	/* Bit 15 Overflow Interrupt Identifier */
89 #define CZEROII		(1 << 7)	/* Count to Zero Interrupt Identifier */
90 #define CZMII		(1 << 8)	/* CZM Pin Interrupt Identifier */
91 #define CZMEII		(1 << 9)	/* CZM Error Interrupt Identifier */
92 #define CZMZII		(1 << 10)	/* CZM Zeroes Counter Interrupt Identifier */
93 
94 /* CNT_COMMAND bitmasks */
95 #define W1LCNT		0xf		/* Load Counter Register */
96 #define W1LMIN		0xf0		/* Load Min Register */
97 #define W1LMAX		0xf00		/* Load Max Register */
98 #define W1ZMONCE	(1 << 12)	/* Enable CZM Clear Counter Once */
99 
100 #define W1LCNT_ZERO	(1 << 0)	/* write 1 to load CNT_COUNTER with zero */
101 #define W1LCNT_MIN	(1 << 2)	/* write 1 to load CNT_COUNTER from CNT_MIN */
102 #define W1LCNT_MAX	(1 << 3)	/* write 1 to load CNT_COUNTER from CNT_MAX */
103 
104 #define W1LMIN_ZERO	(1 << 4)	/* write 1 to load CNT_MIN with zero */
105 #define W1LMIN_CNT	(1 << 5)	/* write 1 to load CNT_MIN from CNT_COUNTER */
106 #define W1LMIN_MAX	(1 << 7)	/* write 1 to load CNT_MIN from CNT_MAX */
107 
108 #define W1LMAX_ZERO	(1 << 8)	/* write 1 to load CNT_MAX with zero */
109 #define W1LMAX_CNT	(1 << 9)	/* write 1 to load CNT_MAX from CNT_COUNTER */
110 #define W1LMAX_MIN	(1 << 10)	/* write 1 to load CNT_MAX from CNT_MIN */
111 
112 /* CNT_DEBOUNCE bitmasks */
113 #define DPRESCALE	0xf		/* Load Counter Register */
114 
115 #endif
116