1 /*
2 * Board-specific setup code for the ATNGW100 Network Gateway
3 *
4 * Copyright (C) 2005-2006 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10 #include <linux/clk.h>
11 #include <linux/etherdevice.h>
12 #include <linux/gpio.h>
13 #include <linux/irq.h>
14 #include <linux/i2c.h>
15 #include <linux/i2c-gpio.h>
16 #include <linux/init.h>
17 #include <linux/linkage.h>
18 #include <linux/platform_device.h>
19 #include <linux/types.h>
20 #include <linux/leds.h>
21 #include <linux/spi/spi.h>
22 #include <linux/atmel-mci.h>
23 #include <linux/usb/atmel_usba_udc.h>
24
25 #include <asm/io.h>
26 #include <asm/setup.h>
27
28 #include <mach/at32ap700x.h>
29 #include <mach/board.h>
30 #include <mach/init.h>
31 #include <mach/portmux.h>
32
33 /* Oscillator frequencies. These are board-specific */
34 unsigned long at32_board_osc_rates[3] = {
35 [0] = 32768, /* 32.768 kHz on RTC osc */
36 [1] = 20000000, /* 20 MHz on osc0 */
37 [2] = 12000000, /* 12 MHz on osc1 */
38 };
39
40 /*
41 * The ATNGW100 mkII is very similar to the ATNGW100. Both have the AT32AP7000
42 * chip on board; the difference is that the ATNGW100 mkII has 128 MB 32-bit
43 * SDRAM (the ATNGW100 has 32 MB 16-bit SDRAM) and 256 MB 16-bit NAND flash
44 * (the ATNGW100 has none.)
45 *
46 * The RAM difference is handled by the boot loader, so the only difference we
47 * end up handling here is the NAND flash, EBI pin reservation and if LCDC or
48 * MACB1 should be enabled.
49 */
50 #ifdef CONFIG_BOARD_ATNGW100_MKII
51 #include <linux/mtd/partitions.h>
52 #include <mach/smc.h>
53
54 static struct smc_timing nand_timing __initdata = {
55 .ncs_read_setup = 0,
56 .nrd_setup = 10,
57 .ncs_write_setup = 0,
58 .nwe_setup = 10,
59
60 .ncs_read_pulse = 30,
61 .nrd_pulse = 15,
62 .ncs_write_pulse = 30,
63 .nwe_pulse = 15,
64
65 .read_cycle = 30,
66 .write_cycle = 30,
67
68 .ncs_read_recover = 0,
69 .nrd_recover = 15,
70 .ncs_write_recover = 0,
71 /* WE# high -> RE# low min 60 ns */
72 .nwe_recover = 50,
73 };
74
75 static struct smc_config nand_config __initdata = {
76 .bus_width = 2,
77 .nrd_controlled = 1,
78 .nwe_controlled = 1,
79 .nwait_mode = 0,
80 .byte_write = 0,
81 .tdf_cycles = 2,
82 .tdf_mode = 0,
83 };
84
85 static struct mtd_partition nand_partitions[] = {
86 {
87 .name = "main",
88 .offset = 0x00000000,
89 .size = MTDPART_SIZ_FULL,
90 },
91 };
92
93
94 static struct atmel_nand_data atngw100mkii_nand_data __initdata = {
95 .cle = 21,
96 .ale = 22,
97 .rdy_pin = GPIO_PIN_PB(28),
98 .enable_pin = GPIO_PIN_PE(23),
99 .bus_width_16 = true,
100 .parts = nand_partitions,
101 .num_parts = ARRAY_SIZE(nand_partitions),
102 };
103 #endif
104
105 /* Initialized by bootloader-specific startup code. */
106 struct tag *bootloader_tags __initdata;
107
108 struct eth_addr {
109 u8 addr[6];
110 };
111 static struct eth_addr __initdata hw_addr[2];
112 static struct macb_platform_data __initdata eth_data[2];
113
114 static struct spi_board_info spi0_board_info[] __initdata = {
115 {
116 .modalias = "mtd_dataflash",
117 .max_speed_hz = 8000000,
118 .chip_select = 0,
119 },
120 };
121
122 static struct mci_platform_data __initdata mci0_data = {
123 .slot[0] = {
124 .bus_width = 4,
125 #if defined(CONFIG_BOARD_ATNGW100_MKII)
126 .detect_pin = GPIO_PIN_PC(25),
127 .wp_pin = GPIO_PIN_PE(22),
128 #else
129 .detect_pin = GPIO_PIN_PC(25),
130 .wp_pin = GPIO_PIN_PE(0),
131 #endif
132 },
133 };
134
135 static struct usba_platform_data atngw100_usba_data __initdata = {
136 #if defined(CONFIG_BOARD_ATNGW100_MKII)
137 .vbus_pin = GPIO_PIN_PE(26),
138 #else
139 .vbus_pin = -ENODEV,
140 #endif
141 };
142
143 /*
144 * The next two functions should go away as the boot loader is
145 * supposed to initialize the macb address registers with a valid
146 * ethernet address. But we need to keep it around for a while until
147 * we can be reasonably sure the boot loader does this.
148 *
149 * The phy_id is ignored as the driver will probe for it.
150 */
parse_tag_ethernet(struct tag * tag)151 static int __init parse_tag_ethernet(struct tag *tag)
152 {
153 int i;
154
155 i = tag->u.ethernet.mac_index;
156 if (i < ARRAY_SIZE(hw_addr))
157 memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address,
158 sizeof(hw_addr[i].addr));
159
160 return 0;
161 }
162 __tagtable(ATAG_ETHERNET, parse_tag_ethernet);
163
set_hw_addr(struct platform_device * pdev)164 static void __init set_hw_addr(struct platform_device *pdev)
165 {
166 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
167 const u8 *addr;
168 void __iomem *regs;
169 struct clk *pclk;
170
171 if (!res)
172 return;
173 if (pdev->id >= ARRAY_SIZE(hw_addr))
174 return;
175
176 addr = hw_addr[pdev->id].addr;
177 if (!is_valid_ether_addr(addr))
178 return;
179
180 /*
181 * Since this is board-specific code, we'll cheat and use the
182 * physical address directly as we happen to know that it's
183 * the same as the virtual address.
184 */
185 regs = (void __iomem __force *)res->start;
186 pclk = clk_get(&pdev->dev, "pclk");
187 if (IS_ERR(pclk))
188 return;
189
190 clk_enable(pclk);
191 __raw_writel((addr[3] << 24) | (addr[2] << 16)
192 | (addr[1] << 8) | addr[0], regs + 0x98);
193 __raw_writel((addr[5] << 8) | addr[4], regs + 0x9c);
194 clk_disable(pclk);
195 clk_put(pclk);
196 }
197
setup_board(void)198 void __init setup_board(void)
199 {
200 at32_map_usart(1, 0, 0); /* USART 1: /dev/ttyS0, DB9 */
201 at32_setup_serial_console(0);
202 }
203
204 static const struct gpio_led ngw_leds[] = {
205 { .name = "sys", .gpio = GPIO_PIN_PA(16), .active_low = 1,
206 .default_trigger = "heartbeat",
207 },
208 { .name = "a", .gpio = GPIO_PIN_PA(19), .active_low = 1, },
209 { .name = "b", .gpio = GPIO_PIN_PE(19), .active_low = 1, },
210 };
211
212 static const struct gpio_led_platform_data ngw_led_data = {
213 .num_leds = ARRAY_SIZE(ngw_leds),
214 .leds = (void *) ngw_leds,
215 };
216
217 static struct platform_device ngw_gpio_leds = {
218 .name = "leds-gpio",
219 .id = -1,
220 .dev = {
221 .platform_data = (void *) &ngw_led_data,
222 }
223 };
224
225 static struct i2c_gpio_platform_data i2c_gpio_data = {
226 .sda_pin = GPIO_PIN_PA(6),
227 .scl_pin = GPIO_PIN_PA(7),
228 .sda_is_open_drain = 1,
229 .scl_is_open_drain = 1,
230 .udelay = 2, /* close to 100 kHz */
231 };
232
233 static struct platform_device i2c_gpio_device = {
234 .name = "i2c-gpio",
235 .id = 0,
236 .dev = {
237 .platform_data = &i2c_gpio_data,
238 },
239 };
240
241 static struct i2c_board_info __initdata i2c_info[] = {
242 /* NOTE: original ATtiny24 firmware is at address 0x0b */
243 };
244
atngw100_init(void)245 static int __init atngw100_init(void)
246 {
247 unsigned i;
248
249 /*
250 * ATNGW100 mkII uses 32-bit SDRAM interface. Reserve the
251 * SDRAM-specific pins so that nobody messes with them.
252 */
253 #ifdef CONFIG_BOARD_ATNGW100_MKII
254 at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);
255
256 smc_set_timing(&nand_config, &nand_timing);
257 smc_set_configuration(3, &nand_config);
258 at32_add_device_nand(0, &atngw100mkii_nand_data);
259 #endif
260
261 at32_add_device_usart(0);
262
263 set_hw_addr(at32_add_device_eth(0, ð_data[0]));
264 #ifndef CONFIG_BOARD_ATNGW100_MKII_LCD
265 set_hw_addr(at32_add_device_eth(1, ð_data[1]));
266 #endif
267
268 at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
269 at32_add_device_mci(0, &mci0_data);
270 at32_add_device_usba(0, &atngw100_usba_data);
271
272 for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) {
273 at32_select_gpio(ngw_leds[i].gpio,
274 AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
275 }
276 platform_device_register(&ngw_gpio_leds);
277
278 /* all these i2c/smbus pins should have external pullups for
279 * open-drain sharing among all I2C devices. SDA and SCL do;
280 * PB28/EXTINT3 (ATNGW100) and PE21 (ATNGW100 mkII) doesn't; it should
281 * be SMBALERT# (for PMBus), but it's not available off-board.
282 */
283 #ifdef CONFIG_BOARD_ATNGW100_MKII
284 at32_select_periph(GPIO_PIOE_BASE, 1 << 21, 0, AT32_GPIOF_PULLUP);
285 #else
286 at32_select_periph(GPIO_PIOB_BASE, 1 << 28, 0, AT32_GPIOF_PULLUP);
287 #endif
288 at32_select_gpio(i2c_gpio_data.sda_pin,
289 AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
290 at32_select_gpio(i2c_gpio_data.scl_pin,
291 AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
292 platform_device_register(&i2c_gpio_device);
293 i2c_register_board_info(0, i2c_info, ARRAY_SIZE(i2c_info));
294
295 return 0;
296 }
297 postcore_initcall(atngw100_init);
298
atngw100_arch_init(void)299 static int __init atngw100_arch_init(void)
300 {
301 /* PB30 (ATNGW100) and PE30 (ATNGW100 mkII) is the otherwise unused
302 * jumper on the mainboard, with an external pullup; the jumper grounds
303 * it. Use it however you like, including letting U-Boot or Linux tweak
304 * boot sequences.
305 */
306 #ifdef CONFIG_BOARD_ATNGW100_MKII
307 at32_select_gpio(GPIO_PIN_PE(30), 0);
308 gpio_request(GPIO_PIN_PE(30), "j15");
309 gpio_direction_input(GPIO_PIN_PE(30));
310 gpio_export(GPIO_PIN_PE(30), false);
311 #else
312 at32_select_gpio(GPIO_PIN_PB(30), 0);
313 gpio_request(GPIO_PIN_PB(30), "j15");
314 gpio_direction_input(GPIO_PIN_PB(30));
315 gpio_export(GPIO_PIN_PB(30), false);
316 #endif
317
318 /* set_irq_type() after the arch_initcall for EIC has run, and
319 * before the I2C subsystem could try using this IRQ.
320 */
321 return irq_set_irq_type(AT32_EXTINT(3), IRQ_TYPE_EDGE_FALLING);
322 }
323 arch_initcall(atngw100_arch_init);
324