1 /* linux/arch/arm/plat-s3c/include/plat/clock.h
2  *
3  * Copyright (c) 2004-2005 Simtec Electronics
4  *	http://www.simtec.co.uk/products/SWLINUX/
5  *	Written by Ben Dooks, <ben@simtec.co.uk>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10 */
11 
12 #ifndef __ASM_PLAT_CLOCK_H
13 #define __ASM_PLAT_CLOCK_H __FILE__
14 
15 #include <linux/spinlock.h>
16 #include <linux/clkdev.h>
17 
18 struct clk;
19 
20 /**
21  * struct clk_ops - standard clock operations
22  * @set_rate: set the clock rate, see clk_set_rate().
23  * @get_rate: get the clock rate, see clk_get_rate().
24  * @round_rate: round a given clock rate, see clk_round_rate().
25  * @set_parent: set the clock's parent, see clk_set_parent().
26  *
27  * Group the common clock implementations together so that we
28  * don't have to keep setting the same fields again. We leave
29  * enable in struct clk.
30  *
31  * Adding an extra layer of indirection into the process should
32  * not be a problem as it is unlikely these operations are going
33  * to need to be called quickly.
34  */
35 struct clk_ops {
36 	int		    (*set_rate)(struct clk *c, unsigned long rate);
37 	unsigned long	    (*get_rate)(struct clk *c);
38 	unsigned long	    (*round_rate)(struct clk *c, unsigned long rate);
39 	int		    (*set_parent)(struct clk *c, struct clk *parent);
40 };
41 
42 struct clk {
43 	struct list_head      list;
44 	struct module        *owner;
45 	struct clk           *parent;
46 	const char           *name;
47 	const char		*devname;
48 	int		      id;
49 	int		      usage;
50 	unsigned long         rate;
51 	unsigned long         ctrlbit;
52 
53 	struct clk_ops		*ops;
54 	int		    (*enable)(struct clk *, int enable);
55 	struct clk_lookup	lookup;
56 #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
57 	struct dentry		*dent;	/* For visible tree hierarchy */
58 #endif
59 };
60 
61 /* other clocks which may be registered by board support */
62 
63 extern struct clk s3c24xx_dclk0;
64 extern struct clk s3c24xx_dclk1;
65 extern struct clk s3c24xx_clkout0;
66 extern struct clk s3c24xx_clkout1;
67 extern struct clk s3c24xx_uclk;
68 
69 extern struct clk clk_usb_bus;
70 
71 /* core clock support */
72 
73 extern struct clk clk_f;
74 extern struct clk clk_h;
75 extern struct clk clk_p;
76 extern struct clk clk_mpll;
77 extern struct clk clk_upll;
78 extern struct clk clk_epll;
79 extern struct clk clk_xtal;
80 extern struct clk clk_ext;
81 
82 /* S3C64XX specific clocks */
83 extern struct clk clk_h2;
84 extern struct clk clk_27m;
85 extern struct clk clk_48m;
86 extern struct clk clk_xusbxti;
87 
88 extern int clk_default_setrate(struct clk *clk, unsigned long rate);
89 extern struct clk_ops clk_ops_def_setrate;
90 
91 /* exports for arch/arm/mach-s3c2410
92  *
93  * Please DO NOT use these outside of arch/arm/mach-s3c2410
94 */
95 
96 extern spinlock_t clocks_lock;
97 
98 extern int s3c2410_clkcon_enable(struct clk *clk, int enable);
99 
100 extern int s3c24xx_register_clock(struct clk *clk);
101 extern int s3c24xx_register_clocks(struct clk **clk, int nr_clks);
102 
103 extern void s3c_register_clocks(struct clk *clk, int nr_clks);
104 extern void s3c_disable_clocks(struct clk *clkp, int nr_clks);
105 
106 extern int s3c24xx_register_baseclocks(unsigned long xtal);
107 
108 extern void s5p_register_clocks(unsigned long xtal_freq);
109 
110 extern void s3c24xx_setup_clocks(unsigned long fclk,
111 				 unsigned long hclk,
112 				 unsigned long pclk);
113 
114 extern void s3c2410_setup_clocks(void);
115 extern void s3c2412_setup_clocks(void);
116 extern void s3c244x_setup_clocks(void);
117 extern void s3c2443_setup_clocks(void);
118 
119 /* S3C64XX specific functions and clocks */
120 
121 extern int s3c64xx_sclk_ctrl(struct clk *clk, int enable);
122 
123 /* Init for pwm clock code */
124 
125 extern void s3c_pwmclk_init(void);
126 
127 /* Global watchdog clock used by arch_wtd_reset() callback */
128 
129 extern struct clk *s3c2410_wdtclk;
130 
131 #endif /* __ASM_PLAT_CLOCK_H */
132