1 /*
2 * Copyright (C) 2008-2009 ST-Ericsson
3 *
4 * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2, as
8 * published by the Free Software Foundation.
9 *
10 */
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/interrupt.h>
14 #include <linux/platform_device.h>
15 #include <linux/io.h>
16 #include <linux/i2c.h>
17 #include <linux/gpio.h>
18 #include <linux/amba/bus.h>
19 #include <linux/amba/pl022.h>
20 #include <linux/amba/serial.h>
21 #include <linux/spi/spi.h>
22 #include <linux/mfd/abx500/ab8500.h>
23 #include <linux/regulator/ab8500.h>
24 #include <linux/mfd/tc3589x.h>
25 #include <linux/mfd/tps6105x.h>
26 #include <linux/mfd/abx500/ab8500-gpio.h>
27 #include <linux/leds-lp5521.h>
28 #include <linux/input.h>
29 #include <linux/smsc911x.h>
30 #include <linux/gpio_keys.h>
31 #include <linux/delay.h>
32
33 #include <linux/leds.h>
34 #include <asm/mach-types.h>
35 #include <asm/mach/arch.h>
36 #include <asm/hardware/gic.h>
37
38 #include <plat/i2c.h>
39 #include <plat/ste_dma40.h>
40 #include <plat/pincfg.h>
41 #include <plat/gpio-nomadik.h>
42
43 #include <mach/hardware.h>
44 #include <mach/setup.h>
45 #include <mach/devices.h>
46 #include <mach/irqs.h>
47
48 #include "pins-db8500.h"
49 #include "ste-dma40-db8500.h"
50 #include "devices-db8500.h"
51 #include "board-mop500.h"
52 #include "board-mop500-regulators.h"
53
54 static struct gpio_led snowball_led_array[] = {
55 {
56 .name = "user_led",
57 .default_trigger = "none",
58 .gpio = 142,
59 },
60 };
61
62 static struct gpio_led_platform_data snowball_led_data = {
63 .leds = snowball_led_array,
64 .num_leds = ARRAY_SIZE(snowball_led_array),
65 };
66
67 static struct platform_device snowball_led_dev = {
68 .name = "leds-gpio",
69 .dev = {
70 .platform_data = &snowball_led_data,
71 },
72 };
73
74 static struct ab8500_gpio_platform_data ab8500_gpio_pdata = {
75 .gpio_base = MOP500_AB8500_GPIO(0),
76 .irq_base = MOP500_AB8500_VIR_GPIO_IRQ_BASE,
77 /* config_reg is the initial configuration of ab8500 pins.
78 * The pins can be configured as GPIO or alt functions based
79 * on value present in GpioSel1 to GpioSel6 and AlternatFunction
80 * register. This is the array of 7 configuration settings.
81 * One has to compile time decide these settings. Below is the
82 * explanation of these setting
83 * GpioSel1 = 0x00 => Pins GPIO1 to GPIO8 are not used as GPIO
84 * GpioSel2 = 0x1E => Pins GPIO10 to GPIO13 are configured as GPIO
85 * GpioSel3 = 0x80 => Pin GPIO24 is configured as GPIO
86 * GpioSel4 = 0x01 => Pin GPIo25 is configured as GPIO
87 * GpioSel5 = 0x7A => Pins GPIO34, GPIO36 to GPIO39 are conf as GPIO
88 * GpioSel6 = 0x00 => Pins GPIO41 & GPIo42 are not configured as GPIO
89 * AlternaFunction = 0x00 => If Pins GPIO10 to 13 are not configured
90 * as GPIO then this register selectes the alternate fucntions
91 */
92 .config_reg = {0x00, 0x1E, 0x80, 0x01,
93 0x7A, 0x00, 0x00},
94 };
95
96 static struct gpio_keys_button snowball_key_array[] = {
97 {
98 .gpio = 32,
99 .type = EV_KEY,
100 .code = KEY_1,
101 .desc = "userpb",
102 .active_low = 1,
103 .debounce_interval = 50,
104 .wakeup = 1,
105 },
106 {
107 .gpio = 151,
108 .type = EV_KEY,
109 .code = KEY_2,
110 .desc = "extkb1",
111 .active_low = 1,
112 .debounce_interval = 50,
113 .wakeup = 1,
114 },
115 {
116 .gpio = 152,
117 .type = EV_KEY,
118 .code = KEY_3,
119 .desc = "extkb2",
120 .active_low = 1,
121 .debounce_interval = 50,
122 .wakeup = 1,
123 },
124 {
125 .gpio = 161,
126 .type = EV_KEY,
127 .code = KEY_4,
128 .desc = "extkb3",
129 .active_low = 1,
130 .debounce_interval = 50,
131 .wakeup = 1,
132 },
133 {
134 .gpio = 162,
135 .type = EV_KEY,
136 .code = KEY_5,
137 .desc = "extkb4",
138 .active_low = 1,
139 .debounce_interval = 50,
140 .wakeup = 1,
141 },
142 };
143
144 static struct gpio_keys_platform_data snowball_key_data = {
145 .buttons = snowball_key_array,
146 .nbuttons = ARRAY_SIZE(snowball_key_array),
147 };
148
149 static struct platform_device snowball_key_dev = {
150 .name = "gpio-keys",
151 .id = -1,
152 .dev = {
153 .platform_data = &snowball_key_data,
154 }
155 };
156
157 static struct smsc911x_platform_config snowball_sbnet_cfg = {
158 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
159 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
160 .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
161 .shift = 1,
162 };
163
164 static struct resource sbnet_res[] = {
165 {
166 .name = "smsc911x-memory",
167 .start = (0x5000 << 16),
168 .end = (0x5000 << 16) + 0xffff,
169 .flags = IORESOURCE_MEM,
170 },
171 {
172 .start = NOMADIK_GPIO_TO_IRQ(140),
173 .end = NOMADIK_GPIO_TO_IRQ(140),
174 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
175 },
176 };
177
178 static struct platform_device snowball_sbnet_dev = {
179 .name = "smsc911x",
180 .num_resources = ARRAY_SIZE(sbnet_res),
181 .resource = sbnet_res,
182 .dev = {
183 .platform_data = &snowball_sbnet_cfg,
184 },
185 };
186
187 static struct ab8500_platform_data ab8500_platdata = {
188 .irq_base = MOP500_AB8500_IRQ_BASE,
189 .regulator_reg_init = ab8500_regulator_reg_init,
190 .num_regulator_reg_init = ARRAY_SIZE(ab8500_regulator_reg_init),
191 .regulator = ab8500_regulators,
192 .num_regulator = ARRAY_SIZE(ab8500_regulators),
193 .gpio = &ab8500_gpio_pdata,
194 };
195
196 static struct resource ab8500_resources[] = {
197 [0] = {
198 .start = IRQ_DB8500_AB8500,
199 .end = IRQ_DB8500_AB8500,
200 .flags = IORESOURCE_IRQ
201 }
202 };
203
204 struct platform_device ab8500_device = {
205 .name = "ab8500-i2c",
206 .id = 0,
207 .dev = {
208 .platform_data = &ab8500_platdata,
209 },
210 .num_resources = 1,
211 .resource = ab8500_resources,
212 };
213
214 /*
215 * TPS61052
216 */
217
218 static struct tps6105x_platform_data mop500_tps61052_data = {
219 .mode = TPS6105X_MODE_VOLTAGE,
220 .regulator_data = &tps61052_regulator,
221 };
222
223 /*
224 * TC35892
225 */
226
mop500_tc35892_init(struct tc3589x * tc3589x,unsigned int base)227 static void mop500_tc35892_init(struct tc3589x *tc3589x, unsigned int base)
228 {
229 mop500_sdi_tc35892_init();
230 }
231
232 static struct tc3589x_gpio_platform_data mop500_tc35892_gpio_data = {
233 .gpio_base = MOP500_EGPIO(0),
234 .setup = mop500_tc35892_init,
235 };
236
237 static struct tc3589x_platform_data mop500_tc35892_data = {
238 .block = TC3589x_BLOCK_GPIO,
239 .gpio = &mop500_tc35892_gpio_data,
240 .irq_base = MOP500_EGPIO_IRQ_BASE,
241 };
242
243 static struct lp5521_led_config lp5521_pri_led[] = {
244 [0] = {
245 .chan_nr = 0,
246 .led_current = 0x2f,
247 .max_current = 0x5f,
248 },
249 [1] = {
250 .chan_nr = 1,
251 .led_current = 0x2f,
252 .max_current = 0x5f,
253 },
254 [2] = {
255 .chan_nr = 2,
256 .led_current = 0x2f,
257 .max_current = 0x5f,
258 },
259 };
260
261 static struct lp5521_platform_data __initdata lp5521_pri_data = {
262 .label = "lp5521_pri",
263 .led_config = &lp5521_pri_led[0],
264 .num_channels = 3,
265 .clock_mode = LP5521_CLOCK_EXT,
266 };
267
268 static struct lp5521_led_config lp5521_sec_led[] = {
269 [0] = {
270 .chan_nr = 0,
271 .led_current = 0x2f,
272 .max_current = 0x5f,
273 },
274 [1] = {
275 .chan_nr = 1,
276 .led_current = 0x2f,
277 .max_current = 0x5f,
278 },
279 [2] = {
280 .chan_nr = 2,
281 .led_current = 0x2f,
282 .max_current = 0x5f,
283 },
284 };
285
286 static struct lp5521_platform_data __initdata lp5521_sec_data = {
287 .label = "lp5521_sec",
288 .led_config = &lp5521_sec_led[0],
289 .num_channels = 3,
290 .clock_mode = LP5521_CLOCK_EXT,
291 };
292
293 static struct i2c_board_info __initdata mop500_i2c0_devices[] = {
294 {
295 I2C_BOARD_INFO("tc3589x", 0x42),
296 .irq = NOMADIK_GPIO_TO_IRQ(217),
297 .platform_data = &mop500_tc35892_data,
298 },
299 /* I2C0 devices only available prior to HREFv60 */
300 {
301 I2C_BOARD_INFO("tps61052", 0x33),
302 .platform_data = &mop500_tps61052_data,
303 },
304 };
305
306 #define NUM_PRE_V60_I2C0_DEVICES 1
307
308 static struct i2c_board_info __initdata mop500_i2c2_devices[] = {
309 {
310 /* lp5521 LED driver, 1st device */
311 I2C_BOARD_INFO("lp5521", 0x33),
312 .platform_data = &lp5521_pri_data,
313 },
314 {
315 /* lp5521 LED driver, 2st device */
316 I2C_BOARD_INFO("lp5521", 0x34),
317 .platform_data = &lp5521_sec_data,
318 },
319 {
320 /* Light sensor Rohm BH1780GLI */
321 I2C_BOARD_INFO("bh1780", 0x29),
322 },
323 };
324
325 #define U8500_I2C_CONTROLLER(id, _slsu, _tft, _rft, clk, t_out, _sm) \
326 static struct nmk_i2c_controller u8500_i2c##id##_data = { \
327 /* \
328 * slave data setup time, which is \
329 * 250 ns,100ns,10ns which is 14,6,2 \
330 * respectively for a 48 Mhz \
331 * i2c clock \
332 */ \
333 .slsu = _slsu, \
334 /* Tx FIFO threshold */ \
335 .tft = _tft, \
336 /* Rx FIFO threshold */ \
337 .rft = _rft, \
338 /* std. mode operation */ \
339 .clk_freq = clk, \
340 /* Slave response timeout(ms) */\
341 .timeout = t_out, \
342 .sm = _sm, \
343 }
344
345 /*
346 * The board uses 4 i2c controllers, initialize all of
347 * them with slave data setup time of 250 ns,
348 * Tx & Rx FIFO threshold values as 8 and standard
349 * mode of operation
350 */
351 U8500_I2C_CONTROLLER(0, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST);
352 U8500_I2C_CONTROLLER(1, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST);
353 U8500_I2C_CONTROLLER(2, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST);
354 U8500_I2C_CONTROLLER(3, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST);
355
mop500_i2c_init(void)356 static void __init mop500_i2c_init(void)
357 {
358 db8500_add_i2c0(&u8500_i2c0_data);
359 db8500_add_i2c1(&u8500_i2c1_data);
360 db8500_add_i2c2(&u8500_i2c2_data);
361 db8500_add_i2c3(&u8500_i2c3_data);
362 }
363
364 static struct gpio_keys_button mop500_gpio_keys[] = {
365 {
366 .desc = "SFH7741 Proximity Sensor",
367 .type = EV_SW,
368 .code = SW_FRONT_PROXIMITY,
369 .active_low = 0,
370 .can_disable = 1,
371 }
372 };
373
374 static struct regulator *prox_regulator;
375 static int mop500_prox_activate(struct device *dev);
376 static void mop500_prox_deactivate(struct device *dev);
377
378 static struct gpio_keys_platform_data mop500_gpio_keys_data = {
379 .buttons = mop500_gpio_keys,
380 .nbuttons = ARRAY_SIZE(mop500_gpio_keys),
381 .enable = mop500_prox_activate,
382 .disable = mop500_prox_deactivate,
383 };
384
385 static struct platform_device mop500_gpio_keys_device = {
386 .name = "gpio-keys",
387 .id = 0,
388 .dev = {
389 .platform_data = &mop500_gpio_keys_data,
390 },
391 };
392
mop500_prox_activate(struct device * dev)393 static int mop500_prox_activate(struct device *dev)
394 {
395 prox_regulator = regulator_get(&mop500_gpio_keys_device.dev,
396 "vcc");
397 if (IS_ERR(prox_regulator)) {
398 dev_err(&mop500_gpio_keys_device.dev,
399 "no regulator\n");
400 return PTR_ERR(prox_regulator);
401 }
402 regulator_enable(prox_regulator);
403 return 0;
404 }
405
mop500_prox_deactivate(struct device * dev)406 static void mop500_prox_deactivate(struct device *dev)
407 {
408 regulator_disable(prox_regulator);
409 regulator_put(prox_regulator);
410 }
411
412 /* add any platform devices here - TODO */
413 static struct platform_device *mop500_platform_devs[] __initdata = {
414 &mop500_gpio_keys_device,
415 &ab8500_device,
416 };
417
418 #ifdef CONFIG_STE_DMA40
419 static struct stedma40_chan_cfg ssp0_dma_cfg_rx = {
420 .mode = STEDMA40_MODE_LOGICAL,
421 .dir = STEDMA40_PERIPH_TO_MEM,
422 .src_dev_type = DB8500_DMA_DEV8_SSP0_RX,
423 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
424 .src_info.data_width = STEDMA40_BYTE_WIDTH,
425 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
426 };
427
428 static struct stedma40_chan_cfg ssp0_dma_cfg_tx = {
429 .mode = STEDMA40_MODE_LOGICAL,
430 .dir = STEDMA40_MEM_TO_PERIPH,
431 .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
432 .dst_dev_type = DB8500_DMA_DEV8_SSP0_TX,
433 .src_info.data_width = STEDMA40_BYTE_WIDTH,
434 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
435 };
436 #endif
437
438 static struct pl022_ssp_controller ssp0_platform_data = {
439 .bus_id = 0,
440 #ifdef CONFIG_STE_DMA40
441 .enable_dma = 1,
442 .dma_filter = stedma40_filter,
443 .dma_rx_param = &ssp0_dma_cfg_rx,
444 .dma_tx_param = &ssp0_dma_cfg_tx,
445 #else
446 .enable_dma = 0,
447 #endif
448 /* on this platform, gpio 31,142,144,214 &
449 * 224 are connected as chip selects
450 */
451 .num_chipselect = 5,
452 };
453
mop500_spi_init(void)454 static void __init mop500_spi_init(void)
455 {
456 db8500_add_ssp0(&ssp0_platform_data);
457 }
458
459 #ifdef CONFIG_STE_DMA40
460 static struct stedma40_chan_cfg uart0_dma_cfg_rx = {
461 .mode = STEDMA40_MODE_LOGICAL,
462 .dir = STEDMA40_PERIPH_TO_MEM,
463 .src_dev_type = DB8500_DMA_DEV13_UART0_RX,
464 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
465 .src_info.data_width = STEDMA40_BYTE_WIDTH,
466 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
467 };
468
469 static struct stedma40_chan_cfg uart0_dma_cfg_tx = {
470 .mode = STEDMA40_MODE_LOGICAL,
471 .dir = STEDMA40_MEM_TO_PERIPH,
472 .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
473 .dst_dev_type = DB8500_DMA_DEV13_UART0_TX,
474 .src_info.data_width = STEDMA40_BYTE_WIDTH,
475 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
476 };
477
478 static struct stedma40_chan_cfg uart1_dma_cfg_rx = {
479 .mode = STEDMA40_MODE_LOGICAL,
480 .dir = STEDMA40_PERIPH_TO_MEM,
481 .src_dev_type = DB8500_DMA_DEV12_UART1_RX,
482 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
483 .src_info.data_width = STEDMA40_BYTE_WIDTH,
484 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
485 };
486
487 static struct stedma40_chan_cfg uart1_dma_cfg_tx = {
488 .mode = STEDMA40_MODE_LOGICAL,
489 .dir = STEDMA40_MEM_TO_PERIPH,
490 .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
491 .dst_dev_type = DB8500_DMA_DEV12_UART1_TX,
492 .src_info.data_width = STEDMA40_BYTE_WIDTH,
493 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
494 };
495
496 static struct stedma40_chan_cfg uart2_dma_cfg_rx = {
497 .mode = STEDMA40_MODE_LOGICAL,
498 .dir = STEDMA40_PERIPH_TO_MEM,
499 .src_dev_type = DB8500_DMA_DEV11_UART2_RX,
500 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
501 .src_info.data_width = STEDMA40_BYTE_WIDTH,
502 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
503 };
504
505 static struct stedma40_chan_cfg uart2_dma_cfg_tx = {
506 .mode = STEDMA40_MODE_LOGICAL,
507 .dir = STEDMA40_MEM_TO_PERIPH,
508 .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
509 .dst_dev_type = DB8500_DMA_DEV11_UART2_TX,
510 .src_info.data_width = STEDMA40_BYTE_WIDTH,
511 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
512 };
513 #endif
514
515
516 static pin_cfg_t mop500_pins_uart0[] = {
517 GPIO0_U0_CTSn | PIN_INPUT_PULLUP,
518 GPIO1_U0_RTSn | PIN_OUTPUT_HIGH,
519 GPIO2_U0_RXD | PIN_INPUT_PULLUP,
520 GPIO3_U0_TXD | PIN_OUTPUT_HIGH,
521 };
522
523 #define PRCC_K_SOFTRST_SET 0x18
524 #define PRCC_K_SOFTRST_CLEAR 0x1C
ux500_uart0_reset(void)525 static void ux500_uart0_reset(void)
526 {
527 void __iomem *prcc_rst_set, *prcc_rst_clr;
528
529 prcc_rst_set = (void __iomem *)IO_ADDRESS(U8500_CLKRST1_BASE +
530 PRCC_K_SOFTRST_SET);
531 prcc_rst_clr = (void __iomem *)IO_ADDRESS(U8500_CLKRST1_BASE +
532 PRCC_K_SOFTRST_CLEAR);
533
534 /* Activate soft reset PRCC_K_SOFTRST_CLEAR */
535 writel((readl(prcc_rst_clr) | 0x1), prcc_rst_clr);
536 udelay(1);
537
538 /* Release soft reset PRCC_K_SOFTRST_SET */
539 writel((readl(prcc_rst_set) | 0x1), prcc_rst_set);
540 udelay(1);
541 }
542
ux500_uart0_init(void)543 static void ux500_uart0_init(void)
544 {
545 int ret;
546
547 ret = nmk_config_pins(mop500_pins_uart0,
548 ARRAY_SIZE(mop500_pins_uart0));
549 if (ret < 0)
550 pr_err("pl011: uart pins_enable failed\n");
551 }
552
ux500_uart0_exit(void)553 static void ux500_uart0_exit(void)
554 {
555 int ret;
556
557 ret = nmk_config_pins_sleep(mop500_pins_uart0,
558 ARRAY_SIZE(mop500_pins_uart0));
559 if (ret < 0)
560 pr_err("pl011: uart pins_disable failed\n");
561 }
562
563 static struct amba_pl011_data uart0_plat = {
564 #ifdef CONFIG_STE_DMA40
565 .dma_filter = stedma40_filter,
566 .dma_rx_param = &uart0_dma_cfg_rx,
567 .dma_tx_param = &uart0_dma_cfg_tx,
568 #endif
569 .init = ux500_uart0_init,
570 .exit = ux500_uart0_exit,
571 .reset = ux500_uart0_reset,
572 };
573
574 static struct amba_pl011_data uart1_plat = {
575 #ifdef CONFIG_STE_DMA40
576 .dma_filter = stedma40_filter,
577 .dma_rx_param = &uart1_dma_cfg_rx,
578 .dma_tx_param = &uart1_dma_cfg_tx,
579 #endif
580 };
581
582 static struct amba_pl011_data uart2_plat = {
583 #ifdef CONFIG_STE_DMA40
584 .dma_filter = stedma40_filter,
585 .dma_rx_param = &uart2_dma_cfg_rx,
586 .dma_tx_param = &uart2_dma_cfg_tx,
587 #endif
588 };
589
mop500_uart_init(void)590 static void __init mop500_uart_init(void)
591 {
592 db8500_add_uart0(&uart0_plat);
593 db8500_add_uart1(&uart1_plat);
594 db8500_add_uart2(&uart2_plat);
595 }
596
597 static struct platform_device *snowball_platform_devs[] __initdata = {
598 &snowball_led_dev,
599 &snowball_key_dev,
600 &snowball_sbnet_dev,
601 &ab8500_device,
602 };
603
mop500_init_machine(void)604 static void __init mop500_init_machine(void)
605 {
606 int i2c0_devs;
607
608 mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;
609
610 u8500_init_devices();
611
612 mop500_pins_init();
613
614 platform_add_devices(mop500_platform_devs,
615 ARRAY_SIZE(mop500_platform_devs));
616
617 mop500_i2c_init();
618 mop500_sdi_init();
619 mop500_spi_init();
620 mop500_uart_init();
621
622 i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
623
624 i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
625 i2c_register_board_info(2, mop500_i2c2_devices,
626 ARRAY_SIZE(mop500_i2c2_devices));
627
628 /* This board has full regulator constraints */
629 regulator_has_full_constraints();
630 }
631
snowball_init_machine(void)632 static void __init snowball_init_machine(void)
633 {
634 int i2c0_devs;
635
636 u8500_init_devices();
637
638 snowball_pins_init();
639
640 platform_add_devices(snowball_platform_devs,
641 ARRAY_SIZE(snowball_platform_devs));
642
643 mop500_i2c_init();
644 snowball_sdi_init();
645 mop500_spi_init();
646 mop500_uart_init();
647
648 i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
649 i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
650 i2c_register_board_info(2, mop500_i2c2_devices,
651 ARRAY_SIZE(mop500_i2c2_devices));
652
653 /* This board has full regulator constraints */
654 regulator_has_full_constraints();
655 }
656
hrefv60_init_machine(void)657 static void __init hrefv60_init_machine(void)
658 {
659 int i2c0_devs;
660
661 /*
662 * The HREFv60 board removed a GPIO expander and routed
663 * all these GPIO pins to the internal GPIO controller
664 * instead.
665 */
666 mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO;
667
668 u8500_init_devices();
669
670 hrefv60_pins_init();
671
672 platform_add_devices(mop500_platform_devs,
673 ARRAY_SIZE(mop500_platform_devs));
674
675 mop500_i2c_init();
676 hrefv60_sdi_init();
677 mop500_spi_init();
678 mop500_uart_init();
679
680 i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
681
682 i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES;
683
684 i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
685 i2c_register_board_info(2, mop500_i2c2_devices,
686 ARRAY_SIZE(mop500_i2c2_devices));
687
688 /* This board has full regulator constraints */
689 regulator_has_full_constraints();
690 }
691
692 MACHINE_START(U8500, "ST-Ericsson MOP500 platform")
693 /* Maintainer: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> */
694 .atag_offset = 0x100,
695 .map_io = u8500_map_io,
696 .init_irq = ux500_init_irq,
697 /* we re-use nomadik timer here */
698 .timer = &ux500_timer,
699 .handle_irq = gic_handle_irq,
700 .init_machine = mop500_init_machine,
701 MACHINE_END
702
703 MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+")
704 .atag_offset = 0x100,
705 .map_io = u8500_map_io,
706 .init_irq = ux500_init_irq,
707 .timer = &ux500_timer,
708 .handle_irq = gic_handle_irq,
709 .init_machine = hrefv60_init_machine,
710 MACHINE_END
711
712 MACHINE_START(SNOWBALL, "Calao Systems Snowball platform")
713 .atag_offset = 0x100,
714 .map_io = u8500_map_io,
715 .init_irq = ux500_init_irq,
716 /* we re-use nomadik timer here */
717 .timer = &ux500_timer,
718 .handle_irq = gic_handle_irq,
719 .init_machine = snowball_init_machine,
720 MACHINE_END
721