1 /*
2  * Copyright (C) 2010,2011 Google, Inc.
3  *
4  * Author:
5  *	Colin Cross <ccross@android.com>
6  *	Erik Gilling <ccross@android.com>
7  *
8  * This software is licensed under the terms of the GNU General Public
9  * License version 2, as published by the Free Software Foundation, and
10  * may be copied, distributed, and modified under those terms.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  */
18 
19 
20 #include <linux/resource.h>
21 #include <linux/platform_device.h>
22 #include <linux/dma-mapping.h>
23 #include <linux/fsl_devices.h>
24 #include <linux/serial_8250.h>
25 #include <linux/i2c-tegra.h>
26 #include <linux/platform_data/tegra_usb.h>
27 #include <asm/pmu.h>
28 #include <mach/irqs.h>
29 #include <mach/iomap.h>
30 #include <mach/dma.h>
31 #include <mach/usb_phy.h>
32 
33 #include "gpio-names.h"
34 #include "devices.h"
35 
36 static struct resource gpio_resource[] = {
37 	[0] = {
38 		.start	= TEGRA_GPIO_BASE,
39 		.end	= TEGRA_GPIO_BASE + TEGRA_GPIO_SIZE-1,
40 		.flags	= IORESOURCE_MEM,
41 	},
42 	[1] = {
43 		.start	= INT_GPIO1,
44 		.end	= INT_GPIO1,
45 		.flags	= IORESOURCE_IRQ,
46 	},
47 	[2] = {
48 		.start	= INT_GPIO2,
49 		.end	= INT_GPIO2,
50 		.flags	= IORESOURCE_IRQ,
51 	},
52 	[3] = {
53 		.start	= INT_GPIO3,
54 		.end	= INT_GPIO3,
55 		.flags	= IORESOURCE_IRQ,
56 	},
57 	[4] = {
58 		.start	= INT_GPIO4,
59 		.end	= INT_GPIO4,
60 		.flags	= IORESOURCE_IRQ,
61 	},
62 	[5] = {
63 		.start	= INT_GPIO5,
64 		.end	= INT_GPIO5,
65 		.flags	= IORESOURCE_IRQ,
66 	},
67 	[6] = {
68 		.start	= INT_GPIO6,
69 		.end	= INT_GPIO6,
70 		.flags	= IORESOURCE_IRQ,
71 	},
72 	[7] = {
73 		.start	= INT_GPIO7,
74 		.end	= INT_GPIO7,
75 		.flags	= IORESOURCE_IRQ,
76 	},
77 };
78 
79 struct platform_device tegra_gpio_device = {
80 	.name		= "tegra-gpio",
81 	.id		= -1,
82 	.resource	= gpio_resource,
83 	.num_resources	= ARRAY_SIZE(gpio_resource),
84 };
85 
86 static struct resource pinmux_resource[] = {
87 	[0] = {
88 		/* Tri-state registers */
89 		.start	= TEGRA_APB_MISC_BASE + 0x14,
90 		.end	= TEGRA_APB_MISC_BASE + 0x20 + 3,
91 		.flags	= IORESOURCE_MEM,
92 	},
93 	[1] = {
94 		/* Mux registers */
95 		.start	= TEGRA_APB_MISC_BASE + 0x80,
96 		.end	= TEGRA_APB_MISC_BASE + 0x9c + 3,
97 		.flags	= IORESOURCE_MEM,
98 	},
99 	[2] = {
100 		/* Pull-up/down registers */
101 		.start	= TEGRA_APB_MISC_BASE + 0xa0,
102 		.end	= TEGRA_APB_MISC_BASE + 0xb0 + 3,
103 		.flags	= IORESOURCE_MEM,
104 	},
105 	[3] = {
106 		/* Pad control registers */
107 		.start	= TEGRA_APB_MISC_BASE + 0x868,
108 		.end	= TEGRA_APB_MISC_BASE + 0x90c + 3,
109 		.flags	= IORESOURCE_MEM,
110 	},
111 };
112 
113 struct platform_device tegra_pinmux_device = {
114 	.name		= "tegra-pinmux",
115 	.id		= -1,
116 	.resource	= pinmux_resource,
117 	.num_resources	= ARRAY_SIZE(pinmux_resource),
118 };
119 
120 static struct resource i2c_resource1[] = {
121 	[0] = {
122 		.start	= INT_I2C,
123 		.end	= INT_I2C,
124 		.flags	= IORESOURCE_IRQ,
125 	},
126 	[1] = {
127 		.start	= TEGRA_I2C_BASE,
128 		.end	= TEGRA_I2C_BASE + TEGRA_I2C_SIZE-1,
129 		.flags	= IORESOURCE_MEM,
130 	},
131 };
132 
133 static struct resource i2c_resource2[] = {
134 	[0] = {
135 		.start	= INT_I2C2,
136 		.end	= INT_I2C2,
137 		.flags	= IORESOURCE_IRQ,
138 	},
139 	[1] = {
140 		.start	= TEGRA_I2C2_BASE,
141 		.end	= TEGRA_I2C2_BASE + TEGRA_I2C2_SIZE-1,
142 		.flags	= IORESOURCE_MEM,
143 	},
144 };
145 
146 static struct resource i2c_resource3[] = {
147 	[0] = {
148 		.start	= INT_I2C3,
149 		.end	= INT_I2C3,
150 		.flags	= IORESOURCE_IRQ,
151 	},
152 	[1] = {
153 		.start	= TEGRA_I2C3_BASE,
154 		.end	= TEGRA_I2C3_BASE + TEGRA_I2C3_SIZE-1,
155 		.flags	= IORESOURCE_MEM,
156 	},
157 };
158 
159 static struct resource i2c_resource4[] = {
160 	[0] = {
161 		.start	= INT_DVC,
162 		.end	= INT_DVC,
163 		.flags	= IORESOURCE_IRQ,
164 	},
165 	[1] = {
166 		.start	= TEGRA_DVC_BASE,
167 		.end	= TEGRA_DVC_BASE + TEGRA_DVC_SIZE-1,
168 		.flags	= IORESOURCE_MEM,
169 	},
170 };
171 
172 static struct tegra_i2c_platform_data tegra_i2c1_platform_data = {
173 	.bus_clk_rate   = 400000,
174 };
175 
176 static struct tegra_i2c_platform_data tegra_i2c2_platform_data = {
177 	.bus_clk_rate   = 400000,
178 };
179 
180 static struct tegra_i2c_platform_data tegra_i2c3_platform_data = {
181 	.bus_clk_rate   = 400000,
182 };
183 
184 static struct tegra_i2c_platform_data tegra_dvc_platform_data = {
185 	.bus_clk_rate   = 400000,
186 };
187 
188 struct platform_device tegra_i2c_device1 = {
189 	.name		= "tegra-i2c",
190 	.id		= 0,
191 	.resource	= i2c_resource1,
192 	.num_resources	= ARRAY_SIZE(i2c_resource1),
193 	.dev = {
194 		.platform_data = &tegra_i2c1_platform_data,
195 	},
196 };
197 
198 struct platform_device tegra_i2c_device2 = {
199 	.name		= "tegra-i2c",
200 	.id		= 1,
201 	.resource	= i2c_resource2,
202 	.num_resources	= ARRAY_SIZE(i2c_resource2),
203 	.dev = {
204 		.platform_data = &tegra_i2c2_platform_data,
205 	},
206 };
207 
208 struct platform_device tegra_i2c_device3 = {
209 	.name		= "tegra-i2c",
210 	.id		= 2,
211 	.resource	= i2c_resource3,
212 	.num_resources	= ARRAY_SIZE(i2c_resource3),
213 	.dev = {
214 		.platform_data = &tegra_i2c3_platform_data,
215 	},
216 };
217 
218 struct platform_device tegra_i2c_device4 = {
219 	.name		= "tegra-i2c",
220 	.id		= 3,
221 	.resource	= i2c_resource4,
222 	.num_resources	= ARRAY_SIZE(i2c_resource4),
223 	.dev = {
224 		.platform_data = &tegra_dvc_platform_data,
225 	},
226 };
227 
228 static struct resource spi_resource1[] = {
229 	[0] = {
230 		.start	= INT_S_LINK1,
231 		.end	= INT_S_LINK1,
232 		.flags	= IORESOURCE_IRQ,
233 	},
234 	[1] = {
235 		.start	= TEGRA_SPI1_BASE,
236 		.end	= TEGRA_SPI1_BASE + TEGRA_SPI1_SIZE-1,
237 		.flags	= IORESOURCE_MEM,
238 	},
239 };
240 
241 static struct resource spi_resource2[] = {
242 	[0] = {
243 		.start	= INT_SPI_2,
244 		.end	= INT_SPI_2,
245 		.flags	= IORESOURCE_IRQ,
246 	},
247 	[1] = {
248 		.start	= TEGRA_SPI2_BASE,
249 		.end	= TEGRA_SPI2_BASE + TEGRA_SPI2_SIZE-1,
250 		.flags	= IORESOURCE_MEM,
251 	},
252 };
253 
254 static struct resource spi_resource3[] = {
255 	[0] = {
256 		.start	= INT_SPI_3,
257 		.end	= INT_SPI_3,
258 		.flags	= IORESOURCE_IRQ,
259 	},
260 	[1] = {
261 		.start	= TEGRA_SPI3_BASE,
262 		.end	= TEGRA_SPI3_BASE + TEGRA_SPI3_SIZE-1,
263 		.flags	= IORESOURCE_MEM,
264 	},
265 };
266 
267 static struct resource spi_resource4[] = {
268 	[0] = {
269 		.start	= INT_SPI_4,
270 		.end	= INT_SPI_4,
271 		.flags	= IORESOURCE_IRQ,
272 	},
273 	[1] = {
274 		.start	= TEGRA_SPI4_BASE,
275 		.end	= TEGRA_SPI4_BASE + TEGRA_SPI4_SIZE-1,
276 		.flags	= IORESOURCE_MEM,
277 	},
278 };
279 
280 struct platform_device tegra_spi_device1 = {
281 	.name		= "spi_tegra",
282 	.id		= 0,
283 	.resource	= spi_resource1,
284 	.num_resources	= ARRAY_SIZE(spi_resource1),
285 	.dev		= {
286 		.coherent_dma_mask	= 0xffffffff,
287 	},
288 };
289 
290 struct platform_device tegra_spi_device2 = {
291 	.name		= "spi_tegra",
292 	.id		= 1,
293 	.resource	= spi_resource2,
294 	.num_resources	= ARRAY_SIZE(spi_resource2),
295 	.dev		= {
296 		.coherent_dma_mask	= 0xffffffff,
297 	},
298 };
299 
300 struct platform_device tegra_spi_device3 = {
301 	.name		= "spi_tegra",
302 	.id		= 2,
303 	.resource	= spi_resource3,
304 	.num_resources	= ARRAY_SIZE(spi_resource3),
305 	.dev		= {
306 		.coherent_dma_mask	= 0xffffffff,
307 	},
308 };
309 
310 struct platform_device tegra_spi_device4 = {
311 	.name		= "spi_tegra",
312 	.id		= 3,
313 	.resource	= spi_resource4,
314 	.num_resources	= ARRAY_SIZE(spi_resource4),
315 	.dev		= {
316 		.coherent_dma_mask	= 0xffffffff,
317 	},
318 };
319 
320 
321 static struct resource sdhci_resource1[] = {
322 	[0] = {
323 		.start	= INT_SDMMC1,
324 		.end	= INT_SDMMC1,
325 		.flags	= IORESOURCE_IRQ,
326 	},
327 	[1] = {
328 		.start	= TEGRA_SDMMC1_BASE,
329 		.end	= TEGRA_SDMMC1_BASE + TEGRA_SDMMC1_SIZE-1,
330 		.flags	= IORESOURCE_MEM,
331 	},
332 };
333 
334 static struct resource sdhci_resource2[] = {
335 	[0] = {
336 		.start	= INT_SDMMC2,
337 		.end	= INT_SDMMC2,
338 		.flags	= IORESOURCE_IRQ,
339 	},
340 	[1] = {
341 		.start	= TEGRA_SDMMC2_BASE,
342 		.end	= TEGRA_SDMMC2_BASE + TEGRA_SDMMC2_SIZE-1,
343 		.flags	= IORESOURCE_MEM,
344 	},
345 };
346 
347 static struct resource sdhci_resource3[] = {
348 	[0] = {
349 		.start	= INT_SDMMC3,
350 		.end	= INT_SDMMC3,
351 		.flags	= IORESOURCE_IRQ,
352 	},
353 	[1] = {
354 		.start	= TEGRA_SDMMC3_BASE,
355 		.end	= TEGRA_SDMMC3_BASE + TEGRA_SDMMC3_SIZE-1,
356 		.flags	= IORESOURCE_MEM,
357 	},
358 };
359 
360 static struct resource sdhci_resource4[] = {
361 	[0] = {
362 		.start	= INT_SDMMC4,
363 		.end	= INT_SDMMC4,
364 		.flags	= IORESOURCE_IRQ,
365 	},
366 	[1] = {
367 		.start	= TEGRA_SDMMC4_BASE,
368 		.end	= TEGRA_SDMMC4_BASE + TEGRA_SDMMC4_SIZE-1,
369 		.flags	= IORESOURCE_MEM,
370 	},
371 };
372 
373 /* board files should fill in platform_data register the devices themselvs.
374  * See board-harmony.c for an example
375  */
376 struct platform_device tegra_sdhci_device1 = {
377 	.name		= "sdhci-tegra",
378 	.id		= 0,
379 	.resource	= sdhci_resource1,
380 	.num_resources	= ARRAY_SIZE(sdhci_resource1),
381 };
382 
383 struct platform_device tegra_sdhci_device2 = {
384 	.name		= "sdhci-tegra",
385 	.id		= 1,
386 	.resource	= sdhci_resource2,
387 	.num_resources	= ARRAY_SIZE(sdhci_resource2),
388 };
389 
390 struct platform_device tegra_sdhci_device3 = {
391 	.name		= "sdhci-tegra",
392 	.id		= 2,
393 	.resource	= sdhci_resource3,
394 	.num_resources	= ARRAY_SIZE(sdhci_resource3),
395 };
396 
397 struct platform_device tegra_sdhci_device4 = {
398 	.name		= "sdhci-tegra",
399 	.id		= 3,
400 	.resource	= sdhci_resource4,
401 	.num_resources	= ARRAY_SIZE(sdhci_resource4),
402 };
403 
404 static struct resource tegra_usb1_resources[] = {
405 	[0] = {
406 		.start	= TEGRA_USB_BASE,
407 		.end	= TEGRA_USB_BASE + TEGRA_USB_SIZE - 1,
408 		.flags	= IORESOURCE_MEM,
409 	},
410 	[1] = {
411 		.start	= INT_USB,
412 		.end	= INT_USB,
413 		.flags	= IORESOURCE_IRQ,
414 	},
415 };
416 
417 static struct resource tegra_usb2_resources[] = {
418 	[0] = {
419 		.start	= TEGRA_USB2_BASE,
420 		.end	= TEGRA_USB2_BASE + TEGRA_USB2_SIZE - 1,
421 		.flags	= IORESOURCE_MEM,
422 	},
423 	[1] = {
424 		.start	= INT_USB2,
425 		.end	= INT_USB2,
426 		.flags	= IORESOURCE_IRQ,
427 	},
428 };
429 
430 static struct resource tegra_usb3_resources[] = {
431 	[0] = {
432 		.start	= TEGRA_USB3_BASE,
433 		.end	= TEGRA_USB3_BASE + TEGRA_USB3_SIZE - 1,
434 		.flags	= IORESOURCE_MEM,
435 	},
436 	[1] = {
437 		.start	= INT_USB3,
438 		.end	= INT_USB3,
439 		.flags	= IORESOURCE_IRQ,
440 	},
441 };
442 
443 static struct tegra_ulpi_config tegra_ehci2_ulpi_phy_config = {
444 	/* All existing boards use GPIO PV0 for phy reset */
445 	.reset_gpio = TEGRA_GPIO_PV0,
446 	.clk = "cdev2",
447 };
448 
449 static struct tegra_ehci_platform_data tegra_ehci1_pdata = {
450 	.operating_mode = TEGRA_USB_OTG,
451 	.power_down_on_bus_suspend = 1,
452 };
453 
454 static struct tegra_ehci_platform_data tegra_ehci2_pdata = {
455 	.phy_config = &tegra_ehci2_ulpi_phy_config,
456 	.operating_mode = TEGRA_USB_HOST,
457 	.power_down_on_bus_suspend = 1,
458 };
459 
460 static struct tegra_ehci_platform_data tegra_ehci3_pdata = {
461 	.operating_mode = TEGRA_USB_HOST,
462 	.power_down_on_bus_suspend = 1,
463 };
464 
465 static u64 tegra_ehci_dmamask = DMA_BIT_MASK(32);
466 
467 struct platform_device tegra_ehci1_device = {
468 	.name	= "tegra-ehci",
469 	.id	= 0,
470 	.dev	= {
471 		.dma_mask	= &tegra_ehci_dmamask,
472 		.coherent_dma_mask = DMA_BIT_MASK(32),
473 		.platform_data = &tegra_ehci1_pdata,
474 	},
475 	.resource = tegra_usb1_resources,
476 	.num_resources = ARRAY_SIZE(tegra_usb1_resources),
477 };
478 
479 struct platform_device tegra_ehci2_device = {
480 	.name	= "tegra-ehci",
481 	.id	= 1,
482 	.dev	= {
483 		.dma_mask	= &tegra_ehci_dmamask,
484 		.coherent_dma_mask = DMA_BIT_MASK(32),
485 		.platform_data = &tegra_ehci2_pdata,
486 	},
487 	.resource = tegra_usb2_resources,
488 	.num_resources = ARRAY_SIZE(tegra_usb2_resources),
489 };
490 
491 struct platform_device tegra_ehci3_device = {
492 	.name	= "tegra-ehci",
493 	.id	= 2,
494 	.dev	= {
495 		.dma_mask	= &tegra_ehci_dmamask,
496 		.coherent_dma_mask = DMA_BIT_MASK(32),
497 		.platform_data = &tegra_ehci3_pdata,
498 	},
499 	.resource = tegra_usb3_resources,
500 	.num_resources = ARRAY_SIZE(tegra_usb3_resources),
501 };
502 
503 static struct resource tegra_pmu_resources[] = {
504 	[0] = {
505 		.start	= INT_CPU0_PMU_INTR,
506 		.end	= INT_CPU0_PMU_INTR,
507 		.flags	= IORESOURCE_IRQ,
508 	},
509 	[1] = {
510 		.start	= INT_CPU1_PMU_INTR,
511 		.end	= INT_CPU1_PMU_INTR,
512 		.flags	= IORESOURCE_IRQ,
513 	},
514 };
515 
516 struct platform_device tegra_pmu_device = {
517 	.name		= "arm-pmu",
518 	.id		= ARM_PMU_DEVICE_CPU,
519 	.num_resources	= ARRAY_SIZE(tegra_pmu_resources),
520 	.resource	= tegra_pmu_resources,
521 };
522 
523 static struct resource tegra_uarta_resources[] = {
524 	[0] = {
525 		.start	= TEGRA_UARTA_BASE,
526 		.end	= TEGRA_UARTA_BASE + TEGRA_UARTA_SIZE - 1,
527 		.flags	= IORESOURCE_MEM,
528 	},
529 	[1] = {
530 		.start	= INT_UARTA,
531 		.end	= INT_UARTA,
532 		.flags	= IORESOURCE_IRQ,
533 	},
534 };
535 
536 static struct resource tegra_uartb_resources[] = {
537 	[0] = {
538 		.start	= TEGRA_UARTB_BASE,
539 		.end	= TEGRA_UARTB_BASE + TEGRA_UARTB_SIZE - 1,
540 		.flags	= IORESOURCE_MEM,
541 	},
542 	[1] = {
543 		.start	= INT_UARTB,
544 		.end	= INT_UARTB,
545 		.flags	= IORESOURCE_IRQ,
546 	},
547 };
548 
549 static struct resource tegra_uartc_resources[] = {
550 	[0] = {
551 		.start	= TEGRA_UARTC_BASE,
552 		.end	= TEGRA_UARTC_BASE + TEGRA_UARTC_SIZE - 1,
553 		.flags	= IORESOURCE_MEM,
554 	},
555 	[1] = {
556 		.start	= INT_UARTC,
557 		.end	= INT_UARTC,
558 		.flags	= IORESOURCE_IRQ,
559 	},
560 };
561 
562 static struct resource tegra_uartd_resources[] = {
563 	[0] = {
564 		.start	= TEGRA_UARTD_BASE,
565 		.end	= TEGRA_UARTD_BASE + TEGRA_UARTD_SIZE - 1,
566 		.flags	= IORESOURCE_MEM,
567 	},
568 	[1] = {
569 		.start	= INT_UARTD,
570 		.end	= INT_UARTD,
571 		.flags	= IORESOURCE_IRQ,
572 	},
573 };
574 
575 static struct resource tegra_uarte_resources[] = {
576 	[0] = {
577 		.start	= TEGRA_UARTE_BASE,
578 		.end	= TEGRA_UARTE_BASE + TEGRA_UARTE_SIZE - 1,
579 		.flags	= IORESOURCE_MEM,
580 	},
581 	[1] = {
582 		.start	= INT_UARTE,
583 		.end	= INT_UARTE,
584 		.flags	= IORESOURCE_IRQ,
585 	},
586 };
587 
588 struct platform_device tegra_uarta_device = {
589 	.name	= "tegra_uart",
590 	.id	= 0,
591 	.num_resources	= ARRAY_SIZE(tegra_uarta_resources),
592 	.resource	= tegra_uarta_resources,
593 	.dev	= {
594 		.coherent_dma_mask	= DMA_BIT_MASK(32),
595 	},
596 };
597 
598 struct platform_device tegra_uartb_device = {
599 	.name	= "tegra_uart",
600 	.id	= 1,
601 	.num_resources	= ARRAY_SIZE(tegra_uartb_resources),
602 	.resource	= tegra_uartb_resources,
603 	.dev	= {
604 		.coherent_dma_mask	= DMA_BIT_MASK(32),
605 	},
606 };
607 
608 struct platform_device tegra_uartc_device = {
609 	.name	= "tegra_uart",
610 	.id	= 2,
611 	.num_resources	= ARRAY_SIZE(tegra_uartc_resources),
612 	.resource	= tegra_uartc_resources,
613 	.dev	= {
614 		.coherent_dma_mask	= DMA_BIT_MASK(32),
615 	},
616 };
617 
618 struct platform_device tegra_uartd_device = {
619 	.name	= "tegra_uart",
620 	.id	= 3,
621 	.num_resources	= ARRAY_SIZE(tegra_uartd_resources),
622 	.resource	= tegra_uartd_resources,
623 	.dev	= {
624 		.coherent_dma_mask	= DMA_BIT_MASK(32),
625 	},
626 };
627 
628 struct platform_device tegra_uarte_device = {
629 	.name	= "tegra_uart",
630 	.id	= 4,
631 	.num_resources	= ARRAY_SIZE(tegra_uarte_resources),
632 	.resource	= tegra_uarte_resources,
633 	.dev	= {
634 		.coherent_dma_mask	= DMA_BIT_MASK(32),
635 	},
636 };
637 
638 static struct resource i2s_resource1[] = {
639 	[0] = {
640 		.start	= INT_I2S1,
641 		.end	= INT_I2S1,
642 		.flags	= IORESOURCE_IRQ
643 	},
644 	[1] = {
645 		.start	= TEGRA_DMA_REQ_SEL_I2S_1,
646 		.end	= TEGRA_DMA_REQ_SEL_I2S_1,
647 		.flags	= IORESOURCE_DMA
648 	},
649 	[2] = {
650 		.start	= TEGRA_I2S1_BASE,
651 		.end	= TEGRA_I2S1_BASE + TEGRA_I2S1_SIZE - 1,
652 		.flags	= IORESOURCE_MEM
653 	}
654 };
655 
656 static struct resource i2s_resource2[] = {
657 	[0] = {
658 		.start	= INT_I2S2,
659 		.end	= INT_I2S2,
660 		.flags	= IORESOURCE_IRQ
661 	},
662 	[1] = {
663 		.start	= TEGRA_DMA_REQ_SEL_I2S2_1,
664 		.end	= TEGRA_DMA_REQ_SEL_I2S2_1,
665 		.flags	= IORESOURCE_DMA
666 	},
667 	[2] = {
668 		.start	= TEGRA_I2S2_BASE,
669 		.end	= TEGRA_I2S2_BASE + TEGRA_I2S2_SIZE - 1,
670 		.flags	= IORESOURCE_MEM
671 	}
672 };
673 
674 struct platform_device tegra_i2s_device1 = {
675 	.name		= "tegra-i2s",
676 	.id		= 0,
677 	.resource	= i2s_resource1,
678 	.num_resources	= ARRAY_SIZE(i2s_resource1),
679 };
680 
681 struct platform_device tegra_i2s_device2 = {
682 	.name		= "tegra-i2s",
683 	.id		= 1,
684 	.resource	= i2s_resource2,
685 	.num_resources	= ARRAY_SIZE(i2s_resource2),
686 };
687 
688 static struct resource tegra_das_resources[] = {
689 	[0] = {
690 		.start = TEGRA_APB_MISC_DAS_BASE,
691 		.end = TEGRA_APB_MISC_DAS_BASE + TEGRA_APB_MISC_DAS_SIZE - 1,
692 		.flags = IORESOURCE_MEM,
693 	},
694 };
695 
696 struct platform_device tegra_das_device = {
697 	.name		= "tegra-das",
698 	.id		= -1,
699 	.num_resources	= ARRAY_SIZE(tegra_das_resources),
700 	.resource	= tegra_das_resources,
701 };
702 
703 struct platform_device tegra_pcm_device = {
704 	.name = "tegra-pcm-audio",
705 	.id = -1,
706 };
707