1 /*
2 * linux/arch/arm/mach-sa1100/nanoengine.c
3 *
4 * Bright Star Engineering's nanoEngine board init code.
5 *
6 * Copyright (C) 2010 Marcelo Roberto Jimenez <mroberto@cpti.cetuc.puc-rio.br>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14 #include <linux/init.h>
15 #include <linux/kernel.h>
16 #include <linux/mtd/mtd.h>
17 #include <linux/mtd/partitions.h>
18 #include <linux/root_dev.h>
19
20 #include <asm/mach-types.h>
21 #include <asm/setup.h>
22 #include <asm/page.h>
23
24 #include <asm/mach/arch.h>
25 #include <asm/mach/flash.h>
26 #include <asm/mach/map.h>
27 #include <asm/mach/serial_sa1100.h>
28
29 #include <mach/hardware.h>
30 #include <mach/nanoengine.h>
31
32 #include "generic.h"
33
34 /* Flash bank 0 */
35 static struct mtd_partition nanoengine_partitions[] = {
36 {
37 .name = "nanoEngine boot firmware and parameter table",
38 .size = 0x00010000, /* 32K */
39 .offset = 0,
40 .mask_flags = MTD_WRITEABLE,
41 }, {
42 .name = "kernel/initrd reserved",
43 .size = 0x002f0000,
44 .offset = 0x00010000,
45 .mask_flags = MTD_WRITEABLE,
46 }, {
47 .name = "experimental filesystem allocation",
48 .size = 0x00100000,
49 .offset = 0x00300000,
50 .mask_flags = MTD_WRITEABLE,
51 }
52 };
53
54 static struct flash_platform_data nanoengine_flash_data = {
55 .map_name = "jedec_probe",
56 .parts = nanoengine_partitions,
57 .nr_parts = ARRAY_SIZE(nanoengine_partitions),
58 };
59
60 static struct resource nanoengine_flash_resources[] = {
61 {
62 .start = SA1100_CS0_PHYS,
63 .end = SA1100_CS0_PHYS + SZ_32M - 1,
64 .flags = IORESOURCE_MEM,
65 }, {
66 .start = SA1100_CS1_PHYS,
67 .end = SA1100_CS1_PHYS + SZ_32M - 1,
68 .flags = IORESOURCE_MEM,
69 }
70 };
71
72 static struct map_desc nanoengine_io_desc[] __initdata = {
73 {
74 /* System Registers */
75 .virtual = 0xf0000000,
76 .pfn = __phys_to_pfn(0x10000000),
77 .length = 0x00100000,
78 .type = MT_DEVICE
79 }, {
80 /* Internal PCI Memory Read/Write */
81 .virtual = NANO_PCI_MEM_RW_VIRT,
82 .pfn = __phys_to_pfn(NANO_PCI_MEM_RW_PHYS),
83 .length = NANO_PCI_MEM_RW_SIZE,
84 .type = MT_DEVICE
85 }, {
86 /* Internal PCI Config Space */
87 .virtual = NANO_PCI_CONFIG_SPACE_VIRT,
88 .pfn = __phys_to_pfn(NANO_PCI_CONFIG_SPACE_PHYS),
89 .length = NANO_PCI_CONFIG_SPACE_SIZE,
90 .type = MT_DEVICE
91 }
92 };
93
nanoengine_map_io(void)94 static void __init nanoengine_map_io(void)
95 {
96 sa1100_map_io();
97 iotable_init(nanoengine_io_desc, ARRAY_SIZE(nanoengine_io_desc));
98
99 sa1100_register_uart(0, 1);
100 sa1100_register_uart(1, 2);
101 sa1100_register_uart(2, 3);
102 Ser1SDCR0 |= SDCR0_UART;
103 /* disable IRDA -- UART2 is used as a normal serial port */
104 Ser2UTCR4 = 0;
105 Ser2HSCR0 = 0;
106 }
107
nanoengine_init(void)108 static void __init nanoengine_init(void)
109 {
110 sa11x0_register_mtd(&nanoengine_flash_data, nanoengine_flash_resources,
111 ARRAY_SIZE(nanoengine_flash_resources));
112 }
113
114 MACHINE_START(NANOENGINE, "BSE nanoEngine")
115 .atag_offset = 0x100,
116 .map_io = nanoengine_map_io,
117 .init_irq = sa1100_init_irq,
118 .timer = &sa1100_timer,
119 .init_machine = nanoengine_init,
120 .restart = sa11x0_restart,
121 MACHINE_END
122