1 /* linux/arch/arm/mach-s3c64xx/mach-smdk6410.c
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14 #include <linux/kernel.h>
15 #include <linux/types.h>
16 #include <linux/interrupt.h>
17 #include <linux/list.h>
18 #include <linux/timer.h>
19 #include <linux/init.h>
20 #include <linux/input.h>
21 #include <linux/serial_core.h>
22 #include <linux/platform_device.h>
23 #include <linux/io.h>
24 #include <linux/i2c.h>
25 #include <linux/leds.h>
26 #include <linux/fb.h>
27 #include <linux/gpio.h>
28 #include <linux/delay.h>
29 #include <linux/smsc911x.h>
30 #include <linux/regulator/fixed.h>
31 #include <linux/regulator/machine.h>
32 #include <linux/pwm_backlight.h>
33
34 #ifdef CONFIG_SMDK6410_WM1190_EV1
35 #include <linux/mfd/wm8350/core.h>
36 #include <linux/mfd/wm8350/pmic.h>
37 #endif
38
39 #ifdef CONFIG_SMDK6410_WM1192_EV1
40 #include <linux/mfd/wm831x/core.h>
41 #include <linux/mfd/wm831x/pdata.h>
42 #endif
43
44 #include <video/platform_lcd.h>
45
46 #include <asm/hardware/vic.h>
47 #include <asm/mach/arch.h>
48 #include <asm/mach/map.h>
49 #include <asm/mach/irq.h>
50
51 #include <mach/hardware.h>
52 #include <mach/map.h>
53
54 #include <asm/irq.h>
55 #include <asm/mach-types.h>
56
57 #include <plat/regs-serial.h>
58 #include <mach/regs-modem.h>
59 #include <mach/regs-gpio.h>
60 #include <mach/regs-sys.h>
61 #include <mach/regs-srom.h>
62 #include <plat/ata.h>
63 #include <plat/iic.h>
64 #include <plat/fb.h>
65 #include <plat/gpio-cfg.h>
66
67 #include <plat/clock.h>
68 #include <plat/devs.h>
69 #include <plat/cpu.h>
70 #include <plat/adc.h>
71 #include <plat/ts.h>
72 #include <plat/keypad.h>
73 #include <plat/backlight.h>
74 #include <plat/regs-fb-v4.h>
75
76 #include "common.h"
77
78 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
79 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
80 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
81
82 static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = {
83 [0] = {
84 .hwport = 0,
85 .flags = 0,
86 .ucon = UCON,
87 .ulcon = ULCON,
88 .ufcon = UFCON,
89 },
90 [1] = {
91 .hwport = 1,
92 .flags = 0,
93 .ucon = UCON,
94 .ulcon = ULCON,
95 .ufcon = UFCON,
96 },
97 [2] = {
98 .hwport = 2,
99 .flags = 0,
100 .ucon = UCON,
101 .ulcon = ULCON,
102 .ufcon = UFCON,
103 },
104 [3] = {
105 .hwport = 3,
106 .flags = 0,
107 .ucon = UCON,
108 .ulcon = ULCON,
109 .ufcon = UFCON,
110 },
111 };
112
113 /* framebuffer and LCD setup. */
114
115 /* GPF15 = LCD backlight control
116 * GPF13 => Panel power
117 * GPN5 = LCD nRESET signal
118 * PWM_TOUT1 => backlight brightness
119 */
120
smdk6410_lcd_power_set(struct plat_lcd_data * pd,unsigned int power)121 static void smdk6410_lcd_power_set(struct plat_lcd_data *pd,
122 unsigned int power)
123 {
124 if (power) {
125 gpio_direction_output(S3C64XX_GPF(13), 1);
126
127 /* fire nRESET on power up */
128 gpio_direction_output(S3C64XX_GPN(5), 0);
129 msleep(10);
130 gpio_direction_output(S3C64XX_GPN(5), 1);
131 msleep(1);
132 } else {
133 gpio_direction_output(S3C64XX_GPF(13), 0);
134 }
135 }
136
137 static struct plat_lcd_data smdk6410_lcd_power_data = {
138 .set_power = smdk6410_lcd_power_set,
139 };
140
141 static struct platform_device smdk6410_lcd_powerdev = {
142 .name = "platform-lcd",
143 .dev.parent = &s3c_device_fb.dev,
144 .dev.platform_data = &smdk6410_lcd_power_data,
145 };
146
147 static struct s3c_fb_pd_win smdk6410_fb_win0 = {
148 /* this is to ensure we use win0 */
149 .win_mode = {
150 .left_margin = 8,
151 .right_margin = 13,
152 .upper_margin = 7,
153 .lower_margin = 5,
154 .hsync_len = 3,
155 .vsync_len = 1,
156 .xres = 800,
157 .yres = 480,
158 },
159 .max_bpp = 32,
160 .default_bpp = 16,
161 .virtual_y = 480 * 2,
162 .virtual_x = 800,
163 };
164
165 /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
166 static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
167 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
168 .win[0] = &smdk6410_fb_win0,
169 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
170 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
171 };
172
173 /*
174 * Configuring Ethernet on SMDK6410
175 *
176 * Both CS8900A and LAN9115 chips share one chip select mediated by CFG6.
177 * The constant address below corresponds to nCS1
178 *
179 * 1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet"
180 * 2) CFG6 needs to be switched to "LAN9115" side
181 */
182
183 static struct resource smdk6410_smsc911x_resources[] = {
184 [0] = {
185 .start = S3C64XX_PA_XM0CSN1,
186 .end = S3C64XX_PA_XM0CSN1 + SZ_64K - 1,
187 .flags = IORESOURCE_MEM,
188 },
189 [1] = {
190 .start = S3C_EINT(10),
191 .end = S3C_EINT(10),
192 .flags = IORESOURCE_IRQ | IRQ_TYPE_LEVEL_LOW,
193 },
194 };
195
196 static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {
197 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
198 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
199 .flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
200 .phy_interface = PHY_INTERFACE_MODE_MII,
201 };
202
203
204 static struct platform_device smdk6410_smsc911x = {
205 .name = "smsc911x",
206 .id = -1,
207 .num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources),
208 .resource = &smdk6410_smsc911x_resources[0],
209 .dev = {
210 .platform_data = &smdk6410_smsc911x_pdata,
211 },
212 };
213
214 #ifdef CONFIG_REGULATOR
215 static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] __initdata = {
216 REGULATOR_SUPPLY("PVDD", "0-001b"),
217 REGULATOR_SUPPLY("AVDD", "0-001b"),
218 };
219
220 static struct regulator_init_data smdk6410_b_pwr_5v_data = {
221 .constraints = {
222 .always_on = 1,
223 },
224 .num_consumer_supplies = ARRAY_SIZE(smdk6410_b_pwr_5v_consumers),
225 .consumer_supplies = smdk6410_b_pwr_5v_consumers,
226 };
227
228 static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata = {
229 .supply_name = "B_PWR_5V",
230 .microvolts = 5000000,
231 .init_data = &smdk6410_b_pwr_5v_data,
232 .gpio = -EINVAL,
233 };
234
235 static struct platform_device smdk6410_b_pwr_5v = {
236 .name = "reg-fixed-voltage",
237 .id = -1,
238 .dev = {
239 .platform_data = &smdk6410_b_pwr_5v_pdata,
240 },
241 };
242 #endif
243
244 static struct s3c_ide_platdata smdk6410_ide_pdata __initdata = {
245 .setup_gpio = s3c64xx_ide_setup_gpio,
246 };
247
248 static uint32_t smdk6410_keymap[] __initdata = {
249 /* KEY(row, col, keycode) */
250 KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
251 KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
252 KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
253 KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
254 };
255
256 static struct matrix_keymap_data smdk6410_keymap_data __initdata = {
257 .keymap = smdk6410_keymap,
258 .keymap_size = ARRAY_SIZE(smdk6410_keymap),
259 };
260
261 static struct samsung_keypad_platdata smdk6410_keypad_data __initdata = {
262 .keymap_data = &smdk6410_keymap_data,
263 .rows = 2,
264 .cols = 8,
265 };
266
267 static struct map_desc smdk6410_iodesc[] = {};
268
269 static struct platform_device *smdk6410_devices[] __initdata = {
270 #ifdef CONFIG_SMDK6410_SD_CH0
271 &s3c_device_hsmmc0,
272 #endif
273 #ifdef CONFIG_SMDK6410_SD_CH1
274 &s3c_device_hsmmc1,
275 #endif
276 &s3c_device_i2c0,
277 &s3c_device_i2c1,
278 &s3c_device_fb,
279 &s3c_device_ohci,
280 &s3c_device_usb_hsotg,
281 &samsung_asoc_dma,
282 &s3c64xx_device_iisv4,
283 &samsung_device_keypad,
284
285 #ifdef CONFIG_REGULATOR
286 &smdk6410_b_pwr_5v,
287 #endif
288 &smdk6410_lcd_powerdev,
289
290 &smdk6410_smsc911x,
291 &s3c_device_adc,
292 &s3c_device_cfcon,
293 &s3c_device_rtc,
294 &s3c_device_ts,
295 &s3c_device_wdt,
296 };
297
298 #ifdef CONFIG_REGULATOR
299 /* ARM core */
300 static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = {
301 REGULATOR_SUPPLY("vddarm", NULL),
302 };
303
304 /* VDDARM, BUCK1 on J5 */
305 static struct regulator_init_data smdk6410_vddarm = {
306 .constraints = {
307 .name = "PVDD_ARM",
308 .min_uV = 1000000,
309 .max_uV = 1300000,
310 .always_on = 1,
311 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
312 },
313 .num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers),
314 .consumer_supplies = smdk6410_vddarm_consumers,
315 };
316
317 /* VDD_INT, BUCK2 on J5 */
318 static struct regulator_init_data smdk6410_vddint = {
319 .constraints = {
320 .name = "PVDD_INT",
321 .min_uV = 1000000,
322 .max_uV = 1200000,
323 .always_on = 1,
324 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
325 },
326 };
327
328 /* VDD_HI, LDO3 on J5 */
329 static struct regulator_init_data smdk6410_vddhi = {
330 .constraints = {
331 .name = "PVDD_HI",
332 .always_on = 1,
333 },
334 };
335
336 /* VDD_PLL, LDO2 on J5 */
337 static struct regulator_init_data smdk6410_vddpll = {
338 .constraints = {
339 .name = "PVDD_PLL",
340 .always_on = 1,
341 },
342 };
343
344 /* VDD_UH_MMC, LDO5 on J5 */
345 static struct regulator_init_data smdk6410_vdduh_mmc = {
346 .constraints = {
347 .name = "PVDD_UH+PVDD_MMC",
348 .always_on = 1,
349 },
350 };
351
352 /* VCCM3BT, LDO8 on J5 */
353 static struct regulator_init_data smdk6410_vccmc3bt = {
354 .constraints = {
355 .name = "PVCCM3BT",
356 .always_on = 1,
357 },
358 };
359
360 /* VCCM2MTV, LDO11 on J5 */
361 static struct regulator_init_data smdk6410_vccm2mtv = {
362 .constraints = {
363 .name = "PVCCM2MTV",
364 .always_on = 1,
365 },
366 };
367
368 /* VDD_LCD, LDO12 on J5 */
369 static struct regulator_init_data smdk6410_vddlcd = {
370 .constraints = {
371 .name = "PVDD_LCD",
372 .always_on = 1,
373 },
374 };
375
376 /* VDD_OTGI, LDO9 on J5 */
377 static struct regulator_init_data smdk6410_vddotgi = {
378 .constraints = {
379 .name = "PVDD_OTGI",
380 .always_on = 1,
381 },
382 };
383
384 /* VDD_OTG, LDO14 on J5 */
385 static struct regulator_init_data smdk6410_vddotg = {
386 .constraints = {
387 .name = "PVDD_OTG",
388 .always_on = 1,
389 },
390 };
391
392 /* VDD_ALIVE, LDO15 on J5 */
393 static struct regulator_init_data smdk6410_vddalive = {
394 .constraints = {
395 .name = "PVDD_ALIVE",
396 .always_on = 1,
397 },
398 };
399
400 /* VDD_AUDIO, VLDO_AUDIO on J5 */
401 static struct regulator_init_data smdk6410_vddaudio = {
402 .constraints = {
403 .name = "PVDD_AUDIO",
404 .always_on = 1,
405 },
406 };
407 #endif
408
409 #ifdef CONFIG_SMDK6410_WM1190_EV1
410 /* S3C64xx internal logic & PLL */
411 static struct regulator_init_data wm8350_dcdc1_data = {
412 .constraints = {
413 .name = "PVDD_INT+PVDD_PLL",
414 .min_uV = 1200000,
415 .max_uV = 1200000,
416 .always_on = 1,
417 .apply_uV = 1,
418 },
419 };
420
421 /* Memory */
422 static struct regulator_init_data wm8350_dcdc3_data = {
423 .constraints = {
424 .name = "PVDD_MEM",
425 .min_uV = 1800000,
426 .max_uV = 1800000,
427 .always_on = 1,
428 .state_mem = {
429 .uV = 1800000,
430 .mode = REGULATOR_MODE_NORMAL,
431 .enabled = 1,
432 },
433 .initial_state = PM_SUSPEND_MEM,
434 },
435 };
436
437 /* USB, EXT, PCM, ADC/DAC, USB, MMC */
438 static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
439 REGULATOR_SUPPLY("DVDD", "0-001b"),
440 };
441
442 static struct regulator_init_data wm8350_dcdc4_data = {
443 .constraints = {
444 .name = "PVDD_HI+PVDD_EXT+PVDD_SYS+PVCCM2MTV",
445 .min_uV = 3000000,
446 .max_uV = 3000000,
447 .always_on = 1,
448 },
449 .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
450 .consumer_supplies = wm8350_dcdc4_consumers,
451 };
452
453 /* OTGi/1190-EV1 HPVDD & AVDD */
454 static struct regulator_init_data wm8350_ldo4_data = {
455 .constraints = {
456 .name = "PVDD_OTGI+HPVDD+AVDD",
457 .min_uV = 1200000,
458 .max_uV = 1200000,
459 .apply_uV = 1,
460 .always_on = 1,
461 },
462 };
463
464 static struct {
465 int regulator;
466 struct regulator_init_data *initdata;
467 } wm1190_regulators[] = {
468 { WM8350_DCDC_1, &wm8350_dcdc1_data },
469 { WM8350_DCDC_3, &wm8350_dcdc3_data },
470 { WM8350_DCDC_4, &wm8350_dcdc4_data },
471 { WM8350_DCDC_6, &smdk6410_vddarm },
472 { WM8350_LDO_1, &smdk6410_vddalive },
473 { WM8350_LDO_2, &smdk6410_vddotg },
474 { WM8350_LDO_3, &smdk6410_vddlcd },
475 { WM8350_LDO_4, &wm8350_ldo4_data },
476 };
477
smdk6410_wm8350_init(struct wm8350 * wm8350)478 static int __init smdk6410_wm8350_init(struct wm8350 *wm8350)
479 {
480 int i;
481
482 /* Configure the IRQ line */
483 s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
484
485 /* Instantiate the regulators */
486 for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++)
487 wm8350_register_regulator(wm8350,
488 wm1190_regulators[i].regulator,
489 wm1190_regulators[i].initdata);
490
491 return 0;
492 }
493
494 static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
495 .init = smdk6410_wm8350_init,
496 .irq_high = 1,
497 .irq_base = IRQ_BOARD_START,
498 };
499 #endif
500
501 #ifdef CONFIG_SMDK6410_WM1192_EV1
502 static struct gpio_led wm1192_pmic_leds[] = {
503 {
504 .name = "PMIC:red:power",
505 .gpio = GPIO_BOARD_START + 3,
506 .default_state = LEDS_GPIO_DEFSTATE_ON,
507 },
508 };
509
510 static struct gpio_led_platform_data wm1192_pmic_led = {
511 .num_leds = ARRAY_SIZE(wm1192_pmic_leds),
512 .leds = wm1192_pmic_leds,
513 };
514
515 static struct platform_device wm1192_pmic_led_dev = {
516 .name = "leds-gpio",
517 .id = -1,
518 .dev = {
519 .platform_data = &wm1192_pmic_led,
520 },
521 };
522
wm1192_pre_init(struct wm831x * wm831x)523 static int wm1192_pre_init(struct wm831x *wm831x)
524 {
525 int ret;
526
527 /* Configure the IRQ line */
528 s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
529
530 ret = platform_device_register(&wm1192_pmic_led_dev);
531 if (ret != 0)
532 dev_err(wm831x->dev, "Failed to add PMIC LED: %d\n", ret);
533
534 return 0;
535 }
536
537 static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
538 .isink = 1,
539 .max_uA = 27554,
540 };
541
542 static struct regulator_init_data wm1192_dcdc3 = {
543 .constraints = {
544 .name = "PVDD_MEM+PVDD_GPS",
545 .always_on = 1,
546 },
547 };
548
549 static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
550 REGULATOR_SUPPLY("DVDD", "0-001b"), /* WM8580 */
551 };
552
553 static struct regulator_init_data wm1192_ldo1 = {
554 .constraints = {
555 .name = "PVDD_LCD+PVDD_EXT",
556 .always_on = 1,
557 },
558 .consumer_supplies = wm1192_ldo1_consumers,
559 .num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers),
560 };
561
562 static struct wm831x_status_pdata wm1192_led7_pdata = {
563 .name = "LED7:green:",
564 };
565
566 static struct wm831x_status_pdata wm1192_led8_pdata = {
567 .name = "LED8:green:",
568 };
569
570 static struct wm831x_pdata smdk6410_wm1192_pdata = {
571 .pre_init = wm1192_pre_init,
572 .irq_base = IRQ_BOARD_START,
573
574 .backlight = &wm1192_backlight_pdata,
575 .dcdc = {
576 &smdk6410_vddarm, /* DCDC1 */
577 &smdk6410_vddint, /* DCDC2 */
578 &wm1192_dcdc3,
579 },
580 .gpio_base = GPIO_BOARD_START,
581 .ldo = {
582 &wm1192_ldo1, /* LDO1 */
583 &smdk6410_vdduh_mmc, /* LDO2 */
584 NULL, /* LDO3 NC */
585 &smdk6410_vddotgi, /* LDO4 */
586 &smdk6410_vddotg, /* LDO5 */
587 &smdk6410_vddhi, /* LDO6 */
588 &smdk6410_vddaudio, /* LDO7 */
589 &smdk6410_vccm2mtv, /* LDO8 */
590 &smdk6410_vddpll, /* LDO9 */
591 &smdk6410_vccmc3bt, /* LDO10 */
592 &smdk6410_vddalive, /* LDO11 */
593 },
594 .status = {
595 &wm1192_led7_pdata,
596 &wm1192_led8_pdata,
597 },
598 };
599 #endif
600
601 static struct i2c_board_info i2c_devs0[] __initdata = {
602 { I2C_BOARD_INFO("24c08", 0x50), },
603 { I2C_BOARD_INFO("wm8580", 0x1b), },
604
605 #ifdef CONFIG_SMDK6410_WM1192_EV1
606 { I2C_BOARD_INFO("wm8312", 0x34),
607 .platform_data = &smdk6410_wm1192_pdata,
608 .irq = S3C_EINT(12),
609 },
610 #endif
611
612 #ifdef CONFIG_SMDK6410_WM1190_EV1
613 { I2C_BOARD_INFO("wm8350", 0x1a),
614 .platform_data = &smdk6410_wm8350_pdata,
615 .irq = S3C_EINT(12),
616 },
617 #endif
618 };
619
620 static struct i2c_board_info i2c_devs1[] __initdata = {
621 { I2C_BOARD_INFO("24c128", 0x57), }, /* Samsung S524AD0XD1 */
622 };
623
624 /* LCD Backlight data */
625 static struct samsung_bl_gpio_info smdk6410_bl_gpio_info = {
626 .no = S3C64XX_GPF(15),
627 .func = S3C_GPIO_SFN(2),
628 };
629
630 static struct platform_pwm_backlight_data smdk6410_bl_data = {
631 .pwm_id = 1,
632 };
633
smdk6410_map_io(void)634 static void __init smdk6410_map_io(void)
635 {
636 u32 tmp;
637
638 s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc));
639 s3c24xx_init_clocks(12000000);
640 s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs));
641
642 /* set the LCD type */
643
644 tmp = __raw_readl(S3C64XX_SPCON);
645 tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
646 tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
647 __raw_writel(tmp, S3C64XX_SPCON);
648
649 /* remove the lcd bypass */
650 tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
651 tmp &= ~MIFPCON_LCD_BYPASS;
652 __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
653 }
654
smdk6410_machine_init(void)655 static void __init smdk6410_machine_init(void)
656 {
657 u32 cs1;
658
659 s3c_i2c0_set_platdata(NULL);
660 s3c_i2c1_set_platdata(NULL);
661 s3c_fb_set_platdata(&smdk6410_lcd_pdata);
662
663 samsung_keypad_set_platdata(&smdk6410_keypad_data);
664
665 s3c24xx_ts_set_platdata(NULL);
666
667 /* configure nCS1 width to 16 bits */
668
669 cs1 = __raw_readl(S3C64XX_SROM_BW) &
670 ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
671 cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
672 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
673 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
674 S3C64XX_SROM_BW__NCS1__SHIFT;
675 __raw_writel(cs1, S3C64XX_SROM_BW);
676
677 /* set timing for nCS1 suitable for ethernet chip */
678
679 __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
680 (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
681 (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
682 (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
683 (0xe << S3C64XX_SROM_BCX__TACC__SHIFT) |
684 (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
685 (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
686
687 gpio_request(S3C64XX_GPN(5), "LCD power");
688 gpio_request(S3C64XX_GPF(13), "LCD power");
689
690 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
691 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
692
693 s3c_ide_set_platdata(&smdk6410_ide_pdata);
694
695 samsung_bl_set(&smdk6410_bl_gpio_info, &smdk6410_bl_data);
696
697 platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
698 }
699
700 MACHINE_START(SMDK6410, "SMDK6410")
701 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
702 .atag_offset = 0x100,
703
704 .init_irq = s3c6410_init_irq,
705 .handle_irq = vic_handle_irq,
706 .map_io = smdk6410_map_io,
707 .init_machine = smdk6410_machine_init,
708 .timer = &s3c24xx_timer,
709 .restart = s3c64xx_restart,
710 MACHINE_END
711