1 /* linux/arch/arm/mach-s3c2410/mach-vr1000.c
2 *
3 * Copyright (c) 2003-2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Machine support for Thorcom VR1000 board. Designed for Thorcom by
7 * Simtec Electronics, http://www.simtec.co.uk/
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 */
14
15 #include <linux/kernel.h>
16 #include <linux/types.h>
17 #include <linux/interrupt.h>
18 #include <linux/list.h>
19 #include <linux/timer.h>
20 #include <linux/init.h>
21 #include <linux/gpio.h>
22 #include <linux/dm9000.h>
23 #include <linux/i2c.h>
24
25 #include <linux/serial.h>
26 #include <linux/tty.h>
27 #include <linux/serial_8250.h>
28 #include <linux/serial_reg.h>
29 #include <linux/io.h>
30
31 #include <asm/mach/arch.h>
32 #include <asm/mach/map.h>
33 #include <asm/mach/irq.h>
34
35 #include <mach/bast-map.h>
36 #include <mach/vr1000-map.h>
37 #include <mach/vr1000-irq.h>
38 #include <mach/vr1000-cpld.h>
39
40 #include <mach/hardware.h>
41 #include <asm/irq.h>
42 #include <asm/mach-types.h>
43
44 #include <plat/regs-serial.h>
45 #include <mach/regs-gpio.h>
46 #include <mach/leds-gpio.h>
47
48 #include <plat/clock.h>
49 #include <plat/devs.h>
50 #include <plat/cpu.h>
51 #include <plat/iic.h>
52 #include <plat/audio-simtec.h>
53
54 #include "usb-simtec.h"
55 #include "nor-simtec.h"
56 #include "common.h"
57
58 /* macros for virtual address mods for the io space entries */
59 #define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5)
60 #define VA_C4(item) ((unsigned long)(item) + BAST_VAM_CS4)
61 #define VA_C3(item) ((unsigned long)(item) + BAST_VAM_CS3)
62 #define VA_C2(item) ((unsigned long)(item) + BAST_VAM_CS2)
63
64 /* macros to modify the physical addresses for io space */
65
66 #define PA_CS2(item) (__phys_to_pfn((item) + S3C2410_CS2))
67 #define PA_CS3(item) (__phys_to_pfn((item) + S3C2410_CS3))
68 #define PA_CS4(item) (__phys_to_pfn((item) + S3C2410_CS4))
69 #define PA_CS5(item) (__phys_to_pfn((item) + S3C2410_CS5))
70
71 static struct map_desc vr1000_iodesc[] __initdata = {
72 /* ISA IO areas */
73 {
74 .virtual = (u32)S3C24XX_VA_ISA_BYTE,
75 .pfn = PA_CS2(BAST_PA_ISAIO),
76 .length = SZ_16M,
77 .type = MT_DEVICE,
78 }, {
79 .virtual = (u32)S3C24XX_VA_ISA_WORD,
80 .pfn = PA_CS3(BAST_PA_ISAIO),
81 .length = SZ_16M,
82 .type = MT_DEVICE,
83 },
84
85 /* CPLD control registers, and external interrupt controls */
86 {
87 .virtual = (u32)VR1000_VA_CTRL1,
88 .pfn = __phys_to_pfn(VR1000_PA_CTRL1),
89 .length = SZ_1M,
90 .type = MT_DEVICE,
91 }, {
92 .virtual = (u32)VR1000_VA_CTRL2,
93 .pfn = __phys_to_pfn(VR1000_PA_CTRL2),
94 .length = SZ_1M,
95 .type = MT_DEVICE,
96 }, {
97 .virtual = (u32)VR1000_VA_CTRL3,
98 .pfn = __phys_to_pfn(VR1000_PA_CTRL3),
99 .length = SZ_1M,
100 .type = MT_DEVICE,
101 }, {
102 .virtual = (u32)VR1000_VA_CTRL4,
103 .pfn = __phys_to_pfn(VR1000_PA_CTRL4),
104 .length = SZ_1M,
105 .type = MT_DEVICE,
106 },
107 };
108
109 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
110 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
111 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
112
113 static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
114 [0] = {
115 .hwport = 0,
116 .flags = 0,
117 .ucon = UCON,
118 .ulcon = ULCON,
119 .ufcon = UFCON,
120 },
121 [1] = {
122 .hwport = 1,
123 .flags = 0,
124 .ucon = UCON,
125 .ulcon = ULCON,
126 .ufcon = UFCON,
127 },
128 /* port 2 is not actually used */
129 [2] = {
130 .hwport = 2,
131 .flags = 0,
132 .ucon = UCON,
133 .ulcon = ULCON,
134 .ufcon = UFCON,
135 }
136 };
137
138 /* definitions for the vr1000 extra 16550 serial ports */
139
140 #define VR1000_BAUDBASE (3692307)
141
142 #define VR1000_SERIAL_MAPBASE(x) (VR1000_PA_SERIAL + 0x80 + ((x) << 5))
143
144 static struct plat_serial8250_port serial_platform_data[] = {
145 [0] = {
146 .mapbase = VR1000_SERIAL_MAPBASE(0),
147 .irq = IRQ_VR1000_SERIAL + 0,
148 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
149 .iotype = UPIO_MEM,
150 .regshift = 0,
151 .uartclk = VR1000_BAUDBASE,
152 },
153 [1] = {
154 .mapbase = VR1000_SERIAL_MAPBASE(1),
155 .irq = IRQ_VR1000_SERIAL + 1,
156 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
157 .iotype = UPIO_MEM,
158 .regshift = 0,
159 .uartclk = VR1000_BAUDBASE,
160 },
161 [2] = {
162 .mapbase = VR1000_SERIAL_MAPBASE(2),
163 .irq = IRQ_VR1000_SERIAL + 2,
164 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
165 .iotype = UPIO_MEM,
166 .regshift = 0,
167 .uartclk = VR1000_BAUDBASE,
168 },
169 [3] = {
170 .mapbase = VR1000_SERIAL_MAPBASE(3),
171 .irq = IRQ_VR1000_SERIAL + 3,
172 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
173 .iotype = UPIO_MEM,
174 .regshift = 0,
175 .uartclk = VR1000_BAUDBASE,
176 },
177 { },
178 };
179
180 static struct platform_device serial_device = {
181 .name = "serial8250",
182 .id = PLAT8250_DEV_PLATFORM,
183 .dev = {
184 .platform_data = serial_platform_data,
185 },
186 };
187
188 /* DM9000 ethernet devices */
189
190 static struct resource vr1000_dm9k0_resource[] = {
191 [0] = {
192 .start = S3C2410_CS5 + VR1000_PA_DM9000,
193 .end = S3C2410_CS5 + VR1000_PA_DM9000 + 3,
194 .flags = IORESOURCE_MEM
195 },
196 [1] = {
197 .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x40,
198 .end = S3C2410_CS5 + VR1000_PA_DM9000 + 0x7f,
199 .flags = IORESOURCE_MEM
200 },
201 [2] = {
202 .start = IRQ_VR1000_DM9000A,
203 .end = IRQ_VR1000_DM9000A,
204 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
205 }
206
207 };
208
209 static struct resource vr1000_dm9k1_resource[] = {
210 [0] = {
211 .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x80,
212 .end = S3C2410_CS5 + VR1000_PA_DM9000 + 0x83,
213 .flags = IORESOURCE_MEM
214 },
215 [1] = {
216 .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0,
217 .end = S3C2410_CS5 + VR1000_PA_DM9000 + 0xFF,
218 .flags = IORESOURCE_MEM
219 },
220 [2] = {
221 .start = IRQ_VR1000_DM9000N,
222 .end = IRQ_VR1000_DM9000N,
223 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
224 }
225 };
226
227 /* for the moment we limit ourselves to 16bit IO until some
228 * better IO routines can be written and tested
229 */
230
231 static struct dm9000_plat_data vr1000_dm9k_platdata = {
232 .flags = DM9000_PLATF_16BITONLY,
233 };
234
235 static struct platform_device vr1000_dm9k0 = {
236 .name = "dm9000",
237 .id = 0,
238 .num_resources = ARRAY_SIZE(vr1000_dm9k0_resource),
239 .resource = vr1000_dm9k0_resource,
240 .dev = {
241 .platform_data = &vr1000_dm9k_platdata,
242 }
243 };
244
245 static struct platform_device vr1000_dm9k1 = {
246 .name = "dm9000",
247 .id = 1,
248 .num_resources = ARRAY_SIZE(vr1000_dm9k1_resource),
249 .resource = vr1000_dm9k1_resource,
250 .dev = {
251 .platform_data = &vr1000_dm9k_platdata,
252 }
253 };
254
255 /* LEDS */
256
257 static struct s3c24xx_led_platdata vr1000_led1_pdata = {
258 .name = "led1",
259 .gpio = S3C2410_GPB(0),
260 .def_trigger = "",
261 };
262
263 static struct s3c24xx_led_platdata vr1000_led2_pdata = {
264 .name = "led2",
265 .gpio = S3C2410_GPB(1),
266 .def_trigger = "",
267 };
268
269 static struct s3c24xx_led_platdata vr1000_led3_pdata = {
270 .name = "led3",
271 .gpio = S3C2410_GPB(2),
272 .def_trigger = "",
273 };
274
275 static struct platform_device vr1000_led1 = {
276 .name = "s3c24xx_led",
277 .id = 1,
278 .dev = {
279 .platform_data = &vr1000_led1_pdata,
280 },
281 };
282
283 static struct platform_device vr1000_led2 = {
284 .name = "s3c24xx_led",
285 .id = 2,
286 .dev = {
287 .platform_data = &vr1000_led2_pdata,
288 },
289 };
290
291 static struct platform_device vr1000_led3 = {
292 .name = "s3c24xx_led",
293 .id = 3,
294 .dev = {
295 .platform_data = &vr1000_led3_pdata,
296 },
297 };
298
299 /* I2C devices. */
300
301 static struct i2c_board_info vr1000_i2c_devs[] __initdata = {
302 {
303 I2C_BOARD_INFO("tlv320aic23", 0x1a),
304 }, {
305 I2C_BOARD_INFO("tmp101", 0x48),
306 }, {
307 I2C_BOARD_INFO("m41st87", 0x68),
308 },
309 };
310
311 /* devices for this board */
312
313 static struct platform_device *vr1000_devices[] __initdata = {
314 &s3c_device_ohci,
315 &s3c_device_lcd,
316 &s3c_device_wdt,
317 &s3c_device_i2c0,
318 &s3c_device_adc,
319 &serial_device,
320 &vr1000_dm9k0,
321 &vr1000_dm9k1,
322 &vr1000_led1,
323 &vr1000_led2,
324 &vr1000_led3,
325 };
326
327 static struct clk *vr1000_clocks[] __initdata = {
328 &s3c24xx_dclk0,
329 &s3c24xx_dclk1,
330 &s3c24xx_clkout0,
331 &s3c24xx_clkout1,
332 &s3c24xx_uclk,
333 };
334
vr1000_power_off(void)335 static void vr1000_power_off(void)
336 {
337 gpio_direction_output(S3C2410_GPB(9), 1);
338 }
339
vr1000_map_io(void)340 static void __init vr1000_map_io(void)
341 {
342 /* initialise clock sources */
343
344 s3c24xx_dclk0.parent = &clk_upll;
345 s3c24xx_dclk0.rate = 12*1000*1000;
346
347 s3c24xx_dclk1.parent = NULL;
348 s3c24xx_dclk1.rate = 3692307;
349
350 s3c24xx_clkout0.parent = &s3c24xx_dclk0;
351 s3c24xx_clkout1.parent = &s3c24xx_dclk1;
352
353 s3c24xx_uclk.parent = &s3c24xx_clkout1;
354
355 s3c24xx_register_clocks(vr1000_clocks, ARRAY_SIZE(vr1000_clocks));
356
357 pm_power_off = vr1000_power_off;
358
359 s3c24xx_init_io(vr1000_iodesc, ARRAY_SIZE(vr1000_iodesc));
360 s3c24xx_init_clocks(0);
361 s3c24xx_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs));
362 }
363
vr1000_init(void)364 static void __init vr1000_init(void)
365 {
366 s3c_i2c0_set_platdata(NULL);
367 platform_add_devices(vr1000_devices, ARRAY_SIZE(vr1000_devices));
368
369 i2c_register_board_info(0, vr1000_i2c_devs,
370 ARRAY_SIZE(vr1000_i2c_devs));
371
372 nor_simtec_init();
373 simtec_audio_add(NULL, true, NULL);
374
375 WARN_ON(gpio_request(S3C2410_GPB(9), "power off"));
376 }
377
378 MACHINE_START(VR1000, "Thorcom-VR1000")
379 /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
380 .atag_offset = 0x100,
381 .map_io = vr1000_map_io,
382 .init_machine = vr1000_init,
383 .init_irq = s3c24xx_init_irq,
384 .timer = &s3c24xx_timer,
385 .restart = s3c2410_restart,
386 MACHINE_END
387