1 /*
2 * linux/arch/arm/mach-pxa/mainstone.c
3 *
4 * Support for the Intel HCDDBBVA0 Development Platform.
5 * (go figure how they came up with such name...)
6 *
7 * Author: Nicolas Pitre
8 * Created: Nov 05, 2002
9 * Copyright: MontaVista Software Inc.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15 #include <linux/gpio.h>
16 #include <linux/init.h>
17 #include <linux/platform_device.h>
18 #include <linux/syscore_ops.h>
19 #include <linux/interrupt.h>
20 #include <linux/sched.h>
21 #include <linux/bitops.h>
22 #include <linux/fb.h>
23 #include <linux/ioport.h>
24 #include <linux/mtd/mtd.h>
25 #include <linux/mtd/partitions.h>
26 #include <linux/input.h>
27 #include <linux/gpio_keys.h>
28 #include <linux/pwm_backlight.h>
29 #include <linux/smc91x.h>
30 #include <linux/i2c/pxa-i2c.h>
31
32 #include <asm/types.h>
33 #include <asm/setup.h>
34 #include <asm/memory.h>
35 #include <asm/mach-types.h>
36 #include <mach/hardware.h>
37 #include <asm/irq.h>
38 #include <asm/sizes.h>
39
40 #include <asm/mach/arch.h>
41 #include <asm/mach/map.h>
42 #include <asm/mach/irq.h>
43 #include <asm/mach/flash.h>
44
45 #include <mach/pxa27x.h>
46 #include <mach/mainstone.h>
47 #include <mach/audio.h>
48 #include <mach/pxafb.h>
49 #include <mach/mmc.h>
50 #include <mach/irda.h>
51 #include <mach/ohci.h>
52 #include <plat/pxa27x_keypad.h>
53 #include <mach/smemc.h>
54
55 #include "generic.h"
56 #include "devices.h"
57
58 static unsigned long mainstone_pin_config[] = {
59 /* Chip Select */
60 GPIO15_nCS_1,
61
62 /* LCD - 16bpp Active TFT */
63 GPIOxx_LCD_TFT_16BPP,
64 GPIO16_PWM0_OUT, /* Backlight */
65
66 /* MMC */
67 GPIO32_MMC_CLK,
68 GPIO112_MMC_CMD,
69 GPIO92_MMC_DAT_0,
70 GPIO109_MMC_DAT_1,
71 GPIO110_MMC_DAT_2,
72 GPIO111_MMC_DAT_3,
73
74 /* USB Host Port 1 */
75 GPIO88_USBH1_PWR,
76 GPIO89_USBH1_PEN,
77
78 /* PC Card */
79 GPIO48_nPOE,
80 GPIO49_nPWE,
81 GPIO50_nPIOR,
82 GPIO51_nPIOW,
83 GPIO85_nPCE_1,
84 GPIO54_nPCE_2,
85 GPIO79_PSKTSEL,
86 GPIO55_nPREG,
87 GPIO56_nPWAIT,
88 GPIO57_nIOIS16,
89
90 /* AC97 */
91 GPIO28_AC97_BITCLK,
92 GPIO29_AC97_SDATA_IN_0,
93 GPIO30_AC97_SDATA_OUT,
94 GPIO31_AC97_SYNC,
95 GPIO45_AC97_SYSCLK,
96
97 /* Keypad */
98 GPIO93_KP_DKIN_0,
99 GPIO94_KP_DKIN_1,
100 GPIO95_KP_DKIN_2,
101 GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
102 GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
103 GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
104 GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
105 GPIO98_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH,
106 GPIO99_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH,
107 GPIO103_KP_MKOUT_0,
108 GPIO104_KP_MKOUT_1,
109 GPIO105_KP_MKOUT_2,
110 GPIO106_KP_MKOUT_3,
111 GPIO107_KP_MKOUT_4,
112 GPIO108_KP_MKOUT_5,
113 GPIO96_KP_MKOUT_6,
114
115 /* I2C */
116 GPIO117_I2C_SCL,
117 GPIO118_I2C_SDA,
118
119 /* GPIO */
120 GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
121 };
122
123 static unsigned long mainstone_irq_enabled;
124
mainstone_mask_irq(struct irq_data * d)125 static void mainstone_mask_irq(struct irq_data *d)
126 {
127 int mainstone_irq = (d->irq - MAINSTONE_IRQ(0));
128 MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq));
129 }
130
mainstone_unmask_irq(struct irq_data * d)131 static void mainstone_unmask_irq(struct irq_data *d)
132 {
133 int mainstone_irq = (d->irq - MAINSTONE_IRQ(0));
134 /* the irq can be acknowledged only if deasserted, so it's done here */
135 MST_INTSETCLR &= ~(1 << mainstone_irq);
136 MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq));
137 }
138
139 static struct irq_chip mainstone_irq_chip = {
140 .name = "FPGA",
141 .irq_ack = mainstone_mask_irq,
142 .irq_mask = mainstone_mask_irq,
143 .irq_unmask = mainstone_unmask_irq,
144 };
145
mainstone_irq_handler(unsigned int irq,struct irq_desc * desc)146 static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc)
147 {
148 unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
149 do {
150 /* clear useless edge notification */
151 desc->irq_data.chip->irq_ack(&desc->irq_data);
152 if (likely(pending)) {
153 irq = MAINSTONE_IRQ(0) + __ffs(pending);
154 generic_handle_irq(irq);
155 }
156 pending = MST_INTSETCLR & mainstone_irq_enabled;
157 } while (pending);
158 }
159
mainstone_init_irq(void)160 static void __init mainstone_init_irq(void)
161 {
162 int irq;
163
164 pxa27x_init_irq();
165
166 /* setup extra Mainstone irqs */
167 for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) {
168 irq_set_chip_and_handler(irq, &mainstone_irq_chip,
169 handle_level_irq);
170 if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14))
171 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN);
172 else
173 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
174 }
175 set_irq_flags(MAINSTONE_IRQ(8), 0);
176 set_irq_flags(MAINSTONE_IRQ(12), 0);
177
178 MST_INTMSKENA = 0;
179 MST_INTSETCLR = 0;
180
181 irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), mainstone_irq_handler);
182 irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING);
183 }
184
185 #ifdef CONFIG_PM
186
mainstone_irq_resume(void)187 static void mainstone_irq_resume(void)
188 {
189 MST_INTMSKENA = mainstone_irq_enabled;
190 }
191
192 static struct syscore_ops mainstone_irq_syscore_ops = {
193 .resume = mainstone_irq_resume,
194 };
195
mainstone_irq_device_init(void)196 static int __init mainstone_irq_device_init(void)
197 {
198 if (machine_is_mainstone())
199 register_syscore_ops(&mainstone_irq_syscore_ops);
200
201 return 0;
202 }
203
204 device_initcall(mainstone_irq_device_init);
205
206 #endif
207
208
209 static struct resource smc91x_resources[] = {
210 [0] = {
211 .start = (MST_ETH_PHYS + 0x300),
212 .end = (MST_ETH_PHYS + 0xfffff),
213 .flags = IORESOURCE_MEM,
214 },
215 [1] = {
216 .start = MAINSTONE_IRQ(3),
217 .end = MAINSTONE_IRQ(3),
218 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
219 }
220 };
221
222 static struct smc91x_platdata mainstone_smc91x_info = {
223 .flags = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT |
224 SMC91X_NOWAIT | SMC91X_USE_DMA,
225 };
226
227 static struct platform_device smc91x_device = {
228 .name = "smc91x",
229 .id = 0,
230 .num_resources = ARRAY_SIZE(smc91x_resources),
231 .resource = smc91x_resources,
232 .dev = {
233 .platform_data = &mainstone_smc91x_info,
234 },
235 };
236
mst_audio_startup(struct snd_pcm_substream * substream,void * priv)237 static int mst_audio_startup(struct snd_pcm_substream *substream, void *priv)
238 {
239 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
240 MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF;
241 return 0;
242 }
243
mst_audio_shutdown(struct snd_pcm_substream * substream,void * priv)244 static void mst_audio_shutdown(struct snd_pcm_substream *substream, void *priv)
245 {
246 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
247 MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
248 }
249
250 static long mst_audio_suspend_mask;
251
mst_audio_suspend(void * priv)252 static void mst_audio_suspend(void *priv)
253 {
254 mst_audio_suspend_mask = MST_MSCWR2;
255 MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
256 }
257
mst_audio_resume(void * priv)258 static void mst_audio_resume(void *priv)
259 {
260 MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF;
261 }
262
263 static pxa2xx_audio_ops_t mst_audio_ops = {
264 .startup = mst_audio_startup,
265 .shutdown = mst_audio_shutdown,
266 .suspend = mst_audio_suspend,
267 .resume = mst_audio_resume,
268 };
269
270 static struct resource flash_resources[] = {
271 [0] = {
272 .start = PXA_CS0_PHYS,
273 .end = PXA_CS0_PHYS + SZ_64M - 1,
274 .flags = IORESOURCE_MEM,
275 },
276 [1] = {
277 .start = PXA_CS1_PHYS,
278 .end = PXA_CS1_PHYS + SZ_64M - 1,
279 .flags = IORESOURCE_MEM,
280 },
281 };
282
283 static struct mtd_partition mainstoneflash0_partitions[] = {
284 {
285 .name = "Bootloader",
286 .size = 0x00040000,
287 .offset = 0,
288 .mask_flags = MTD_WRITEABLE /* force read-only */
289 },{
290 .name = "Kernel",
291 .size = 0x00400000,
292 .offset = 0x00040000,
293 },{
294 .name = "Filesystem",
295 .size = MTDPART_SIZ_FULL,
296 .offset = 0x00440000
297 }
298 };
299
300 static struct flash_platform_data mst_flash_data[2] = {
301 {
302 .map_name = "cfi_probe",
303 .parts = mainstoneflash0_partitions,
304 .nr_parts = ARRAY_SIZE(mainstoneflash0_partitions),
305 }, {
306 .map_name = "cfi_probe",
307 .parts = NULL,
308 .nr_parts = 0,
309 }
310 };
311
312 static struct platform_device mst_flash_device[2] = {
313 {
314 .name = "pxa2xx-flash",
315 .id = 0,
316 .dev = {
317 .platform_data = &mst_flash_data[0],
318 },
319 .resource = &flash_resources[0],
320 .num_resources = 1,
321 },
322 {
323 .name = "pxa2xx-flash",
324 .id = 1,
325 .dev = {
326 .platform_data = &mst_flash_data[1],
327 },
328 .resource = &flash_resources[1],
329 .num_resources = 1,
330 },
331 };
332
333 #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
334 static struct platform_pwm_backlight_data mainstone_backlight_data = {
335 .pwm_id = 0,
336 .max_brightness = 1023,
337 .dft_brightness = 1023,
338 .pwm_period_ns = 78770,
339 };
340
341 static struct platform_device mainstone_backlight_device = {
342 .name = "pwm-backlight",
343 .dev = {
344 .parent = &pxa27x_device_pwm0.dev,
345 .platform_data = &mainstone_backlight_data,
346 },
347 };
348
mainstone_backlight_register(void)349 static void __init mainstone_backlight_register(void)
350 {
351 int ret = platform_device_register(&mainstone_backlight_device);
352 if (ret)
353 printk(KERN_ERR "mainstone: failed to register backlight device: %d\n", ret);
354 }
355 #else
356 #define mainstone_backlight_register() do { } while (0)
357 #endif
358
359 static struct pxafb_mode_info toshiba_ltm04c380k_mode = {
360 .pixclock = 50000,
361 .xres = 640,
362 .yres = 480,
363 .bpp = 16,
364 .hsync_len = 1,
365 .left_margin = 0x9f,
366 .right_margin = 1,
367 .vsync_len = 44,
368 .upper_margin = 0,
369 .lower_margin = 0,
370 .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
371 };
372
373 static struct pxafb_mode_info toshiba_ltm035a776c_mode = {
374 .pixclock = 110000,
375 .xres = 240,
376 .yres = 320,
377 .bpp = 16,
378 .hsync_len = 4,
379 .left_margin = 8,
380 .right_margin = 20,
381 .vsync_len = 3,
382 .upper_margin = 1,
383 .lower_margin = 10,
384 .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
385 };
386
387 static struct pxafb_mach_info mainstone_pxafb_info = {
388 .num_modes = 1,
389 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
390 };
391
mainstone_mci_init(struct device * dev,irq_handler_t mstone_detect_int,void * data)392 static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_int, void *data)
393 {
394 int err;
395
396 /* make sure SD/Memory Stick multiplexer's signals
397 * are routed to MMC controller
398 */
399 MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
400
401 err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, IRQF_DISABLED,
402 "MMC card detect", data);
403 if (err)
404 printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
405
406 return err;
407 }
408
mainstone_mci_setpower(struct device * dev,unsigned int vdd)409 static void mainstone_mci_setpower(struct device *dev, unsigned int vdd)
410 {
411 struct pxamci_platform_data* p_d = dev->platform_data;
412
413 if (( 1 << vdd) & p_d->ocr_mask) {
414 printk(KERN_DEBUG "%s: on\n", __func__);
415 MST_MSCWR1 |= MST_MSCWR1_MMC_ON;
416 MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
417 } else {
418 printk(KERN_DEBUG "%s: off\n", __func__);
419 MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON;
420 }
421 }
422
mainstone_mci_exit(struct device * dev,void * data)423 static void mainstone_mci_exit(struct device *dev, void *data)
424 {
425 free_irq(MAINSTONE_MMC_IRQ, data);
426 }
427
428 static struct pxamci_platform_data mainstone_mci_platform_data = {
429 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
430 .init = mainstone_mci_init,
431 .setpower = mainstone_mci_setpower,
432 .exit = mainstone_mci_exit,
433 .gpio_card_detect = -1,
434 .gpio_card_ro = -1,
435 .gpio_power = -1,
436 };
437
mainstone_irda_transceiver_mode(struct device * dev,int mode)438 static void mainstone_irda_transceiver_mode(struct device *dev, int mode)
439 {
440 unsigned long flags;
441
442 local_irq_save(flags);
443 if (mode & IR_SIRMODE) {
444 MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR;
445 } else if (mode & IR_FIRMODE) {
446 MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR;
447 }
448 pxa2xx_transceiver_mode(dev, mode);
449 if (mode & IR_OFF) {
450 MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF;
451 } else {
452 MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL;
453 }
454 local_irq_restore(flags);
455 }
456
457 static struct pxaficp_platform_data mainstone_ficp_platform_data = {
458 .gpio_pwdown = -1,
459 .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
460 .transceiver_mode = mainstone_irda_transceiver_mode,
461 };
462
463 static struct gpio_keys_button gpio_keys_button[] = {
464 [0] = {
465 .desc = "wakeup",
466 .code = KEY_SUSPEND,
467 .type = EV_KEY,
468 .gpio = 1,
469 .wakeup = 1,
470 },
471 };
472
473 static struct gpio_keys_platform_data mainstone_gpio_keys = {
474 .buttons = gpio_keys_button,
475 .nbuttons = 1,
476 };
477
478 static struct platform_device mst_gpio_keys_device = {
479 .name = "gpio-keys",
480 .id = -1,
481 .dev = {
482 .platform_data = &mainstone_gpio_keys,
483 },
484 };
485
486 static struct platform_device *platform_devices[] __initdata = {
487 &smc91x_device,
488 &mst_flash_device[0],
489 &mst_flash_device[1],
490 &mst_gpio_keys_device,
491 };
492
493 static struct pxaohci_platform_data mainstone_ohci_platform_data = {
494 .port_mode = PMM_PERPORT_MODE,
495 .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
496 };
497
498 #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
499 static unsigned int mainstone_matrix_keys[] = {
500 KEY(0, 0, KEY_A), KEY(1, 0, KEY_B), KEY(2, 0, KEY_C),
501 KEY(3, 0, KEY_D), KEY(4, 0, KEY_E), KEY(5, 0, KEY_F),
502 KEY(0, 1, KEY_G), KEY(1, 1, KEY_H), KEY(2, 1, KEY_I),
503 KEY(3, 1, KEY_J), KEY(4, 1, KEY_K), KEY(5, 1, KEY_L),
504 KEY(0, 2, KEY_M), KEY(1, 2, KEY_N), KEY(2, 2, KEY_O),
505 KEY(3, 2, KEY_P), KEY(4, 2, KEY_Q), KEY(5, 2, KEY_R),
506 KEY(0, 3, KEY_S), KEY(1, 3, KEY_T), KEY(2, 3, KEY_U),
507 KEY(3, 3, KEY_V), KEY(4, 3, KEY_W), KEY(5, 3, KEY_X),
508 KEY(2, 4, KEY_Y), KEY(3, 4, KEY_Z),
509
510 KEY(0, 4, KEY_DOT), /* . */
511 KEY(1, 4, KEY_CLOSE), /* @ */
512 KEY(4, 4, KEY_SLASH),
513 KEY(5, 4, KEY_BACKSLASH),
514 KEY(0, 5, KEY_HOME),
515 KEY(1, 5, KEY_LEFTSHIFT),
516 KEY(2, 5, KEY_SPACE),
517 KEY(3, 5, KEY_SPACE),
518 KEY(4, 5, KEY_ENTER),
519 KEY(5, 5, KEY_BACKSPACE),
520
521 KEY(0, 6, KEY_UP),
522 KEY(1, 6, KEY_DOWN),
523 KEY(2, 6, KEY_LEFT),
524 KEY(3, 6, KEY_RIGHT),
525 KEY(4, 6, KEY_SELECT),
526 };
527
528 struct pxa27x_keypad_platform_data mainstone_keypad_info = {
529 .matrix_key_rows = 6,
530 .matrix_key_cols = 7,
531 .matrix_key_map = mainstone_matrix_keys,
532 .matrix_key_map_size = ARRAY_SIZE(mainstone_matrix_keys),
533
534 .enable_rotary0 = 1,
535 .rotary0_up_key = KEY_UP,
536 .rotary0_down_key = KEY_DOWN,
537
538 .debounce_interval = 30,
539 };
540
mainstone_init_keypad(void)541 static void __init mainstone_init_keypad(void)
542 {
543 pxa_set_keypad_info(&mainstone_keypad_info);
544 }
545 #else
mainstone_init_keypad(void)546 static inline void mainstone_init_keypad(void) {}
547 #endif
548
mainstone_init(void)549 static void __init mainstone_init(void)
550 {
551 int SW7 = 0; /* FIXME: get from SCR (Mst doc section 3.2.1.1) */
552
553 pxa2xx_mfp_config(ARRAY_AND_SIZE(mainstone_pin_config));
554
555 pxa_set_ffuart_info(NULL);
556 pxa_set_btuart_info(NULL);
557 pxa_set_stuart_info(NULL);
558
559 mst_flash_data[0].width = (__raw_readl(BOOT_DEF) & 1) ? 2 : 4;
560 mst_flash_data[1].width = 4;
561
562 /* Compensate for SW7 which swaps the flash banks */
563 mst_flash_data[SW7].name = "processor-flash";
564 mst_flash_data[SW7 ^ 1].name = "mainboard-flash";
565
566 printk(KERN_NOTICE "Mainstone configured to boot from %s\n",
567 mst_flash_data[0].name);
568
569 /* system bus arbiter setting
570 * - Core_Park
571 * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
572 */
573 ARB_CNTRL = ARB_CORE_PARK | 0x234;
574
575 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
576
577 /* reading Mainstone's "Virtual Configuration Register"
578 might be handy to select LCD type here */
579 if (0)
580 mainstone_pxafb_info.modes = &toshiba_ltm04c380k_mode;
581 else
582 mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode;
583
584 pxa_set_fb_info(NULL, &mainstone_pxafb_info);
585 mainstone_backlight_register();
586
587 pxa_set_mci_info(&mainstone_mci_platform_data);
588 pxa_set_ficp_info(&mainstone_ficp_platform_data);
589 pxa_set_ohci_info(&mainstone_ohci_platform_data);
590 pxa_set_i2c_info(NULL);
591 pxa_set_ac97_info(&mst_audio_ops);
592
593 mainstone_init_keypad();
594 }
595
596
597 static struct map_desc mainstone_io_desc[] __initdata = {
598 { /* CPLD */
599 .virtual = MST_FPGA_VIRT,
600 .pfn = __phys_to_pfn(MST_FPGA_PHYS),
601 .length = 0x00100000,
602 .type = MT_DEVICE
603 }
604 };
605
mainstone_map_io(void)606 static void __init mainstone_map_io(void)
607 {
608 pxa27x_map_io();
609 iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc));
610
611 /* for use I SRAM as framebuffer. */
612 PSLR |= 0xF04;
613 PCFR = 0x66;
614 }
615
616 MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
617 /* Maintainer: MontaVista Software Inc. */
618 .atag_offset = 0x100, /* BLOB boot parameter setting */
619 .map_io = mainstone_map_io,
620 .nr_irqs = MAINSTONE_NR_IRQS,
621 .init_irq = mainstone_init_irq,
622 .handle_irq = pxa27x_handle_irq,
623 .timer = &pxa_timer,
624 .init_machine = mainstone_init,
625 .restart = pxa_restart,
626 MACHINE_END
627