1 /* 2 * arch/arm/mach-pxa/include/mach/zeus.h 3 * 4 * Author: David Vrabel 5 * Created: Sept 28, 2005 6 * Copyright: Arcom Control Systems Ltd. 7 * 8 * Maintained by: Marc Zyngier <maz@misterjones.org> 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13 */ 14 15 #ifndef _MACH_ZEUS_H 16 #define _MACH_ZEUS_H 17 18 #define ZEUS_NR_IRQS (IRQ_BOARD_START + 48) 19 20 /* Physical addresses */ 21 #define ZEUS_FLASH_PHYS PXA_CS0_PHYS 22 #define ZEUS_ETH0_PHYS PXA_CS1_PHYS 23 #define ZEUS_ETH1_PHYS PXA_CS2_PHYS 24 #define ZEUS_CPLD_PHYS (PXA_CS4_PHYS+0x2000000) 25 #define ZEUS_SRAM_PHYS PXA_CS5_PHYS 26 #define ZEUS_PC104IO_PHYS (0x30000000) 27 28 #define ZEUS_CPLD_VERSION_PHYS (ZEUS_CPLD_PHYS + 0x00000000) 29 #define ZEUS_CPLD_ISA_IRQ_PHYS (ZEUS_CPLD_PHYS + 0x00800000) 30 #define ZEUS_CPLD_CONTROL_PHYS (ZEUS_CPLD_PHYS + 0x01000000) 31 #define ZEUS_CPLD_EXTWDOG_PHYS (ZEUS_CPLD_PHYS + 0x01800000) 32 33 /* GPIOs */ 34 #define ZEUS_AC97_GPIO 0 35 #define ZEUS_WAKEUP_GPIO 1 36 #define ZEUS_UARTA_GPIO 9 37 #define ZEUS_UARTB_GPIO 10 38 #define ZEUS_UARTC_GPIO 12 39 #define ZEUS_UARTD_GPIO 11 40 #define ZEUS_ETH0_GPIO 14 41 #define ZEUS_ISA_GPIO 17 42 #define ZEUS_BKLEN_GPIO 19 43 #define ZEUS_USB2_PWREN_GPIO 22 44 #define ZEUS_PTT_GPIO 27 45 #define ZEUS_CF_CD_GPIO 35 46 #define ZEUS_MMC_WP_GPIO 52 47 #define ZEUS_MMC_CD_GPIO 53 48 #define ZEUS_EXTGPIO_GPIO 91 49 #define ZEUS_CF_PWEN_GPIO 97 50 #define ZEUS_CF_RDY_GPIO 99 51 #define ZEUS_LCD_EN_GPIO 101 52 #define ZEUS_ETH1_GPIO 113 53 #define ZEUS_CAN_GPIO 116 54 55 #define ZEUS_EXT0_GPIO_BASE 128 56 #define ZEUS_EXT1_GPIO_BASE 160 57 #define ZEUS_USER_GPIO_BASE 192 58 59 #define ZEUS_EXT0_GPIO(x) (ZEUS_EXT0_GPIO_BASE + (x)) 60 #define ZEUS_EXT1_GPIO(x) (ZEUS_EXT1_GPIO_BASE + (x)) 61 #define ZEUS_USER_GPIO(x) (ZEUS_USER_GPIO_BASE + (x)) 62 63 #define ZEUS_CAN_SHDN_GPIO ZEUS_EXT1_GPIO(2) 64 65 /* 66 * CPLD registers: 67 * Only 4 registers, but spread over a 32MB address space. 68 * Be gentle, and remap that over 32kB... 69 */ 70 71 #define ZEUS_CPLD IOMEM(0xf0000000) 72 #define ZEUS_CPLD_VERSION (ZEUS_CPLD + 0x0000) 73 #define ZEUS_CPLD_ISA_IRQ (ZEUS_CPLD + 0x1000) 74 #define ZEUS_CPLD_CONTROL (ZEUS_CPLD + 0x2000) 75 76 /* CPLD register bits */ 77 #define ZEUS_CPLD_CONTROL_CF_RST 0x01 78 79 #define ZEUS_PC104IO IOMEM(0xf1000000) 80 81 #define ZEUS_SRAM_SIZE (256 * 1024) 82 83 #endif 84 85 86