1 /*
2 * linux/arch/arm/mach-pxa/cm-x2xx.c
3 *
4 * Copyright (C) 2008 CompuLab, Ltd.
5 * Mike Rapoport <mike@compulab.co.il>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12 #include <linux/platform_device.h>
13 #include <linux/syscore_ops.h>
14 #include <linux/irq.h>
15 #include <linux/gpio.h>
16
17 #include <linux/dm9000.h>
18 #include <linux/leds.h>
19
20 #include <asm/mach/arch.h>
21 #include <asm/mach-types.h>
22 #include <asm/mach/map.h>
23
24 #include <mach/pxa25x.h>
25 #include <mach/pxa27x.h>
26 #include <mach/audio.h>
27 #include <mach/pxafb.h>
28 #include <mach/smemc.h>
29
30 #include <asm/hardware/it8152.h>
31
32 #include "generic.h"
33 #include "cm-x2xx-pci.h"
34
35 extern void cmx255_init(void);
36 extern void cmx270_init(void);
37
38 /* reserve IRQs for IT8152 */
39 #define CMX2XX_NR_IRQS (IRQ_BOARD_START + 40)
40
41 /* virtual addresses for statically mapped regions */
42 #define CMX2XX_VIRT_BASE (void __iomem *)(0xe8000000)
43 #define CMX2XX_IT8152_VIRT (CMX2XX_VIRT_BASE)
44
45 /* physical address if local-bus attached devices */
46 #define CMX255_DM9000_PHYS_BASE (PXA_CS1_PHYS + (8 << 22))
47 #define CMX270_DM9000_PHYS_BASE (PXA_CS1_PHYS + (6 << 22))
48
49 /* leds */
50 #define CMX255_GPIO_RED (27)
51 #define CMX255_GPIO_GREEN (32)
52 #define CMX270_GPIO_RED (93)
53 #define CMX270_GPIO_GREEN (94)
54
55 /* GPIO IRQ usage */
56 #define GPIO22_ETHIRQ (22)
57 #define GPIO10_ETHIRQ (10)
58 #define CMX255_GPIO_IT8152_IRQ (0)
59 #define CMX270_GPIO_IT8152_IRQ (22)
60
61 #define CMX255_ETHIRQ PXA_GPIO_TO_IRQ(GPIO22_ETHIRQ)
62 #define CMX270_ETHIRQ PXA_GPIO_TO_IRQ(GPIO10_ETHIRQ)
63
64 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
65 static struct resource cmx255_dm9000_resource[] = {
66 [0] = {
67 .start = CMX255_DM9000_PHYS_BASE,
68 .end = CMX255_DM9000_PHYS_BASE + 3,
69 .flags = IORESOURCE_MEM,
70 },
71 [1] = {
72 .start = CMX255_DM9000_PHYS_BASE + 4,
73 .end = CMX255_DM9000_PHYS_BASE + 4 + 500,
74 .flags = IORESOURCE_MEM,
75 },
76 [2] = {
77 .start = CMX255_ETHIRQ,
78 .end = CMX255_ETHIRQ,
79 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
80 }
81 };
82
83 static struct resource cmx270_dm9000_resource[] = {
84 [0] = {
85 .start = CMX270_DM9000_PHYS_BASE,
86 .end = CMX270_DM9000_PHYS_BASE + 3,
87 .flags = IORESOURCE_MEM,
88 },
89 [1] = {
90 .start = CMX270_DM9000_PHYS_BASE + 8,
91 .end = CMX270_DM9000_PHYS_BASE + 8 + 500,
92 .flags = IORESOURCE_MEM,
93 },
94 [2] = {
95 .start = CMX270_ETHIRQ,
96 .end = CMX270_ETHIRQ,
97 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
98 }
99 };
100
101 static struct dm9000_plat_data cmx270_dm9000_platdata = {
102 .flags = DM9000_PLATF_32BITONLY | DM9000_PLATF_NO_EEPROM,
103 };
104
105 static struct platform_device cmx2xx_dm9000_device = {
106 .name = "dm9000",
107 .id = 0,
108 .num_resources = ARRAY_SIZE(cmx270_dm9000_resource),
109 .dev = {
110 .platform_data = &cmx270_dm9000_platdata,
111 }
112 };
113
cmx2xx_init_dm9000(void)114 static void __init cmx2xx_init_dm9000(void)
115 {
116 if (cpu_is_pxa25x())
117 cmx2xx_dm9000_device.resource = cmx255_dm9000_resource;
118 else
119 cmx2xx_dm9000_device.resource = cmx270_dm9000_resource;
120 platform_device_register(&cmx2xx_dm9000_device);
121 }
122 #else
cmx2xx_init_dm9000(void)123 static inline void cmx2xx_init_dm9000(void) {}
124 #endif
125
126 /* UCB1400 touchscreen controller */
127 #if defined(CONFIG_TOUCHSCREEN_UCB1400) || defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
128 static struct platform_device cmx2xx_ts_device = {
129 .name = "ucb1400_core",
130 .id = -1,
131 };
132
cmx2xx_init_touchscreen(void)133 static void __init cmx2xx_init_touchscreen(void)
134 {
135 platform_device_register(&cmx2xx_ts_device);
136 }
137 #else
cmx2xx_init_touchscreen(void)138 static inline void cmx2xx_init_touchscreen(void) {}
139 #endif
140
141 /* CM-X270 LEDs */
142 #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
143 static struct gpio_led cmx2xx_leds[] = {
144 [0] = {
145 .name = "cm-x2xx:red",
146 .default_trigger = "nand-disk",
147 .active_low = 1,
148 },
149 [1] = {
150 .name = "cm-x2xx:green",
151 .default_trigger = "heartbeat",
152 .active_low = 1,
153 },
154 };
155
156 static struct gpio_led_platform_data cmx2xx_gpio_led_pdata = {
157 .num_leds = ARRAY_SIZE(cmx2xx_leds),
158 .leds = cmx2xx_leds,
159 };
160
161 static struct platform_device cmx2xx_led_device = {
162 .name = "leds-gpio",
163 .id = -1,
164 .dev = {
165 .platform_data = &cmx2xx_gpio_led_pdata,
166 },
167 };
168
cmx2xx_init_leds(void)169 static void __init cmx2xx_init_leds(void)
170 {
171 if (cpu_is_pxa25x()) {
172 cmx2xx_leds[0].gpio = CMX255_GPIO_RED;
173 cmx2xx_leds[1].gpio = CMX255_GPIO_GREEN;
174 } else {
175 cmx2xx_leds[0].gpio = CMX270_GPIO_RED;
176 cmx2xx_leds[1].gpio = CMX270_GPIO_GREEN;
177 }
178 platform_device_register(&cmx2xx_led_device);
179 }
180 #else
cmx2xx_init_leds(void)181 static inline void cmx2xx_init_leds(void) {}
182 #endif
183
184 #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
185 /*
186 Display definitions
187 keep these for backwards compatibility, although symbolic names (as
188 e.g. in lpd270.c) looks better
189 */
190 #define MTYPE_STN320x240 0
191 #define MTYPE_TFT640x480 1
192 #define MTYPE_CRT640x480 2
193 #define MTYPE_CRT800x600 3
194 #define MTYPE_TFT320x240 6
195 #define MTYPE_STN640x480 7
196
197 static struct pxafb_mode_info generic_stn_320x240_mode = {
198 .pixclock = 76923,
199 .bpp = 8,
200 .xres = 320,
201 .yres = 240,
202 .hsync_len = 3,
203 .vsync_len = 2,
204 .left_margin = 3,
205 .upper_margin = 0,
206 .right_margin = 3,
207 .lower_margin = 0,
208 .sync = (FB_SYNC_HOR_HIGH_ACT |
209 FB_SYNC_VERT_HIGH_ACT),
210 .cmap_greyscale = 0,
211 };
212
213 static struct pxafb_mach_info generic_stn_320x240 = {
214 .modes = &generic_stn_320x240_mode,
215 .num_modes = 1,
216 .lcd_conn = LCD_COLOR_STN_8BPP | LCD_PCLK_EDGE_FALL |\
217 LCD_AC_BIAS_FREQ(0xff),
218 .cmap_inverse = 0,
219 .cmap_static = 0,
220 };
221
222 static struct pxafb_mode_info generic_tft_640x480_mode = {
223 .pixclock = 38461,
224 .bpp = 8,
225 .xres = 640,
226 .yres = 480,
227 .hsync_len = 60,
228 .vsync_len = 2,
229 .left_margin = 70,
230 .upper_margin = 10,
231 .right_margin = 70,
232 .lower_margin = 5,
233 .sync = 0,
234 .cmap_greyscale = 0,
235 };
236
237 static struct pxafb_mach_info generic_tft_640x480 = {
238 .modes = &generic_tft_640x480_mode,
239 .num_modes = 1,
240 .lcd_conn = LCD_COLOR_TFT_8BPP | LCD_PCLK_EDGE_FALL |\
241 LCD_AC_BIAS_FREQ(0xff),
242 .cmap_inverse = 0,
243 .cmap_static = 0,
244 };
245
246 static struct pxafb_mode_info generic_crt_640x480_mode = {
247 .pixclock = 38461,
248 .bpp = 8,
249 .xres = 640,
250 .yres = 480,
251 .hsync_len = 63,
252 .vsync_len = 2,
253 .left_margin = 81,
254 .upper_margin = 33,
255 .right_margin = 16,
256 .lower_margin = 10,
257 .sync = (FB_SYNC_HOR_HIGH_ACT |
258 FB_SYNC_VERT_HIGH_ACT),
259 .cmap_greyscale = 0,
260 };
261
262 static struct pxafb_mach_info generic_crt_640x480 = {
263 .modes = &generic_crt_640x480_mode,
264 .num_modes = 1,
265 .lcd_conn = LCD_COLOR_TFT_8BPP | LCD_AC_BIAS_FREQ(0xff),
266 .cmap_inverse = 0,
267 .cmap_static = 0,
268 };
269
270 static struct pxafb_mode_info generic_crt_800x600_mode = {
271 .pixclock = 28846,
272 .bpp = 8,
273 .xres = 800,
274 .yres = 600,
275 .hsync_len = 63,
276 .vsync_len = 2,
277 .left_margin = 26,
278 .upper_margin = 21,
279 .right_margin = 26,
280 .lower_margin = 11,
281 .sync = (FB_SYNC_HOR_HIGH_ACT |
282 FB_SYNC_VERT_HIGH_ACT),
283 .cmap_greyscale = 0,
284 };
285
286 static struct pxafb_mach_info generic_crt_800x600 = {
287 .modes = &generic_crt_800x600_mode,
288 .num_modes = 1,
289 .lcd_conn = LCD_COLOR_TFT_8BPP | LCD_AC_BIAS_FREQ(0xff),
290 .cmap_inverse = 0,
291 .cmap_static = 0,
292 };
293
294 static struct pxafb_mode_info generic_tft_320x240_mode = {
295 .pixclock = 134615,
296 .bpp = 16,
297 .xres = 320,
298 .yres = 240,
299 .hsync_len = 63,
300 .vsync_len = 7,
301 .left_margin = 75,
302 .upper_margin = 0,
303 .right_margin = 15,
304 .lower_margin = 15,
305 .sync = 0,
306 .cmap_greyscale = 0,
307 };
308
309 static struct pxafb_mach_info generic_tft_320x240 = {
310 .modes = &generic_tft_320x240_mode,
311 .num_modes = 1,
312 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_AC_BIAS_FREQ(0xff),
313 .cmap_inverse = 0,
314 .cmap_static = 0,
315 };
316
317 static struct pxafb_mode_info generic_stn_640x480_mode = {
318 .pixclock = 57692,
319 .bpp = 8,
320 .xres = 640,
321 .yres = 480,
322 .hsync_len = 4,
323 .vsync_len = 2,
324 .left_margin = 10,
325 .upper_margin = 5,
326 .right_margin = 10,
327 .lower_margin = 5,
328 .sync = (FB_SYNC_HOR_HIGH_ACT |
329 FB_SYNC_VERT_HIGH_ACT),
330 .cmap_greyscale = 0,
331 };
332
333 static struct pxafb_mach_info generic_stn_640x480 = {
334 .modes = &generic_stn_640x480_mode,
335 .num_modes = 1,
336 .lcd_conn = LCD_COLOR_STN_8BPP | LCD_AC_BIAS_FREQ(0xff),
337 .cmap_inverse = 0,
338 .cmap_static = 0,
339 };
340
341 static struct pxafb_mach_info *cmx2xx_display = &generic_crt_640x480;
342
cmx2xx_set_display(char * str)343 static int __init cmx2xx_set_display(char *str)
344 {
345 int disp_type = simple_strtol(str, NULL, 0);
346 switch (disp_type) {
347 case MTYPE_STN320x240:
348 cmx2xx_display = &generic_stn_320x240;
349 break;
350 case MTYPE_TFT640x480:
351 cmx2xx_display = &generic_tft_640x480;
352 break;
353 case MTYPE_CRT640x480:
354 cmx2xx_display = &generic_crt_640x480;
355 break;
356 case MTYPE_CRT800x600:
357 cmx2xx_display = &generic_crt_800x600;
358 break;
359 case MTYPE_TFT320x240:
360 cmx2xx_display = &generic_tft_320x240;
361 break;
362 case MTYPE_STN640x480:
363 cmx2xx_display = &generic_stn_640x480;
364 break;
365 default: /* fallback to CRT 640x480 */
366 cmx2xx_display = &generic_crt_640x480;
367 break;
368 }
369 return 1;
370 }
371
372 /*
373 This should be done really early to get proper configuration for
374 frame buffer.
375 Indeed, pxafb parameters can be used istead, but CM-X2XX bootloader
376 has limitied line length for kernel command line, and also it will
377 break compatibitlty with proprietary releases already in field.
378 */
379 __setup("monitor=", cmx2xx_set_display);
380
cmx2xx_init_display(void)381 static void __init cmx2xx_init_display(void)
382 {
383 pxa_set_fb_info(NULL, cmx2xx_display);
384 }
385 #else
cmx2xx_init_display(void)386 static inline void cmx2xx_init_display(void) {}
387 #endif
388
389 #ifdef CONFIG_PM
390 static unsigned long sleep_save_msc[10];
391
cmx2xx_suspend(void)392 static int cmx2xx_suspend(void)
393 {
394 cmx2xx_pci_suspend();
395
396 /* save MSC registers */
397 sleep_save_msc[0] = __raw_readl(MSC0);
398 sleep_save_msc[1] = __raw_readl(MSC1);
399 sleep_save_msc[2] = __raw_readl(MSC2);
400
401 /* setup power saving mode registers */
402 PCFR = 0x0;
403 PSLR = 0xff400000;
404 PMCR = 0x00000005;
405 PWER = 0x80000000;
406 PFER = 0x00000000;
407 PRER = 0x00000000;
408 PGSR0 = 0xC0018800;
409 PGSR1 = 0x004F0002;
410 PGSR2 = 0x6021C000;
411 PGSR3 = 0x00020000;
412
413 return 0;
414 }
415
cmx2xx_resume(void)416 static void cmx2xx_resume(void)
417 {
418 cmx2xx_pci_resume();
419
420 /* restore MSC registers */
421 __raw_writel(sleep_save_msc[0], MSC0);
422 __raw_writel(sleep_save_msc[1], MSC1);
423 __raw_writel(sleep_save_msc[2], MSC2);
424 }
425
426 static struct syscore_ops cmx2xx_pm_syscore_ops = {
427 .resume = cmx2xx_resume,
428 .suspend = cmx2xx_suspend,
429 };
430
cmx2xx_pm_init(void)431 static int __init cmx2xx_pm_init(void)
432 {
433 register_syscore_ops(&cmx2xx_pm_syscore_ops);
434
435 return 0;
436 }
437 #else
cmx2xx_pm_init(void)438 static int __init cmx2xx_pm_init(void) { return 0; }
439 #endif
440
441 #if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE)
cmx2xx_init_ac97(void)442 static void __init cmx2xx_init_ac97(void)
443 {
444 pxa_set_ac97_info(NULL);
445 }
446 #else
cmx2xx_init_ac97(void)447 static inline void cmx2xx_init_ac97(void) {}
448 #endif
449
cmx2xx_init(void)450 static void __init cmx2xx_init(void)
451 {
452 pxa_set_ffuart_info(NULL);
453 pxa_set_btuart_info(NULL);
454 pxa_set_stuart_info(NULL);
455
456 cmx2xx_pm_init();
457
458 if (cpu_is_pxa25x())
459 cmx255_init();
460 else
461 cmx270_init();
462
463 cmx2xx_init_dm9000();
464 cmx2xx_init_display();
465 cmx2xx_init_ac97();
466 cmx2xx_init_touchscreen();
467 cmx2xx_init_leds();
468 }
469
cmx2xx_init_irq(void)470 static void __init cmx2xx_init_irq(void)
471 {
472 if (cpu_is_pxa25x()) {
473 pxa25x_init_irq();
474 cmx2xx_pci_init_irq(CMX255_GPIO_IT8152_IRQ);
475 } else {
476 pxa27x_init_irq();
477 cmx2xx_pci_init_irq(CMX270_GPIO_IT8152_IRQ);
478 }
479 }
480
481 #ifdef CONFIG_PCI
482 /* Map PCI companion statically */
483 static struct map_desc cmx2xx_io_desc[] __initdata = {
484 [0] = { /* PCI bridge */
485 .virtual = (unsigned long)CMX2XX_IT8152_VIRT,
486 .pfn = __phys_to_pfn(PXA_CS4_PHYS),
487 .length = SZ_64M,
488 .type = MT_DEVICE
489 },
490 };
491
cmx2xx_map_io(void)492 static void __init cmx2xx_map_io(void)
493 {
494 if (cpu_is_pxa25x())
495 pxa25x_map_io();
496
497 if (cpu_is_pxa27x())
498 pxa27x_map_io();
499
500 iotable_init(cmx2xx_io_desc, ARRAY_SIZE(cmx2xx_io_desc));
501
502 it8152_base_address = CMX2XX_IT8152_VIRT;
503 }
504 #else
cmx2xx_map_io(void)505 static void __init cmx2xx_map_io(void)
506 {
507 if (cpu_is_pxa25x())
508 pxa25x_map_io();
509
510 if (cpu_is_pxa27x())
511 pxa27x_map_io();
512 }
513 #endif
514
515 MACHINE_START(ARMCORE, "Compulab CM-X2XX")
516 .atag_offset = 0x100,
517 .map_io = cmx2xx_map_io,
518 .nr_irqs = CMX2XX_NR_IRQS,
519 .init_irq = cmx2xx_init_irq,
520 /* NOTE: pxa25x_handle_irq() works on PXA27x w/o camera support */
521 .handle_irq = pxa25x_handle_irq,
522 .timer = &pxa_timer,
523 .init_machine = cmx2xx_init,
524 #ifdef CONFIG_PCI
525 .dma_zone_size = SZ_64M,
526 #endif
527 .restart = pxa_restart,
528 MACHINE_END
529