1 /*
2 * SDRC register values for Nokia boards
3 *
4 * Copyright (C) 2008, 2010-2011 Nokia Corporation
5 *
6 * Lauri Leukkunen <lauri.leukkunen@nokia.com>
7 *
8 * Original code by Juha Yrjola <juha.yrjola@solidboot.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15 #include <linux/kernel.h>
16 #include <linux/clk.h>
17 #include <linux/err.h>
18 #include <linux/io.h>
19
20 #include <plat/io.h>
21 #include "common.h"
22 #include <plat/clock.h>
23 #include <plat/sdrc.h>
24
25 #include "sdram-nokia.h"
26
27 /* In picoseconds, except for tREF (ns), tXP, tCKE, tWTR (clks) */
28 struct sdram_timings {
29 u32 casl;
30 u32 tDAL;
31 u32 tDPL;
32 u32 tRRD;
33 u32 tRCD;
34 u32 tRP;
35 u32 tRAS;
36 u32 tRC;
37 u32 tRFC;
38 u32 tXSR;
39
40 u32 tREF; /* in ns */
41
42 u32 tXP;
43 u32 tCKE;
44 u32 tWTR;
45 };
46
47 static const struct sdram_timings nokia_97dot6mhz_timings[] = {
48 {
49 .casl = 3,
50 .tDAL = 30725,
51 .tDPL = 15362,
52 .tRRD = 10241,
53 .tRCD = 20483,
54 .tRP = 15362,
55 .tRAS = 40967,
56 .tRC = 56330,
57 .tRFC = 138266,
58 .tXSR = 204839,
59
60 .tREF = 7798,
61
62 .tXP = 2,
63 .tCKE = 4,
64 .tWTR = 2,
65 },
66 };
67
68 static const struct sdram_timings nokia_166mhz_timings[] = {
69 {
70 .casl = 3,
71 .tDAL = 33000,
72 .tDPL = 15000,
73 .tRRD = 12000,
74 .tRCD = 22500,
75 .tRP = 18000,
76 .tRAS = 42000,
77 .tRC = 66000,
78 .tRFC = 138000,
79 .tXSR = 200000,
80
81 .tREF = 7800,
82
83 .tXP = 2,
84 .tCKE = 2,
85 .tWTR = 2
86 },
87 };
88
89 static const struct sdram_timings nokia_195dot2mhz_timings[] = {
90 {
91 .casl = 3,
92 .tDAL = 30725,
93 .tDPL = 15362,
94 .tRRD = 10241,
95 .tRCD = 20483,
96 .tRP = 15362,
97 .tRAS = 40967,
98 .tRC = 56330,
99 .tRFC = 138266,
100 .tXSR = 204839,
101
102 .tREF = 7752,
103
104 .tXP = 2,
105 .tCKE = 4,
106 .tWTR = 2,
107 },
108 };
109
110 static const struct sdram_timings nokia_200mhz_timings[] = {
111 {
112 .casl = 3,
113 .tDAL = 30000,
114 .tDPL = 15000,
115 .tRRD = 10000,
116 .tRCD = 20000,
117 .tRP = 15000,
118 .tRAS = 40000,
119 .tRC = 55000,
120 .tRFC = 140000,
121 .tXSR = 200000,
122
123 .tREF = 7800,
124
125 .tXP = 2,
126 .tCKE = 4,
127 .tWTR = 2
128 },
129 };
130
131 static const struct {
132 long rate;
133 struct sdram_timings const *data;
134 } nokia_timings[] = {
135 { 83000000, nokia_166mhz_timings },
136 { 97600000, nokia_97dot6mhz_timings },
137 { 100000000, nokia_200mhz_timings },
138 { 166000000, nokia_166mhz_timings },
139 { 195200000, nokia_195dot2mhz_timings },
140 { 200000000, nokia_200mhz_timings },
141 };
142 static struct omap_sdrc_params nokia_sdrc_params[ARRAY_SIZE(nokia_timings) + 1];
143
sdrc_get_fclk_period(long rate)144 static unsigned long sdrc_get_fclk_period(long rate)
145 {
146 /* In picoseconds */
147 return 1000000000 / rate;
148 }
149
sdrc_ps_to_ticks(unsigned int time_ps,long rate)150 static unsigned int sdrc_ps_to_ticks(unsigned int time_ps, long rate)
151 {
152 unsigned long tick_ps;
153
154 /* Calculate in picosecs to yield more exact results */
155 tick_ps = sdrc_get_fclk_period(rate);
156
157 return (time_ps + tick_ps - 1) / tick_ps;
158 }
159 #undef DEBUG
160 #ifdef DEBUG
set_sdrc_timing_regval(u32 * regval,int st_bit,int end_bit,int ticks,long rate,const char * name)161 static int set_sdrc_timing_regval(u32 *regval, int st_bit, int end_bit,
162 int ticks, long rate, const char *name)
163 #else
164 static int set_sdrc_timing_regval(u32 *regval, int st_bit, int end_bit,
165 int ticks)
166 #endif
167 {
168 int mask, nr_bits;
169
170 nr_bits = end_bit - st_bit + 1;
171 if (ticks >= 1 << nr_bits)
172 return -1;
173 mask = (1 << nr_bits) - 1;
174 *regval &= ~(mask << st_bit);
175 *regval |= ticks << st_bit;
176 #ifdef DEBUG
177 printk(KERN_INFO "SDRC %s: %i ticks %i ns\n", name, ticks,
178 (unsigned int)sdrc_get_fclk_period(rate) * ticks /
179 1000);
180 #endif
181
182 return 0;
183 }
184
185 #ifdef DEBUG
186 #define SDRC_SET_ONE(reg, st, end, field, rate) \
187 if (set_sdrc_timing_regval((reg), (st), (end), \
188 memory_timings->field, (rate), #field) < 0) \
189 err = -1;
190 #else
191 #define SDRC_SET_ONE(reg, st, end, field, rate) \
192 if (set_sdrc_timing_regval((reg), (st), (end), \
193 memory_timings->field) < 0) \
194 err = -1;
195 #endif
196
197 #ifdef DEBUG
set_sdrc_timing_regval_ps(u32 * regval,int st_bit,int end_bit,int time,long rate,const char * name)198 static int set_sdrc_timing_regval_ps(u32 *regval, int st_bit, int end_bit,
199 int time, long rate, const char *name)
200 #else
201 static int set_sdrc_timing_regval_ps(u32 *regval, int st_bit, int end_bit,
202 int time, long rate)
203 #endif
204 {
205 int ticks, ret;
206 ret = 0;
207
208 if (time == 0)
209 ticks = 0;
210 else
211 ticks = sdrc_ps_to_ticks(time, rate);
212
213 #ifdef DEBUG
214 ret = set_sdrc_timing_regval(regval, st_bit, end_bit, ticks,
215 rate, name);
216 #else
217 ret = set_sdrc_timing_regval(regval, st_bit, end_bit, ticks);
218 #endif
219
220 return ret;
221 }
222
223 #ifdef DEBUG
224 #define SDRC_SET_ONE_PS(reg, st, end, field, rate) \
225 if (set_sdrc_timing_regval_ps((reg), (st), (end), \
226 memory_timings->field, \
227 (rate), #field) < 0) \
228 err = -1;
229
230 #else
231 #define SDRC_SET_ONE_PS(reg, st, end, field, rate) \
232 if (set_sdrc_timing_regval_ps((reg), (st), (end), \
233 memory_timings->field, (rate)) < 0) \
234 err = -1;
235 #endif
236
sdrc_timings(int id,long rate,const struct sdram_timings * memory_timings)237 static int sdrc_timings(int id, long rate,
238 const struct sdram_timings *memory_timings)
239 {
240 u32 ticks_per_ms;
241 u32 rfr, l;
242 u32 actim_ctrla = 0, actim_ctrlb = 0;
243 u32 rfr_ctrl;
244 int err = 0;
245 long l3_rate = rate / 1000;
246
247 SDRC_SET_ONE_PS(&actim_ctrla, 0, 4, tDAL, l3_rate);
248 SDRC_SET_ONE_PS(&actim_ctrla, 6, 8, tDPL, l3_rate);
249 SDRC_SET_ONE_PS(&actim_ctrla, 9, 11, tRRD, l3_rate);
250 SDRC_SET_ONE_PS(&actim_ctrla, 12, 14, tRCD, l3_rate);
251 SDRC_SET_ONE_PS(&actim_ctrla, 15, 17, tRP, l3_rate);
252 SDRC_SET_ONE_PS(&actim_ctrla, 18, 21, tRAS, l3_rate);
253 SDRC_SET_ONE_PS(&actim_ctrla, 22, 26, tRC, l3_rate);
254 SDRC_SET_ONE_PS(&actim_ctrla, 27, 31, tRFC, l3_rate);
255
256 SDRC_SET_ONE_PS(&actim_ctrlb, 0, 7, tXSR, l3_rate);
257
258 SDRC_SET_ONE(&actim_ctrlb, 8, 10, tXP, l3_rate);
259 SDRC_SET_ONE(&actim_ctrlb, 12, 14, tCKE, l3_rate);
260 SDRC_SET_ONE(&actim_ctrlb, 16, 17, tWTR, l3_rate);
261
262 ticks_per_ms = l3_rate;
263 rfr = memory_timings[0].tREF * ticks_per_ms / 1000000;
264 if (rfr > 65535 + 50)
265 rfr = 65535;
266 else
267 rfr -= 50;
268
269 #ifdef DEBUG
270 printk(KERN_INFO "SDRC tREF: %i ticks\n", rfr);
271 #endif
272
273 l = rfr << 8;
274 rfr_ctrl = l | 0x1; /* autorefresh, reload counter with 1xARCV */
275
276 nokia_sdrc_params[id].rate = rate;
277 nokia_sdrc_params[id].actim_ctrla = actim_ctrla;
278 nokia_sdrc_params[id].actim_ctrlb = actim_ctrlb;
279 nokia_sdrc_params[id].rfr_ctrl = rfr_ctrl;
280 nokia_sdrc_params[id].mr = 0x32;
281
282 nokia_sdrc_params[id + 1].rate = 0;
283
284 return err;
285 }
286
nokia_get_sdram_timings(void)287 struct omap_sdrc_params *nokia_get_sdram_timings(void)
288 {
289 int err = 0;
290 int i;
291
292 for (i = 0; i < ARRAY_SIZE(nokia_timings); i++) {
293 err |= sdrc_timings(i, nokia_timings[i].rate,
294 nokia_timings[i].data);
295 if (err)
296 pr_err("%s: error with rate %ld: %d\n", __func__,
297 nokia_timings[i].rate, err);
298 }
299
300 return err ? NULL : nokia_sdrc_params;
301 }
302
303