1 /*
2  * linux/arch/arm/mach-omap2/board-omap3evm.c
3  *
4  * Copyright (C) 2008 Texas Instruments
5  *
6  * Modified from mach-omap2/board-3430sdp.c
7  *
8  * Initial code: Syed Mohammed Khasim
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License version 2 as
12  * published by the Free Software Foundation.
13  */
14 
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/platform_device.h>
18 #include <linux/delay.h>
19 #include <linux/err.h>
20 #include <linux/clk.h>
21 #include <linux/gpio.h>
22 #include <linux/input.h>
23 #include <linux/input/matrix_keypad.h>
24 #include <linux/leds.h>
25 #include <linux/interrupt.h>
26 
27 #include <linux/spi/spi.h>
28 #include <linux/spi/ads7846.h>
29 #include <linux/i2c/twl.h>
30 #include <linux/usb/otg.h>
31 #include <linux/smsc911x.h>
32 
33 #include <linux/wl12xx.h>
34 #include <linux/regulator/fixed.h>
35 #include <linux/regulator/machine.h>
36 #include <linux/mmc/host.h>
37 #include <linux/export.h>
38 
39 #include <mach/hardware.h>
40 #include <asm/mach-types.h>
41 #include <asm/mach/arch.h>
42 #include <asm/mach/map.h>
43 
44 #include <plat/board.h>
45 #include <plat/usb.h>
46 #include "common.h"
47 #include <plat/mcspi.h>
48 #include <video/omapdss.h>
49 #include <video/omap-panel-dvi.h>
50 
51 #include "mux.h"
52 #include "sdram-micron-mt46h32m32lf-6.h"
53 #include "hsmmc.h"
54 #include "common-board-devices.h"
55 
56 #define OMAP3_EVM_TS_GPIO	175
57 #define OMAP3_EVM_EHCI_VBUS	22
58 #define OMAP3_EVM_EHCI_SELECT	61
59 
60 #define OMAP3EVM_ETHR_START	0x2c000000
61 #define OMAP3EVM_ETHR_SIZE	1024
62 #define OMAP3EVM_ETHR_ID_REV	0x50
63 #define OMAP3EVM_ETHR_GPIO_IRQ	176
64 #define OMAP3EVM_SMSC911X_CS	5
65 /*
66  * Eth Reset signal
67  *	64 = Generation 1 (<=RevD)
68  *	7 = Generation 2 (>=RevE)
69  */
70 #define OMAP3EVM_GEN1_ETHR_GPIO_RST	64
71 #define OMAP3EVM_GEN2_ETHR_GPIO_RST	7
72 
73 static u8 omap3_evm_version;
74 
get_omap3_evm_rev(void)75 u8 get_omap3_evm_rev(void)
76 {
77 	return omap3_evm_version;
78 }
79 EXPORT_SYMBOL(get_omap3_evm_rev);
80 
omap3_evm_get_revision(void)81 static void __init omap3_evm_get_revision(void)
82 {
83 	void __iomem *ioaddr;
84 	unsigned int smsc_id;
85 
86 	/* Ethernet PHY ID is stored at ID_REV register */
87 	ioaddr = ioremap_nocache(OMAP3EVM_ETHR_START, SZ_1K);
88 	if (!ioaddr)
89 		return;
90 	smsc_id = readl(ioaddr + OMAP3EVM_ETHR_ID_REV) & 0xFFFF0000;
91 	iounmap(ioaddr);
92 
93 	switch (smsc_id) {
94 	/*SMSC9115 chipset*/
95 	case 0x01150000:
96 		omap3_evm_version = OMAP3EVM_BOARD_GEN_1;
97 		break;
98 	/*SMSC 9220 chipset*/
99 	case 0x92200000:
100 	default:
101 		omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
102 	}
103 }
104 
105 #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
106 #include <plat/gpmc-smsc911x.h>
107 
108 static struct omap_smsc911x_platform_data smsc911x_cfg = {
109 	.cs             = OMAP3EVM_SMSC911X_CS,
110 	.gpio_irq       = OMAP3EVM_ETHR_GPIO_IRQ,
111 	.gpio_reset     = -EINVAL,
112 	.flags		= SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
113 };
114 
omap3evm_init_smsc911x(void)115 static inline void __init omap3evm_init_smsc911x(void)
116 {
117 	struct clk *l3ck;
118 	unsigned int rate;
119 
120 	l3ck = clk_get(NULL, "l3_ck");
121 	if (IS_ERR(l3ck))
122 		rate = 100000000;
123 	else
124 		rate = clk_get_rate(l3ck);
125 
126 	/* Configure ethernet controller reset gpio */
127 	if (cpu_is_omap3430()) {
128 		if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1)
129 			smsc911x_cfg.gpio_reset = OMAP3EVM_GEN1_ETHR_GPIO_RST;
130 		else
131 			smsc911x_cfg.gpio_reset = OMAP3EVM_GEN2_ETHR_GPIO_RST;
132 	}
133 
134 	gpmc_smsc911x_init(&smsc911x_cfg);
135 }
136 
137 #else
omap3evm_init_smsc911x(void)138 static inline void __init omap3evm_init_smsc911x(void) { return; }
139 #endif
140 
141 /*
142  * OMAP3EVM LCD Panel control signals
143  */
144 #define OMAP3EVM_LCD_PANEL_LR		2
145 #define OMAP3EVM_LCD_PANEL_UD		3
146 #define OMAP3EVM_LCD_PANEL_INI		152
147 #define OMAP3EVM_LCD_PANEL_ENVDD	153
148 #define OMAP3EVM_LCD_PANEL_QVGA		154
149 #define OMAP3EVM_LCD_PANEL_RESB		155
150 #define OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO	210
151 #define OMAP3EVM_DVI_PANEL_EN_GPIO	199
152 
153 static struct gpio omap3_evm_dss_gpios[] __initdata = {
154 	{ OMAP3EVM_LCD_PANEL_RESB,  GPIOF_OUT_INIT_HIGH, "lcd_panel_resb"  },
155 	{ OMAP3EVM_LCD_PANEL_INI,   GPIOF_OUT_INIT_HIGH, "lcd_panel_ini"   },
156 	{ OMAP3EVM_LCD_PANEL_QVGA,  GPIOF_OUT_INIT_LOW,  "lcd_panel_qvga"  },
157 	{ OMAP3EVM_LCD_PANEL_LR,    GPIOF_OUT_INIT_HIGH, "lcd_panel_lr"    },
158 	{ OMAP3EVM_LCD_PANEL_UD,    GPIOF_OUT_INIT_HIGH, "lcd_panel_ud"    },
159 	{ OMAP3EVM_LCD_PANEL_ENVDD, GPIOF_OUT_INIT_LOW,  "lcd_panel_envdd" },
160 };
161 
162 static int lcd_enabled;
163 static int dvi_enabled;
164 
omap3_evm_display_init(void)165 static void __init omap3_evm_display_init(void)
166 {
167 	int r;
168 
169 	r = gpio_request_array(omap3_evm_dss_gpios,
170 			       ARRAY_SIZE(omap3_evm_dss_gpios));
171 	if (r)
172 		printk(KERN_ERR "failed to get lcd_panel_* gpios\n");
173 }
174 
omap3_evm_enable_lcd(struct omap_dss_device * dssdev)175 static int omap3_evm_enable_lcd(struct omap_dss_device *dssdev)
176 {
177 	if (dvi_enabled) {
178 		printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
179 		return -EINVAL;
180 	}
181 	gpio_set_value(OMAP3EVM_LCD_PANEL_ENVDD, 0);
182 
183 	if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
184 		gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0);
185 	else
186 		gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1);
187 
188 	lcd_enabled = 1;
189 	return 0;
190 }
191 
omap3_evm_disable_lcd(struct omap_dss_device * dssdev)192 static void omap3_evm_disable_lcd(struct omap_dss_device *dssdev)
193 {
194 	gpio_set_value(OMAP3EVM_LCD_PANEL_ENVDD, 1);
195 
196 	if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
197 		gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1);
198 	else
199 		gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0);
200 
201 	lcd_enabled = 0;
202 }
203 
204 static struct omap_dss_device omap3_evm_lcd_device = {
205 	.name			= "lcd",
206 	.driver_name		= "sharp_ls_panel",
207 	.type			= OMAP_DISPLAY_TYPE_DPI,
208 	.phy.dpi.data_lines	= 18,
209 	.platform_enable	= omap3_evm_enable_lcd,
210 	.platform_disable	= omap3_evm_disable_lcd,
211 };
212 
omap3_evm_enable_tv(struct omap_dss_device * dssdev)213 static int omap3_evm_enable_tv(struct omap_dss_device *dssdev)
214 {
215 	return 0;
216 }
217 
omap3_evm_disable_tv(struct omap_dss_device * dssdev)218 static void omap3_evm_disable_tv(struct omap_dss_device *dssdev)
219 {
220 }
221 
222 static struct omap_dss_device omap3_evm_tv_device = {
223 	.name			= "tv",
224 	.driver_name		= "venc",
225 	.type			= OMAP_DISPLAY_TYPE_VENC,
226 	.phy.venc.type		= OMAP_DSS_VENC_TYPE_SVIDEO,
227 	.platform_enable	= omap3_evm_enable_tv,
228 	.platform_disable	= omap3_evm_disable_tv,
229 };
230 
omap3_evm_enable_dvi(struct omap_dss_device * dssdev)231 static int omap3_evm_enable_dvi(struct omap_dss_device *dssdev)
232 {
233 	if (lcd_enabled) {
234 		printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
235 		return -EINVAL;
236 	}
237 
238 	gpio_set_value_cansleep(OMAP3EVM_DVI_PANEL_EN_GPIO, 1);
239 
240 	dvi_enabled = 1;
241 	return 0;
242 }
243 
omap3_evm_disable_dvi(struct omap_dss_device * dssdev)244 static void omap3_evm_disable_dvi(struct omap_dss_device *dssdev)
245 {
246 	gpio_set_value_cansleep(OMAP3EVM_DVI_PANEL_EN_GPIO, 0);
247 
248 	dvi_enabled = 0;
249 }
250 
251 static struct panel_dvi_platform_data dvi_panel = {
252 	.platform_enable	= omap3_evm_enable_dvi,
253 	.platform_disable	= omap3_evm_disable_dvi,
254 };
255 
256 static struct omap_dss_device omap3_evm_dvi_device = {
257 	.name			= "dvi",
258 	.type			= OMAP_DISPLAY_TYPE_DPI,
259 	.driver_name		= "dvi",
260 	.data			= &dvi_panel,
261 	.phy.dpi.data_lines	= 24,
262 };
263 
264 static struct omap_dss_device *omap3_evm_dss_devices[] = {
265 	&omap3_evm_lcd_device,
266 	&omap3_evm_tv_device,
267 	&omap3_evm_dvi_device,
268 };
269 
270 static struct omap_dss_board_info omap3_evm_dss_data = {
271 	.num_devices	= ARRAY_SIZE(omap3_evm_dss_devices),
272 	.devices	= omap3_evm_dss_devices,
273 	.default_device	= &omap3_evm_lcd_device,
274 };
275 
276 static struct regulator_consumer_supply omap3evm_vmmc1_supply[] = {
277 	REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
278 };
279 
280 static struct regulator_consumer_supply omap3evm_vsim_supply[] = {
281 	REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
282 };
283 
284 /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
285 static struct regulator_init_data omap3evm_vmmc1 = {
286 	.constraints = {
287 		.min_uV			= 1850000,
288 		.max_uV			= 3150000,
289 		.valid_modes_mask	= REGULATOR_MODE_NORMAL
290 					| REGULATOR_MODE_STANDBY,
291 		.valid_ops_mask		= REGULATOR_CHANGE_VOLTAGE
292 					| REGULATOR_CHANGE_MODE
293 					| REGULATOR_CHANGE_STATUS,
294 	},
295 	.num_consumer_supplies	= ARRAY_SIZE(omap3evm_vmmc1_supply),
296 	.consumer_supplies	= omap3evm_vmmc1_supply,
297 };
298 
299 /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
300 static struct regulator_init_data omap3evm_vsim = {
301 	.constraints = {
302 		.min_uV			= 1800000,
303 		.max_uV			= 3000000,
304 		.valid_modes_mask	= REGULATOR_MODE_NORMAL
305 					| REGULATOR_MODE_STANDBY,
306 		.valid_ops_mask		= REGULATOR_CHANGE_VOLTAGE
307 					| REGULATOR_CHANGE_MODE
308 					| REGULATOR_CHANGE_STATUS,
309 	},
310 	.num_consumer_supplies	= ARRAY_SIZE(omap3evm_vsim_supply),
311 	.consumer_supplies	= omap3evm_vsim_supply,
312 };
313 
314 static struct omap2_hsmmc_info mmc[] = {
315 	{
316 		.mmc		= 1,
317 		.caps		= MMC_CAP_4_BIT_DATA,
318 		.gpio_cd	= -EINVAL,
319 		.gpio_wp	= 63,
320 	},
321 #ifdef CONFIG_WL12XX_PLATFORM_DATA
322 	{
323 		.name		= "wl1271",
324 		.mmc		= 2,
325 		.caps		= MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD,
326 		.gpio_wp	= -EINVAL,
327 		.gpio_cd	= -EINVAL,
328 		.nonremovable	= true,
329 	},
330 #endif
331 	{}	/* Terminator */
332 };
333 
334 static struct gpio_led gpio_leds[] = {
335 	{
336 		.name			= "omap3evm::ledb",
337 		/* normally not visible (board underside) */
338 		.default_trigger	= "default-on",
339 		.gpio			= -EINVAL,	/* gets replaced */
340 		.active_low		= true,
341 	},
342 };
343 
344 static struct gpio_led_platform_data gpio_led_info = {
345 	.leds		= gpio_leds,
346 	.num_leds	= ARRAY_SIZE(gpio_leds),
347 };
348 
349 static struct platform_device leds_gpio = {
350 	.name	= "leds-gpio",
351 	.id	= -1,
352 	.dev	= {
353 		.platform_data	= &gpio_led_info,
354 	},
355 };
356 
357 
omap3evm_twl_gpio_setup(struct device * dev,unsigned gpio,unsigned ngpio)358 static int omap3evm_twl_gpio_setup(struct device *dev,
359 		unsigned gpio, unsigned ngpio)
360 {
361 	int r, lcd_bl_en;
362 
363 	/* gpio + 0 is "mmc0_cd" (input/IRQ) */
364 	omap_mux_init_gpio(63, OMAP_PIN_INPUT);
365 	mmc[0].gpio_cd = gpio + 0;
366 	omap2_hsmmc_init(mmc);
367 
368 	/*
369 	 * Most GPIOs are for USB OTG.  Some are mostly sent to
370 	 * the P2 connector; notably LEDA for the LCD backlight.
371 	 */
372 
373 	/* TWL4030_GPIO_MAX + 0 == ledA, LCD Backlight control */
374 	lcd_bl_en = get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2 ?
375 		GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW;
376 	r = gpio_request_one(gpio + TWL4030_GPIO_MAX, lcd_bl_en, "EN_LCD_BKL");
377 	if (r)
378 		printk(KERN_ERR "failed to get/set lcd_bkl gpio\n");
379 
380 	/* gpio + 7 == DVI Enable */
381 	gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "EN_DVI");
382 
383 	/* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */
384 	gpio_leds[0].gpio = gpio + TWL4030_GPIO_MAX + 1;
385 
386 	platform_device_register(&leds_gpio);
387 
388 	return 0;
389 }
390 
391 static struct twl4030_gpio_platform_data omap3evm_gpio_data = {
392 	.gpio_base	= OMAP_MAX_GPIO_LINES,
393 	.irq_base	= TWL4030_GPIO_IRQ_BASE,
394 	.irq_end	= TWL4030_GPIO_IRQ_END,
395 	.use_leds	= true,
396 	.setup		= omap3evm_twl_gpio_setup,
397 };
398 
399 static uint32_t board_keymap[] = {
400 	KEY(0, 0, KEY_LEFT),
401 	KEY(0, 1, KEY_DOWN),
402 	KEY(0, 2, KEY_ENTER),
403 	KEY(0, 3, KEY_M),
404 
405 	KEY(1, 0, KEY_RIGHT),
406 	KEY(1, 1, KEY_UP),
407 	KEY(1, 2, KEY_I),
408 	KEY(1, 3, KEY_N),
409 
410 	KEY(2, 0, KEY_A),
411 	KEY(2, 1, KEY_E),
412 	KEY(2, 2, KEY_J),
413 	KEY(2, 3, KEY_O),
414 
415 	KEY(3, 0, KEY_B),
416 	KEY(3, 1, KEY_F),
417 	KEY(3, 2, KEY_K),
418 	KEY(3, 3, KEY_P)
419 };
420 
421 static struct matrix_keymap_data board_map_data = {
422 	.keymap			= board_keymap,
423 	.keymap_size		= ARRAY_SIZE(board_keymap),
424 };
425 
426 static struct twl4030_keypad_data omap3evm_kp_data = {
427 	.keymap_data	= &board_map_data,
428 	.rows		= 4,
429 	.cols		= 4,
430 	.rep		= 1,
431 };
432 
433 /* ads7846 on SPI */
434 static struct regulator_consumer_supply omap3evm_vio_supply[] = {
435 	REGULATOR_SUPPLY("vcc", "spi1.0"),
436 };
437 
438 /* VIO for ads7846 */
439 static struct regulator_init_data omap3evm_vio = {
440 	.constraints = {
441 		.min_uV			= 1800000,
442 		.max_uV			= 1800000,
443 		.apply_uV		= true,
444 		.valid_modes_mask	= REGULATOR_MODE_NORMAL
445 					| REGULATOR_MODE_STANDBY,
446 		.valid_ops_mask		= REGULATOR_CHANGE_MODE
447 					| REGULATOR_CHANGE_STATUS,
448 	},
449 	.num_consumer_supplies	= ARRAY_SIZE(omap3evm_vio_supply),
450 	.consumer_supplies	= omap3evm_vio_supply,
451 };
452 
453 #ifdef CONFIG_WL12XX_PLATFORM_DATA
454 
455 #define OMAP3EVM_WLAN_PMENA_GPIO	(150)
456 #define OMAP3EVM_WLAN_IRQ_GPIO		(149)
457 
458 static struct regulator_consumer_supply omap3evm_vmmc2_supply[] = {
459 	REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
460 };
461 
462 /* VMMC2 for driving the WL12xx module */
463 static struct regulator_init_data omap3evm_vmmc2 = {
464 	.constraints = {
465 		.valid_ops_mask	= REGULATOR_CHANGE_STATUS,
466 	},
467 	.num_consumer_supplies	= ARRAY_SIZE(omap3evm_vmmc2_supply),
468 	.consumer_supplies	= omap3evm_vmmc2_supply,
469 };
470 
471 static struct fixed_voltage_config omap3evm_vwlan = {
472 	.supply_name		= "vwl1271",
473 	.microvolts		= 1800000, /* 1.80V */
474 	.gpio			= OMAP3EVM_WLAN_PMENA_GPIO,
475 	.startup_delay		= 70000, /* 70ms */
476 	.enable_high		= 1,
477 	.enabled_at_boot	= 0,
478 	.init_data		= &omap3evm_vmmc2,
479 };
480 
481 static struct platform_device omap3evm_wlan_regulator = {
482 	.name		= "reg-fixed-voltage",
483 	.id		= 1,
484 	.dev = {
485 		.platform_data	= &omap3evm_vwlan,
486 	},
487 };
488 
489 struct wl12xx_platform_data omap3evm_wlan_data __initdata = {
490 	.irq = OMAP_GPIO_IRQ(OMAP3EVM_WLAN_IRQ_GPIO),
491 	.board_ref_clock = WL12XX_REFCLOCK_38, /* 38.4 MHz */
492 };
493 #endif
494 
495 static struct twl4030_platform_data omap3evm_twldata = {
496 	/* platform_data for children goes here */
497 	.keypad		= &omap3evm_kp_data,
498 	.gpio		= &omap3evm_gpio_data,
499 	.vio		= &omap3evm_vio,
500 	.vmmc1		= &omap3evm_vmmc1,
501 	.vsim		= &omap3evm_vsim,
502 };
503 
omap3_evm_i2c_init(void)504 static int __init omap3_evm_i2c_init(void)
505 {
506 	omap3_pmic_get_config(&omap3evm_twldata,
507 			TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC |
508 			TWL_COMMON_PDATA_AUDIO,
509 			TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
510 
511 	omap3evm_twldata.vdac->constraints.apply_uV = true;
512 	omap3evm_twldata.vpll2->constraints.apply_uV = true;
513 
514 	omap3_pmic_init("twl4030", &omap3evm_twldata);
515 	omap_register_i2c_bus(2, 400, NULL, 0);
516 	omap_register_i2c_bus(3, 400, NULL, 0);
517 	return 0;
518 }
519 
520 static struct omap_board_config_kernel omap3_evm_config[] __initdata = {
521 };
522 
523 static struct usbhs_omap_board_data usbhs_bdata __initdata = {
524 
525 	.port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
526 	.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
527 	.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
528 
529 	.phy_reset  = true,
530 	/* PHY reset GPIO will be runtime programmed based on EVM version */
531 	.reset_gpio_port[0]  = -EINVAL,
532 	.reset_gpio_port[1]  = -EINVAL,
533 	.reset_gpio_port[2]  = -EINVAL
534 };
535 
536 #ifdef CONFIG_OMAP_MUX
537 static struct omap_board_mux omap35x_board_mux[] __initdata = {
538 	OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP |
539 				OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
540 				OMAP_PIN_OFF_WAKEUPENABLE),
541 	OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
542 				OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
543 				OMAP_PIN_OFF_WAKEUPENABLE),
544 	OMAP3_MUX(SYS_BOOT5, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
545 				OMAP_PIN_OFF_NONE),
546 	OMAP3_MUX(GPMC_WAIT2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
547 				OMAP_PIN_OFF_NONE),
548 #ifdef CONFIG_WL12XX_PLATFORM_DATA
549 	/* WLAN IRQ - GPIO 149 */
550 	OMAP3_MUX(UART1_RTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
551 
552 	/* WLAN POWER ENABLE - GPIO 150 */
553 	OMAP3_MUX(UART1_CTS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
554 
555 	/* MMC2 SDIO pin muxes for WL12xx */
556 	OMAP3_MUX(SDMMC2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
557 	OMAP3_MUX(SDMMC2_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
558 	OMAP3_MUX(SDMMC2_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
559 	OMAP3_MUX(SDMMC2_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
560 	OMAP3_MUX(SDMMC2_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
561 	OMAP3_MUX(SDMMC2_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
562 #endif
563 	{ .reg_offset = OMAP_MUX_TERMINATOR },
564 };
565 
566 static struct omap_board_mux omap36x_board_mux[] __initdata = {
567 	OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP |
568 				OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
569 				OMAP_PIN_OFF_WAKEUPENABLE),
570 	OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
571 				OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
572 				OMAP_PIN_OFF_WAKEUPENABLE),
573 	/* AM/DM37x EVM: DSS data bus muxed with sys_boot */
574 	OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
575 	OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
576 	OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
577 	OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
578 	OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
579 	OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
580 	OMAP3_MUX(SYS_BOOT0, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
581 	OMAP3_MUX(SYS_BOOT1, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
582 	OMAP3_MUX(SYS_BOOT3, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
583 	OMAP3_MUX(SYS_BOOT4, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
584 	OMAP3_MUX(SYS_BOOT5, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
585 	OMAP3_MUX(SYS_BOOT6, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
586 #ifdef CONFIG_WL12XX_PLATFORM_DATA
587 	/* WLAN IRQ - GPIO 149 */
588 	OMAP3_MUX(UART1_RTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
589 
590 	/* WLAN POWER ENABLE - GPIO 150 */
591 	OMAP3_MUX(UART1_CTS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
592 
593 	/* MMC2 SDIO pin muxes for WL12xx */
594 	OMAP3_MUX(SDMMC2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
595 	OMAP3_MUX(SDMMC2_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
596 	OMAP3_MUX(SDMMC2_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
597 	OMAP3_MUX(SDMMC2_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
598 	OMAP3_MUX(SDMMC2_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
599 	OMAP3_MUX(SDMMC2_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
600 #endif
601 
602 	{ .reg_offset = OMAP_MUX_TERMINATOR },
603 };
604 #else
605 #define omap35x_board_mux	NULL
606 #define omap36x_board_mux	NULL
607 #endif
608 
609 static struct omap_musb_board_data musb_board_data = {
610 	.interface_type		= MUSB_INTERFACE_ULPI,
611 	.mode			= MUSB_OTG,
612 	.power			= 100,
613 };
614 
615 static struct gpio omap3_evm_ehci_gpios[] __initdata = {
616 	{ OMAP3_EVM_EHCI_VBUS,	 GPIOF_OUT_INIT_HIGH,  "enable EHCI VBUS" },
617 	{ OMAP3_EVM_EHCI_SELECT, GPIOF_OUT_INIT_LOW,   "select EHCI port" },
618 };
619 
omap3_evm_wl12xx_init(void)620 static void __init omap3_evm_wl12xx_init(void)
621 {
622 #ifdef CONFIG_WL12XX_PLATFORM_DATA
623 	int ret;
624 
625 	/* WL12xx WLAN Init */
626 	ret = wl12xx_set_platform_data(&omap3evm_wlan_data);
627 	if (ret)
628 		pr_err("error setting wl12xx data: %d\n", ret);
629 	ret = platform_device_register(&omap3evm_wlan_regulator);
630 	if (ret)
631 		pr_err("error registering wl12xx device: %d\n", ret);
632 #endif
633 }
634 
omap3_evm_init(void)635 static void __init omap3_evm_init(void)
636 {
637 	omap3_evm_get_revision();
638 
639 	if (cpu_is_omap3630())
640 		omap3_mux_init(omap36x_board_mux, OMAP_PACKAGE_CBB);
641 	else
642 		omap3_mux_init(omap35x_board_mux, OMAP_PACKAGE_CBB);
643 
644 	omap_board_config = omap3_evm_config;
645 	omap_board_config_size = ARRAY_SIZE(omap3_evm_config);
646 
647 	omap3_evm_i2c_init();
648 
649 	omap_display_init(&omap3_evm_dss_data);
650 
651 	omap_serial_init();
652 	omap_sdrc_init(mt46h32m32lf6_sdrc_params, NULL);
653 
654 	/* OMAP3EVM uses ISP1504 phy and so register nop transceiver */
655 	usb_nop_xceiv_register();
656 
657 	if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) {
658 		/* enable EHCI VBUS using GPIO22 */
659 		omap_mux_init_gpio(OMAP3_EVM_EHCI_VBUS, OMAP_PIN_INPUT_PULLUP);
660 		/* Select EHCI port on main board */
661 		omap_mux_init_gpio(OMAP3_EVM_EHCI_SELECT,
662 				   OMAP_PIN_INPUT_PULLUP);
663 		gpio_request_array(omap3_evm_ehci_gpios,
664 				   ARRAY_SIZE(omap3_evm_ehci_gpios));
665 
666 		/* setup EHCI phy reset config */
667 		omap_mux_init_gpio(21, OMAP_PIN_INPUT_PULLUP);
668 		usbhs_bdata.reset_gpio_port[1] = 21;
669 
670 		/* EVM REV >= E can supply 500mA with EXTVBUS programming */
671 		musb_board_data.power = 500;
672 		musb_board_data.extvbus = 1;
673 	} else {
674 		/* setup EHCI phy reset on MDC */
675 		omap_mux_init_gpio(135, OMAP_PIN_OUTPUT);
676 		usbhs_bdata.reset_gpio_port[1] = 135;
677 	}
678 	usb_musb_init(&musb_board_data);
679 	usbhs_init(&usbhs_bdata);
680 	omap_ads7846_init(1, OMAP3_EVM_TS_GPIO, 310, NULL);
681 	omap3evm_init_smsc911x();
682 	omap3_evm_display_init();
683 	omap3_evm_wl12xx_init();
684 }
685 
686 MACHINE_START(OMAP3EVM, "OMAP3 EVM")
687 	/* Maintainer: Syed Mohammed Khasim - Texas Instruments */
688 	.atag_offset	= 0x100,
689 	.reserve	= omap_reserve,
690 	.map_io		= omap3_map_io,
691 	.init_early	= omap35xx_init_early,
692 	.init_irq	= omap3_init_irq,
693 	.handle_irq	= omap3_intc_handle_irq,
694 	.init_machine	= omap3_evm_init,
695 	.timer		= &omap3_timer,
696 	.restart	= omap_prcm_restart,
697 MACHINE_END
698