1 /*
2 * board-devkit8000.c - TimLL Devkit8000
3 *
4 * Copyright (C) 2009 Kim Botherway
5 * Copyright (C) 2010 Thomas Weber
6 *
7 * Modified from mach-omap2/board-omap3beagle.c
8 *
9 * Initial code: Syed Mohammed Khasim
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/platform_device.h>
19 #include <linux/delay.h>
20 #include <linux/err.h>
21 #include <linux/clk.h>
22 #include <linux/io.h>
23 #include <linux/leds.h>
24 #include <linux/gpio.h>
25 #include <linux/input.h>
26 #include <linux/gpio_keys.h>
27
28 #include <linux/mtd/mtd.h>
29 #include <linux/mtd/partitions.h>
30 #include <linux/mtd/nand.h>
31 #include <linux/mmc/host.h>
32
33 #include <linux/regulator/machine.h>
34 #include <linux/i2c/twl.h>
35
36 #include <mach/hardware.h>
37 #include <mach/id.h>
38 #include <asm/mach-types.h>
39 #include <asm/mach/arch.h>
40 #include <asm/mach/map.h>
41 #include <asm/mach/flash.h>
42
43 #include <plat/board.h>
44 #include "common.h"
45 #include <plat/gpmc.h>
46 #include <plat/nand.h>
47 #include <plat/usb.h>
48 #include <video/omapdss.h>
49 #include <video/omap-panel-generic-dpi.h>
50 #include <video/omap-panel-dvi.h>
51
52 #include <plat/mcspi.h>
53 #include <linux/input/matrix_keypad.h>
54 #include <linux/spi/spi.h>
55 #include <linux/dm9000.h>
56 #include <linux/interrupt.h>
57
58 #include "sdram-micron-mt46h32m32lf-6.h"
59
60 #include "mux.h"
61 #include "hsmmc.h"
62 #include "common-board-devices.h"
63
64 #define OMAP_DM9000_GPIO_IRQ 25
65 #define OMAP3_DEVKIT_TS_GPIO 27
66
67 static struct mtd_partition devkit8000_nand_partitions[] = {
68 /* All the partition sizes are listed in terms of NAND block size */
69 {
70 .name = "X-Loader",
71 .offset = 0,
72 .size = 4 * NAND_BLOCK_SIZE,
73 .mask_flags = MTD_WRITEABLE, /* force read-only */
74 },
75 {
76 .name = "U-Boot",
77 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
78 .size = 15 * NAND_BLOCK_SIZE,
79 .mask_flags = MTD_WRITEABLE, /* force read-only */
80 },
81 {
82 .name = "U-Boot Env",
83 .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
84 .size = 1 * NAND_BLOCK_SIZE,
85 },
86 {
87 .name = "Kernel",
88 .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
89 .size = 32 * NAND_BLOCK_SIZE,
90 },
91 {
92 .name = "File System",
93 .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */
94 .size = MTDPART_SIZ_FULL,
95 },
96 };
97
98 static struct omap2_hsmmc_info mmc[] = {
99 {
100 .mmc = 1,
101 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
102 .gpio_wp = 29,
103 },
104 {} /* Terminator */
105 };
106
devkit8000_panel_enable_lcd(struct omap_dss_device * dssdev)107 static int devkit8000_panel_enable_lcd(struct omap_dss_device *dssdev)
108 {
109 if (gpio_is_valid(dssdev->reset_gpio))
110 gpio_set_value_cansleep(dssdev->reset_gpio, 1);
111 return 0;
112 }
113
devkit8000_panel_disable_lcd(struct omap_dss_device * dssdev)114 static void devkit8000_panel_disable_lcd(struct omap_dss_device *dssdev)
115 {
116 if (gpio_is_valid(dssdev->reset_gpio))
117 gpio_set_value_cansleep(dssdev->reset_gpio, 0);
118 }
119
devkit8000_panel_enable_dvi(struct omap_dss_device * dssdev)120 static int devkit8000_panel_enable_dvi(struct omap_dss_device *dssdev)
121 {
122 if (gpio_is_valid(dssdev->reset_gpio))
123 gpio_set_value_cansleep(dssdev->reset_gpio, 1);
124 return 0;
125 }
126
devkit8000_panel_disable_dvi(struct omap_dss_device * dssdev)127 static void devkit8000_panel_disable_dvi(struct omap_dss_device *dssdev)
128 {
129 if (gpio_is_valid(dssdev->reset_gpio))
130 gpio_set_value_cansleep(dssdev->reset_gpio, 0);
131 }
132
133 static struct regulator_consumer_supply devkit8000_vmmc1_supply[] = {
134 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
135 };
136
137 /* ads7846 on SPI */
138 static struct regulator_consumer_supply devkit8000_vio_supply[] = {
139 REGULATOR_SUPPLY("vcc", "spi2.0"),
140 };
141
142 static struct panel_generic_dpi_data lcd_panel = {
143 .name = "innolux_at070tn83",
144 .platform_enable = devkit8000_panel_enable_lcd,
145 .platform_disable = devkit8000_panel_disable_lcd,
146 };
147
148 static struct omap_dss_device devkit8000_lcd_device = {
149 .name = "lcd",
150 .type = OMAP_DISPLAY_TYPE_DPI,
151 .driver_name = "generic_dpi_panel",
152 .data = &lcd_panel,
153 .phy.dpi.data_lines = 24,
154 };
155
156 static struct panel_dvi_platform_data dvi_panel = {
157 .platform_enable = devkit8000_panel_enable_dvi,
158 .platform_disable = devkit8000_panel_disable_dvi,
159 };
160
161 static struct omap_dss_device devkit8000_dvi_device = {
162 .name = "dvi",
163 .type = OMAP_DISPLAY_TYPE_DPI,
164 .driver_name = "dvi",
165 .data = &dvi_panel,
166 .phy.dpi.data_lines = 24,
167 };
168
169 static struct omap_dss_device devkit8000_tv_device = {
170 .name = "tv",
171 .driver_name = "venc",
172 .type = OMAP_DISPLAY_TYPE_VENC,
173 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
174 };
175
176
177 static struct omap_dss_device *devkit8000_dss_devices[] = {
178 &devkit8000_lcd_device,
179 &devkit8000_dvi_device,
180 &devkit8000_tv_device,
181 };
182
183 static struct omap_dss_board_info devkit8000_dss_data = {
184 .num_devices = ARRAY_SIZE(devkit8000_dss_devices),
185 .devices = devkit8000_dss_devices,
186 .default_device = &devkit8000_lcd_device,
187 };
188
189 static uint32_t board_keymap[] = {
190 KEY(0, 0, KEY_1),
191 KEY(1, 0, KEY_2),
192 KEY(2, 0, KEY_3),
193 KEY(0, 1, KEY_4),
194 KEY(1, 1, KEY_5),
195 KEY(2, 1, KEY_6),
196 KEY(3, 1, KEY_F5),
197 KEY(0, 2, KEY_7),
198 KEY(1, 2, KEY_8),
199 KEY(2, 2, KEY_9),
200 KEY(3, 2, KEY_F6),
201 KEY(0, 3, KEY_F7),
202 KEY(1, 3, KEY_0),
203 KEY(2, 3, KEY_F8),
204 PERSISTENT_KEY(4, 5),
205 KEY(4, 4, KEY_VOLUMEUP),
206 KEY(5, 5, KEY_VOLUMEDOWN),
207 0
208 };
209
210 static struct matrix_keymap_data board_map_data = {
211 .keymap = board_keymap,
212 .keymap_size = ARRAY_SIZE(board_keymap),
213 };
214
215 static struct twl4030_keypad_data devkit8000_kp_data = {
216 .keymap_data = &board_map_data,
217 .rows = 6,
218 .cols = 6,
219 .rep = 1,
220 };
221
222 static struct gpio_led gpio_leds[];
223
devkit8000_twl_gpio_setup(struct device * dev,unsigned gpio,unsigned ngpio)224 static int devkit8000_twl_gpio_setup(struct device *dev,
225 unsigned gpio, unsigned ngpio)
226 {
227 int ret;
228
229 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
230 mmc[0].gpio_cd = gpio + 0;
231 omap2_hsmmc_init(mmc);
232
233 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
234 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
235
236 /* TWL4030_GPIO_MAX + 0 is "LCD_PWREN" (out, active high) */
237 devkit8000_lcd_device.reset_gpio = gpio + TWL4030_GPIO_MAX + 0;
238 ret = gpio_request_one(devkit8000_lcd_device.reset_gpio,
239 GPIOF_OUT_INIT_LOW, "LCD_PWREN");
240 if (ret < 0) {
241 devkit8000_lcd_device.reset_gpio = -EINVAL;
242 printk(KERN_ERR "Failed to request GPIO for LCD_PWRN\n");
243 }
244
245 /* gpio + 7 is "DVI_PD" (out, active low) */
246 devkit8000_dvi_device.reset_gpio = gpio + 7;
247 ret = gpio_request_one(devkit8000_dvi_device.reset_gpio,
248 GPIOF_OUT_INIT_LOW, "DVI PowerDown");
249 if (ret < 0) {
250 devkit8000_dvi_device.reset_gpio = -EINVAL;
251 printk(KERN_ERR "Failed to request GPIO for DVI PowerDown\n");
252 }
253
254 return 0;
255 }
256
257 static struct twl4030_gpio_platform_data devkit8000_gpio_data = {
258 .gpio_base = OMAP_MAX_GPIO_LINES,
259 .irq_base = TWL4030_GPIO_IRQ_BASE,
260 .irq_end = TWL4030_GPIO_IRQ_END,
261 .use_leds = true,
262 .pulldowns = BIT(1) | BIT(2) | BIT(6) | BIT(8) | BIT(13)
263 | BIT(15) | BIT(16) | BIT(17),
264 .setup = devkit8000_twl_gpio_setup,
265 };
266
267 static struct regulator_consumer_supply devkit8000_vpll1_supplies[] = {
268 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
269 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"),
270 };
271
272 /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
273 static struct regulator_init_data devkit8000_vmmc1 = {
274 .constraints = {
275 .min_uV = 1850000,
276 .max_uV = 3150000,
277 .valid_modes_mask = REGULATOR_MODE_NORMAL
278 | REGULATOR_MODE_STANDBY,
279 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
280 | REGULATOR_CHANGE_MODE
281 | REGULATOR_CHANGE_STATUS,
282 },
283 .num_consumer_supplies = ARRAY_SIZE(devkit8000_vmmc1_supply),
284 .consumer_supplies = devkit8000_vmmc1_supply,
285 };
286
287 /* VPLL1 for digital video outputs */
288 static struct regulator_init_data devkit8000_vpll1 = {
289 .constraints = {
290 .min_uV = 1800000,
291 .max_uV = 1800000,
292 .valid_modes_mask = REGULATOR_MODE_NORMAL
293 | REGULATOR_MODE_STANDBY,
294 .valid_ops_mask = REGULATOR_CHANGE_MODE
295 | REGULATOR_CHANGE_STATUS,
296 },
297 .num_consumer_supplies = ARRAY_SIZE(devkit8000_vpll1_supplies),
298 .consumer_supplies = devkit8000_vpll1_supplies,
299 };
300
301 /* VAUX4 for ads7846 and nubs */
302 static struct regulator_init_data devkit8000_vio = {
303 .constraints = {
304 .min_uV = 1800000,
305 .max_uV = 1800000,
306 .apply_uV = true,
307 .valid_modes_mask = REGULATOR_MODE_NORMAL
308 | REGULATOR_MODE_STANDBY,
309 .valid_ops_mask = REGULATOR_CHANGE_MODE
310 | REGULATOR_CHANGE_STATUS,
311 },
312 .num_consumer_supplies = ARRAY_SIZE(devkit8000_vio_supply),
313 .consumer_supplies = devkit8000_vio_supply,
314 };
315
316 static struct twl4030_platform_data devkit8000_twldata = {
317 /* platform_data for children goes here */
318 .gpio = &devkit8000_gpio_data,
319 .vmmc1 = &devkit8000_vmmc1,
320 .vpll1 = &devkit8000_vpll1,
321 .vio = &devkit8000_vio,
322 .keypad = &devkit8000_kp_data,
323 };
324
devkit8000_i2c_init(void)325 static int __init devkit8000_i2c_init(void)
326 {
327 omap3_pmic_get_config(&devkit8000_twldata,
328 TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO,
329 TWL_COMMON_REGULATOR_VDAC);
330 omap3_pmic_init("tps65930", &devkit8000_twldata);
331 /* Bus 3 is attached to the DVI port where devices like the pico DLP
332 * projector don't work reliably with 400kHz */
333 omap_register_i2c_bus(3, 400, NULL, 0);
334 return 0;
335 }
336
337 static struct gpio_led gpio_leds[] = {
338 {
339 .name = "led1",
340 .default_trigger = "heartbeat",
341 .gpio = 186,
342 .active_low = true,
343 },
344 {
345 .name = "led2",
346 .default_trigger = "mmc0",
347 .gpio = 163,
348 .active_low = true,
349 },
350 {
351 .name = "ledB",
352 .default_trigger = "none",
353 .gpio = 153,
354 .active_low = true,
355 },
356 {
357 .name = "led3",
358 .default_trigger = "none",
359 .gpio = 164,
360 .active_low = true,
361 },
362 };
363
364 static struct gpio_led_platform_data gpio_led_info = {
365 .leds = gpio_leds,
366 .num_leds = ARRAY_SIZE(gpio_leds),
367 };
368
369 static struct platform_device leds_gpio = {
370 .name = "leds-gpio",
371 .id = -1,
372 .dev = {
373 .platform_data = &gpio_led_info,
374 },
375 };
376
377 static struct gpio_keys_button gpio_buttons[] = {
378 {
379 .code = BTN_EXTRA,
380 .gpio = 26,
381 .desc = "user",
382 .wakeup = 1,
383 },
384 };
385
386 static struct gpio_keys_platform_data gpio_key_info = {
387 .buttons = gpio_buttons,
388 .nbuttons = ARRAY_SIZE(gpio_buttons),
389 };
390
391 static struct platform_device keys_gpio = {
392 .name = "gpio-keys",
393 .id = -1,
394 .dev = {
395 .platform_data = &gpio_key_info,
396 },
397 };
398
399 #define OMAP_DM9000_BASE 0x2c000000
400
401 static struct resource omap_dm9000_resources[] = {
402 [0] = {
403 .start = OMAP_DM9000_BASE,
404 .end = (OMAP_DM9000_BASE + 0x4 - 1),
405 .flags = IORESOURCE_MEM,
406 },
407 [1] = {
408 .start = (OMAP_DM9000_BASE + 0x400),
409 .end = (OMAP_DM9000_BASE + 0x400 + 0x4 - 1),
410 .flags = IORESOURCE_MEM,
411 },
412 [2] = {
413 .start = OMAP_GPIO_IRQ(OMAP_DM9000_GPIO_IRQ),
414 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
415 },
416 };
417
418 static struct dm9000_plat_data omap_dm9000_platdata = {
419 .flags = DM9000_PLATF_16BITONLY,
420 };
421
422 static struct platform_device omap_dm9000_dev = {
423 .name = "dm9000",
424 .id = -1,
425 .num_resources = ARRAY_SIZE(omap_dm9000_resources),
426 .resource = omap_dm9000_resources,
427 .dev = {
428 .platform_data = &omap_dm9000_platdata,
429 },
430 };
431
omap_dm9000_init(void)432 static void __init omap_dm9000_init(void)
433 {
434 unsigned char *eth_addr = omap_dm9000_platdata.dev_addr;
435 struct omap_die_id odi;
436 int ret;
437
438 ret = gpio_request_one(OMAP_DM9000_GPIO_IRQ, GPIOF_IN, "dm9000 irq");
439 if (ret < 0) {
440 printk(KERN_ERR "Failed to request GPIO%d for dm9000 IRQ\n",
441 OMAP_DM9000_GPIO_IRQ);
442 return;
443 }
444
445 /* init the mac address using DIE id */
446 omap_get_die_id(&odi);
447
448 eth_addr[0] = 0x02; /* locally administered */
449 eth_addr[1] = odi.id_1 & 0xff;
450 eth_addr[2] = (odi.id_0 & 0xff000000) >> 24;
451 eth_addr[3] = (odi.id_0 & 0x00ff0000) >> 16;
452 eth_addr[4] = (odi.id_0 & 0x0000ff00) >> 8;
453 eth_addr[5] = (odi.id_0 & 0x000000ff);
454 }
455
456 static struct platform_device *devkit8000_devices[] __initdata = {
457 &leds_gpio,
458 &keys_gpio,
459 &omap_dm9000_dev,
460 };
461
462 static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
463
464 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
465 .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
466 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
467
468 .phy_reset = true,
469 .reset_gpio_port[0] = -EINVAL,
470 .reset_gpio_port[1] = -EINVAL,
471 .reset_gpio_port[2] = -EINVAL
472 };
473
474 #ifdef CONFIG_OMAP_MUX
475 static struct omap_board_mux board_mux[] __initdata = {
476 /* nCS and IRQ for Devkit8000 ethernet */
477 OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE0),
478 OMAP3_MUX(ETK_D11, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
479
480 /* McSPI 2*/
481 OMAP3_MUX(MCSPI2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
482 OMAP3_MUX(MCSPI2_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
483 OMAP3_MUX(MCSPI2_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
484 OMAP3_MUX(MCSPI2_CS0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
485 OMAP3_MUX(MCSPI2_CS1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
486
487 /* PENDOWN GPIO */
488 OMAP3_MUX(ETK_D13, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
489
490 /* mUSB */
491 OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
492 OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
493 OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
494 OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
495 OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
496 OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
497 OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
498 OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
499 OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
500 OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
501 OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
502 OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
503
504 /* USB 1 */
505 OMAP3_MUX(ETK_CTL, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
506 OMAP3_MUX(ETK_CLK, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT),
507 OMAP3_MUX(ETK_D8, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
508 OMAP3_MUX(ETK_D9, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
509 OMAP3_MUX(ETK_D0, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
510 OMAP3_MUX(ETK_D1, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
511 OMAP3_MUX(ETK_D2, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
512 OMAP3_MUX(ETK_D3, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
513 OMAP3_MUX(ETK_D4, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
514 OMAP3_MUX(ETK_D5, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
515 OMAP3_MUX(ETK_D6, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
516 OMAP3_MUX(ETK_D7, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
517
518 /* MMC 1 */
519 OMAP3_MUX(SDMMC1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
520 OMAP3_MUX(SDMMC1_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
521 OMAP3_MUX(SDMMC1_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
522 OMAP3_MUX(SDMMC1_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
523 OMAP3_MUX(SDMMC1_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
524 OMAP3_MUX(SDMMC1_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
525 OMAP3_MUX(SDMMC1_DAT4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
526 OMAP3_MUX(SDMMC1_DAT5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
527 OMAP3_MUX(SDMMC1_DAT6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
528 OMAP3_MUX(SDMMC1_DAT7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
529
530 /* McBSP 2 */
531 OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
532 OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
533 OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
534 OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
535
536 /* I2C 1 */
537 OMAP3_MUX(I2C1_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
538 OMAP3_MUX(I2C1_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
539
540 /* I2C 2 */
541 OMAP3_MUX(I2C2_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
542 OMAP3_MUX(I2C2_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
543
544 /* I2C 3 */
545 OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
546 OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
547
548 /* I2C 4 */
549 OMAP3_MUX(I2C4_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
550 OMAP3_MUX(I2C4_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
551
552 /* serial ports */
553 OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
554 OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
555 OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
556 OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
557
558 /* DSS */
559 OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
560 OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
561 OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
562 OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
563 OMAP3_MUX(DSS_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
564 OMAP3_MUX(DSS_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
565 OMAP3_MUX(DSS_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
566 OMAP3_MUX(DSS_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
567 OMAP3_MUX(DSS_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
568 OMAP3_MUX(DSS_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
569 OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
570 OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
571 OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
572 OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
573 OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
574 OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
575 OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
576 OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
577 OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
578 OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
579 OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
580 OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
581 OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
582 OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
583 OMAP3_MUX(DSS_DATA20, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
584 OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
585 OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
586 OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
587
588 /* expansion port */
589 /* McSPI 1 */
590 OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
591 OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
592 OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
593 OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
594 OMAP3_MUX(MCSPI1_CS3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
595
596 /* HDQ */
597 OMAP3_MUX(HDQ_SIO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
598
599 /* McSPI4 */
600 OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
601 OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
602 OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
603 OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP),
604
605 /* MMC 2 */
606 OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
607 OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
608 OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
609 OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
610
611 /* I2C3 */
612 OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
613 OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
614
615 OMAP3_MUX(MCBSP1_CLKX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
616 OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
617 OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
618
619 OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
620 OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
621
622 /* TPS IRQ */
623 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \
624 OMAP_PIN_INPUT_PULLUP),
625
626 { .reg_offset = OMAP_MUX_TERMINATOR },
627 };
628 #endif
629
devkit8000_init(void)630 static void __init devkit8000_init(void)
631 {
632 omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
633 omap_serial_init();
634 omap_sdrc_init(mt46h32m32lf6_sdrc_params,
635 mt46h32m32lf6_sdrc_params);
636
637 omap_dm9000_init();
638
639 devkit8000_i2c_init();
640 platform_add_devices(devkit8000_devices,
641 ARRAY_SIZE(devkit8000_devices));
642
643 omap_display_init(&devkit8000_dss_data);
644
645 omap_ads7846_init(2, OMAP3_DEVKIT_TS_GPIO, 0, NULL);
646
647 usb_musb_init(NULL);
648 usbhs_init(&usbhs_bdata);
649 omap_nand_flash_init(NAND_BUSWIDTH_16, devkit8000_nand_partitions,
650 ARRAY_SIZE(devkit8000_nand_partitions));
651
652 /* Ensure SDRC pins are mux'd for self-refresh */
653 omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
654 omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
655 }
656
657 MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
658 .atag_offset = 0x100,
659 .reserve = omap_reserve,
660 .map_io = omap3_map_io,
661 .init_early = omap35xx_init_early,
662 .init_irq = omap3_init_irq,
663 .handle_irq = omap3_intc_handle_irq,
664 .init_machine = devkit8000_init,
665 .timer = &omap3_secure_timer,
666 .restart = omap_prcm_restart,
667 MACHINE_END
668