1 /*
2 * CompuLab CM-T35/CM-T3730 modules support
3 *
4 * Copyright (C) 2009-2011 CompuLab, Ltd.
5 * Authors: Mike Rapoport <mike@compulab.co.il>
6 * Igor Grinberg <grinberg@compulab.co.il>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 */
18
19 #include <linux/kernel.h>
20 #include <linux/init.h>
21 #include <linux/platform_device.h>
22 #include <linux/input.h>
23 #include <linux/input/matrix_keypad.h>
24 #include <linux/delay.h>
25 #include <linux/gpio.h>
26
27 #include <linux/i2c/at24.h>
28 #include <linux/i2c/twl.h>
29 #include <linux/regulator/machine.h>
30 #include <linux/mmc/host.h>
31
32 #include <linux/spi/spi.h>
33 #include <linux/spi/tdo24m.h>
34
35 #include <asm/mach-types.h>
36 #include <asm/mach/arch.h>
37 #include <asm/mach/map.h>
38
39 #include <plat/board.h>
40 #include "common.h"
41 #include <plat/nand.h>
42 #include <plat/gpmc.h>
43 #include <plat/usb.h>
44 #include <video/omapdss.h>
45 #include <video/omap-panel-generic-dpi.h>
46 #include <video/omap-panel-dvi.h>
47 #include <plat/mcspi.h>
48
49 #include <mach/hardware.h>
50
51 #include "mux.h"
52 #include "sdram-micron-mt46h32m32lf-6.h"
53 #include "hsmmc.h"
54 #include "common-board-devices.h"
55
56 #define CM_T35_GPIO_PENDOWN 57
57 #define SB_T35_USB_HUB_RESET_GPIO 167
58
59 #define CM_T35_SMSC911X_CS 5
60 #define CM_T35_SMSC911X_GPIO 163
61 #define SB_T35_SMSC911X_CS 4
62 #define SB_T35_SMSC911X_GPIO 65
63
64 #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
65 #include <linux/smsc911x.h>
66 #include <plat/gpmc-smsc911x.h>
67
68 static struct omap_smsc911x_platform_data cm_t35_smsc911x_cfg = {
69 .id = 0,
70 .cs = CM_T35_SMSC911X_CS,
71 .gpio_irq = CM_T35_SMSC911X_GPIO,
72 .gpio_reset = -EINVAL,
73 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
74 };
75
76 static struct omap_smsc911x_platform_data sb_t35_smsc911x_cfg = {
77 .id = 1,
78 .cs = SB_T35_SMSC911X_CS,
79 .gpio_irq = SB_T35_SMSC911X_GPIO,
80 .gpio_reset = -EINVAL,
81 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
82 };
83
cm_t35_init_ethernet(void)84 static void __init cm_t35_init_ethernet(void)
85 {
86 gpmc_smsc911x_init(&cm_t35_smsc911x_cfg);
87 gpmc_smsc911x_init(&sb_t35_smsc911x_cfg);
88 }
89 #else
cm_t35_init_ethernet(void)90 static inline void __init cm_t35_init_ethernet(void) { return; }
91 #endif
92
93 #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
94 #include <linux/leds.h>
95
96 static struct gpio_led cm_t35_leds[] = {
97 [0] = {
98 .gpio = 186,
99 .name = "cm-t35:green",
100 .default_trigger = "heartbeat",
101 .active_low = 0,
102 },
103 };
104
105 static struct gpio_led_platform_data cm_t35_led_pdata = {
106 .num_leds = ARRAY_SIZE(cm_t35_leds),
107 .leds = cm_t35_leds,
108 };
109
110 static struct platform_device cm_t35_led_device = {
111 .name = "leds-gpio",
112 .id = -1,
113 .dev = {
114 .platform_data = &cm_t35_led_pdata,
115 },
116 };
117
cm_t35_init_led(void)118 static void __init cm_t35_init_led(void)
119 {
120 platform_device_register(&cm_t35_led_device);
121 }
122 #else
cm_t35_init_led(void)123 static inline void cm_t35_init_led(void) {}
124 #endif
125
126 #if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
127 #include <linux/mtd/mtd.h>
128 #include <linux/mtd/nand.h>
129 #include <linux/mtd/partitions.h>
130
131 static struct mtd_partition cm_t35_nand_partitions[] = {
132 {
133 .name = "xloader",
134 .offset = 0, /* Offset = 0x00000 */
135 .size = 4 * NAND_BLOCK_SIZE,
136 .mask_flags = MTD_WRITEABLE
137 },
138 {
139 .name = "uboot",
140 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
141 .size = 15 * NAND_BLOCK_SIZE,
142 },
143 {
144 .name = "uboot environment",
145 .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
146 .size = 2 * NAND_BLOCK_SIZE,
147 },
148 {
149 .name = "linux",
150 .offset = MTDPART_OFS_APPEND, /* Offset = 0x2A0000 */
151 .size = 32 * NAND_BLOCK_SIZE,
152 },
153 {
154 .name = "rootfs",
155 .offset = MTDPART_OFS_APPEND, /* Offset = 0x6A0000 */
156 .size = MTDPART_SIZ_FULL,
157 },
158 };
159
160 static struct omap_nand_platform_data cm_t35_nand_data = {
161 .parts = cm_t35_nand_partitions,
162 .nr_parts = ARRAY_SIZE(cm_t35_nand_partitions),
163 .cs = 0,
164 };
165
cm_t35_init_nand(void)166 static void __init cm_t35_init_nand(void)
167 {
168 if (gpmc_nand_init(&cm_t35_nand_data) < 0)
169 pr_err("CM-T35: Unable to register NAND device\n");
170 }
171 #else
cm_t35_init_nand(void)172 static inline void cm_t35_init_nand(void) {}
173 #endif
174
175 #define CM_T35_LCD_EN_GPIO 157
176 #define CM_T35_LCD_BL_GPIO 58
177 #define CM_T35_DVI_EN_GPIO 54
178
179 static int lcd_enabled;
180 static int dvi_enabled;
181
cm_t35_panel_enable_lcd(struct omap_dss_device * dssdev)182 static int cm_t35_panel_enable_lcd(struct omap_dss_device *dssdev)
183 {
184 if (dvi_enabled) {
185 printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
186 return -EINVAL;
187 }
188
189 gpio_set_value(CM_T35_LCD_EN_GPIO, 1);
190 gpio_set_value(CM_T35_LCD_BL_GPIO, 1);
191
192 lcd_enabled = 1;
193
194 return 0;
195 }
196
cm_t35_panel_disable_lcd(struct omap_dss_device * dssdev)197 static void cm_t35_panel_disable_lcd(struct omap_dss_device *dssdev)
198 {
199 lcd_enabled = 0;
200
201 gpio_set_value(CM_T35_LCD_BL_GPIO, 0);
202 gpio_set_value(CM_T35_LCD_EN_GPIO, 0);
203 }
204
cm_t35_panel_enable_dvi(struct omap_dss_device * dssdev)205 static int cm_t35_panel_enable_dvi(struct omap_dss_device *dssdev)
206 {
207 if (lcd_enabled) {
208 printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
209 return -EINVAL;
210 }
211
212 gpio_set_value(CM_T35_DVI_EN_GPIO, 0);
213 dvi_enabled = 1;
214
215 return 0;
216 }
217
cm_t35_panel_disable_dvi(struct omap_dss_device * dssdev)218 static void cm_t35_panel_disable_dvi(struct omap_dss_device *dssdev)
219 {
220 gpio_set_value(CM_T35_DVI_EN_GPIO, 1);
221 dvi_enabled = 0;
222 }
223
cm_t35_panel_enable_tv(struct omap_dss_device * dssdev)224 static int cm_t35_panel_enable_tv(struct omap_dss_device *dssdev)
225 {
226 return 0;
227 }
228
cm_t35_panel_disable_tv(struct omap_dss_device * dssdev)229 static void cm_t35_panel_disable_tv(struct omap_dss_device *dssdev)
230 {
231 }
232
233 static struct panel_generic_dpi_data lcd_panel = {
234 .name = "toppoly_tdo35s",
235 .platform_enable = cm_t35_panel_enable_lcd,
236 .platform_disable = cm_t35_panel_disable_lcd,
237 };
238
239 static struct omap_dss_device cm_t35_lcd_device = {
240 .name = "lcd",
241 .type = OMAP_DISPLAY_TYPE_DPI,
242 .driver_name = "generic_dpi_panel",
243 .data = &lcd_panel,
244 .phy.dpi.data_lines = 18,
245 };
246
247 static struct panel_dvi_platform_data dvi_panel = {
248 .platform_enable = cm_t35_panel_enable_dvi,
249 .platform_disable = cm_t35_panel_disable_dvi,
250 };
251
252 static struct omap_dss_device cm_t35_dvi_device = {
253 .name = "dvi",
254 .type = OMAP_DISPLAY_TYPE_DPI,
255 .driver_name = "dvi",
256 .data = &dvi_panel,
257 .phy.dpi.data_lines = 24,
258 };
259
260 static struct omap_dss_device cm_t35_tv_device = {
261 .name = "tv",
262 .driver_name = "venc",
263 .type = OMAP_DISPLAY_TYPE_VENC,
264 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
265 .platform_enable = cm_t35_panel_enable_tv,
266 .platform_disable = cm_t35_panel_disable_tv,
267 };
268
269 static struct omap_dss_device *cm_t35_dss_devices[] = {
270 &cm_t35_lcd_device,
271 &cm_t35_dvi_device,
272 &cm_t35_tv_device,
273 };
274
275 static struct omap_dss_board_info cm_t35_dss_data = {
276 .num_devices = ARRAY_SIZE(cm_t35_dss_devices),
277 .devices = cm_t35_dss_devices,
278 .default_device = &cm_t35_dvi_device,
279 };
280
281 static struct omap2_mcspi_device_config tdo24m_mcspi_config = {
282 .turbo_mode = 0,
283 .single_channel = 1, /* 0: slave, 1: master */
284 };
285
286 static struct tdo24m_platform_data tdo24m_config = {
287 .model = TDO35S,
288 };
289
290 static struct spi_board_info cm_t35_lcd_spi_board_info[] __initdata = {
291 {
292 .modalias = "tdo24m",
293 .bus_num = 4,
294 .chip_select = 0,
295 .max_speed_hz = 1000000,
296 .controller_data = &tdo24m_mcspi_config,
297 .platform_data = &tdo24m_config,
298 },
299 };
300
301 static struct gpio cm_t35_dss_gpios[] __initdata = {
302 { CM_T35_LCD_EN_GPIO, GPIOF_OUT_INIT_LOW, "lcd enable" },
303 { CM_T35_LCD_BL_GPIO, GPIOF_OUT_INIT_LOW, "lcd bl enable" },
304 { CM_T35_DVI_EN_GPIO, GPIOF_OUT_INIT_HIGH, "dvi enable" },
305 };
306
cm_t35_init_display(void)307 static void __init cm_t35_init_display(void)
308 {
309 int err;
310
311 spi_register_board_info(cm_t35_lcd_spi_board_info,
312 ARRAY_SIZE(cm_t35_lcd_spi_board_info));
313
314 err = gpio_request_array(cm_t35_dss_gpios,
315 ARRAY_SIZE(cm_t35_dss_gpios));
316 if (err) {
317 pr_err("CM-T35: failed to request DSS control GPIOs\n");
318 return;
319 }
320
321 gpio_export(CM_T35_LCD_EN_GPIO, 0);
322 gpio_export(CM_T35_LCD_BL_GPIO, 0);
323 gpio_export(CM_T35_DVI_EN_GPIO, 0);
324
325 msleep(50);
326 gpio_set_value(CM_T35_LCD_EN_GPIO, 1);
327
328 err = omap_display_init(&cm_t35_dss_data);
329 if (err) {
330 pr_err("CM-T35: failed to register DSS device\n");
331 gpio_free_array(cm_t35_dss_gpios, ARRAY_SIZE(cm_t35_dss_gpios));
332 }
333 }
334
335 static struct regulator_consumer_supply cm_t35_vmmc1_supply[] = {
336 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
337 };
338
339 static struct regulator_consumer_supply cm_t35_vsim_supply[] = {
340 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
341 };
342
343 static struct regulator_consumer_supply cm_t35_vio_supplies[] = {
344 REGULATOR_SUPPLY("vcc", "spi1.0"),
345 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
346 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
347 };
348
349 /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
350 static struct regulator_init_data cm_t35_vmmc1 = {
351 .constraints = {
352 .min_uV = 1850000,
353 .max_uV = 3150000,
354 .valid_modes_mask = REGULATOR_MODE_NORMAL
355 | REGULATOR_MODE_STANDBY,
356 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
357 | REGULATOR_CHANGE_MODE
358 | REGULATOR_CHANGE_STATUS,
359 },
360 .num_consumer_supplies = ARRAY_SIZE(cm_t35_vmmc1_supply),
361 .consumer_supplies = cm_t35_vmmc1_supply,
362 };
363
364 /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
365 static struct regulator_init_data cm_t35_vsim = {
366 .constraints = {
367 .min_uV = 1800000,
368 .max_uV = 3000000,
369 .valid_modes_mask = REGULATOR_MODE_NORMAL
370 | REGULATOR_MODE_STANDBY,
371 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
372 | REGULATOR_CHANGE_MODE
373 | REGULATOR_CHANGE_STATUS,
374 },
375 .num_consumer_supplies = ARRAY_SIZE(cm_t35_vsim_supply),
376 .consumer_supplies = cm_t35_vsim_supply,
377 };
378
379 static struct regulator_init_data cm_t35_vio = {
380 .constraints = {
381 .min_uV = 1800000,
382 .max_uV = 1800000,
383 .apply_uV = true,
384 .valid_modes_mask = REGULATOR_MODE_NORMAL
385 | REGULATOR_MODE_STANDBY,
386 .valid_ops_mask = REGULATOR_CHANGE_MODE,
387 },
388 .num_consumer_supplies = ARRAY_SIZE(cm_t35_vio_supplies),
389 .consumer_supplies = cm_t35_vio_supplies,
390 };
391
392 static uint32_t cm_t35_keymap[] = {
393 KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT),
394 KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN),
395 KEY(2, 0, KEY_RIGHT), KEY(2, 1, KEY_C), KEY(2, 2, KEY_D),
396 };
397
398 static struct matrix_keymap_data cm_t35_keymap_data = {
399 .keymap = cm_t35_keymap,
400 .keymap_size = ARRAY_SIZE(cm_t35_keymap),
401 };
402
403 static struct twl4030_keypad_data cm_t35_kp_data = {
404 .keymap_data = &cm_t35_keymap_data,
405 .rows = 3,
406 .cols = 3,
407 .rep = 1,
408 };
409
410 static struct omap2_hsmmc_info mmc[] = {
411 {
412 .mmc = 1,
413 .caps = MMC_CAP_4_BIT_DATA,
414 .gpio_cd = -EINVAL,
415 .gpio_wp = -EINVAL,
416
417 },
418 {
419 .mmc = 2,
420 .caps = MMC_CAP_4_BIT_DATA,
421 .transceiver = 1,
422 .gpio_cd = -EINVAL,
423 .gpio_wp = -EINVAL,
424 .ocr_mask = 0x00100000, /* 3.3V */
425 },
426 {} /* Terminator */
427 };
428
429 static struct usbhs_omap_board_data usbhs_bdata __initdata = {
430 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
431 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
432 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
433
434 .phy_reset = true,
435 .reset_gpio_port[0] = OMAP_MAX_GPIO_LINES + 6,
436 .reset_gpio_port[1] = OMAP_MAX_GPIO_LINES + 7,
437 .reset_gpio_port[2] = -EINVAL
438 };
439
cm_t35_init_usbh(void)440 static void __init cm_t35_init_usbh(void)
441 {
442 int err;
443
444 err = gpio_request_one(SB_T35_USB_HUB_RESET_GPIO,
445 GPIOF_OUT_INIT_LOW, "usb hub rst");
446 if (err) {
447 pr_err("SB-T35: usb hub rst gpio request failed: %d\n", err);
448 } else {
449 udelay(10);
450 gpio_set_value(SB_T35_USB_HUB_RESET_GPIO, 1);
451 msleep(1);
452 }
453
454 usbhs_init(&usbhs_bdata);
455 }
456
cm_t35_twl_gpio_setup(struct device * dev,unsigned gpio,unsigned ngpio)457 static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio,
458 unsigned ngpio)
459 {
460 int wlan_rst = gpio + 2;
461
462 if (gpio_request_one(wlan_rst, GPIOF_OUT_INIT_HIGH, "WLAN RST") == 0) {
463 gpio_export(wlan_rst, 0);
464 udelay(10);
465 gpio_set_value_cansleep(wlan_rst, 0);
466 udelay(10);
467 gpio_set_value_cansleep(wlan_rst, 1);
468 } else {
469 pr_err("CM-T35: could not obtain gpio for WiFi reset\n");
470 }
471
472 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
473 mmc[0].gpio_cd = gpio + 0;
474 omap2_hsmmc_init(mmc);
475
476 return 0;
477 }
478
479 static struct twl4030_gpio_platform_data cm_t35_gpio_data = {
480 .gpio_base = OMAP_MAX_GPIO_LINES,
481 .irq_base = TWL4030_GPIO_IRQ_BASE,
482 .irq_end = TWL4030_GPIO_IRQ_END,
483 .setup = cm_t35_twl_gpio_setup,
484 };
485
486 static struct twl4030_platform_data cm_t35_twldata = {
487 /* platform_data for children goes here */
488 .keypad = &cm_t35_kp_data,
489 .gpio = &cm_t35_gpio_data,
490 .vmmc1 = &cm_t35_vmmc1,
491 .vsim = &cm_t35_vsim,
492 .vio = &cm_t35_vio,
493 };
494
cm_t35_init_i2c(void)495 static void __init cm_t35_init_i2c(void)
496 {
497 omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB,
498 TWL_COMMON_REGULATOR_VDAC |
499 TWL_COMMON_PDATA_AUDIO);
500
501 omap3_pmic_init("tps65930", &cm_t35_twldata);
502 }
503
504 #ifdef CONFIG_OMAP_MUX
505 static struct omap_board_mux board_mux[] __initdata = {
506 /* nCS and IRQ for CM-T35 ethernet */
507 OMAP3_MUX(GPMC_NCS5, OMAP_MUX_MODE0),
508 OMAP3_MUX(UART3_CTS_RCTX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
509
510 /* nCS and IRQ for SB-T35 ethernet */
511 OMAP3_MUX(GPMC_NCS4, OMAP_MUX_MODE0),
512 OMAP3_MUX(GPMC_WAIT3, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
513
514 /* PENDOWN GPIO */
515 OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
516
517 /* mUSB */
518 OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
519 OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
520 OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
521 OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
522 OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
523 OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
524 OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
525 OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
526 OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
527 OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
528 OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
529 OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
530
531 /* MMC 2 */
532 OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
533 OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
534 OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
535 OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
536
537 /* McSPI 1 */
538 OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
539 OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
540 OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
541 OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
542
543 /* McSPI 4 */
544 OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
545 OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
546 OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
547 OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP),
548
549 /* McBSP 2 */
550 OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
551 OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
552 OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
553 OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
554
555 /* serial ports */
556 OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
557 OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
558 OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
559 OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
560
561 /* common DSS */
562 OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
563 OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
564 OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
565 OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
566 OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
567 OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
568 OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
569 OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
570 OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
571 OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
572 OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
573 OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
574 OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
575 OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
576 OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
577 OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
578
579 /* display controls */
580 OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
581 OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
582 OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
583
584 /* TPS IRQ */
585 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \
586 OMAP_PIN_INPUT_PULLUP),
587
588 { .reg_offset = OMAP_MUX_TERMINATOR },
589 };
590
cm_t3x_common_dss_mux_init(int mux_mode)591 static void __init cm_t3x_common_dss_mux_init(int mux_mode)
592 {
593 omap_mux_init_signal("dss_data18", mux_mode);
594 omap_mux_init_signal("dss_data19", mux_mode);
595 omap_mux_init_signal("dss_data20", mux_mode);
596 omap_mux_init_signal("dss_data21", mux_mode);
597 omap_mux_init_signal("dss_data22", mux_mode);
598 omap_mux_init_signal("dss_data23", mux_mode);
599 }
600
cm_t35_init_mux(void)601 static void __init cm_t35_init_mux(void)
602 {
603 int mux_mode = OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT;
604
605 omap_mux_init_signal("dss_data0.dss_data0", mux_mode);
606 omap_mux_init_signal("dss_data1.dss_data1", mux_mode);
607 omap_mux_init_signal("dss_data2.dss_data2", mux_mode);
608 omap_mux_init_signal("dss_data3.dss_data3", mux_mode);
609 omap_mux_init_signal("dss_data4.dss_data4", mux_mode);
610 omap_mux_init_signal("dss_data5.dss_data5", mux_mode);
611 cm_t3x_common_dss_mux_init(mux_mode);
612 }
613
cm_t3730_init_mux(void)614 static void __init cm_t3730_init_mux(void)
615 {
616 int mux_mode = OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT;
617
618 omap_mux_init_signal("sys_boot0", mux_mode);
619 omap_mux_init_signal("sys_boot1", mux_mode);
620 omap_mux_init_signal("sys_boot3", mux_mode);
621 omap_mux_init_signal("sys_boot4", mux_mode);
622 omap_mux_init_signal("sys_boot5", mux_mode);
623 omap_mux_init_signal("sys_boot6", mux_mode);
624 cm_t3x_common_dss_mux_init(mux_mode);
625 }
626 #else
cm_t35_init_mux(void)627 static inline void cm_t35_init_mux(void) {}
cm_t3730_init_mux(void)628 static inline void cm_t3730_init_mux(void) {}
629 #endif
630
631 static struct omap_board_config_kernel cm_t35_config[] __initdata = {
632 };
633
cm_t3x_common_init(void)634 static void __init cm_t3x_common_init(void)
635 {
636 omap_board_config = cm_t35_config;
637 omap_board_config_size = ARRAY_SIZE(cm_t35_config);
638 omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
639 omap_serial_init();
640 omap_sdrc_init(mt46h32m32lf6_sdrc_params,
641 mt46h32m32lf6_sdrc_params);
642 cm_t35_init_i2c();
643 omap_ads7846_init(1, CM_T35_GPIO_PENDOWN, 0, NULL);
644 cm_t35_init_ethernet();
645 cm_t35_init_led();
646 cm_t35_init_display();
647
648 usb_musb_init(NULL);
649 cm_t35_init_usbh();
650 }
651
cm_t35_init(void)652 static void __init cm_t35_init(void)
653 {
654 cm_t3x_common_init();
655 cm_t35_init_mux();
656 cm_t35_init_nand();
657 }
658
cm_t3730_init(void)659 static void __init cm_t3730_init(void)
660 {
661 cm_t3x_common_init();
662 cm_t3730_init_mux();
663 }
664
665 MACHINE_START(CM_T35, "Compulab CM-T35")
666 .atag_offset = 0x100,
667 .reserve = omap_reserve,
668 .map_io = omap3_map_io,
669 .init_early = omap35xx_init_early,
670 .init_irq = omap3_init_irq,
671 .handle_irq = omap3_intc_handle_irq,
672 .init_machine = cm_t35_init,
673 .timer = &omap3_timer,
674 .restart = omap_prcm_restart,
675 MACHINE_END
676
677 MACHINE_START(CM_T3730, "Compulab CM-T3730")
678 .atag_offset = 0x100,
679 .reserve = omap_reserve,
680 .map_io = omap3_map_io,
681 .init_early = omap3630_init_early,
682 .init_irq = omap3_init_irq,
683 .handle_irq = omap3_intc_handle_irq,
684 .init_machine = cm_t3730_init,
685 .timer = &omap3_timer,
686 .restart = omap_prcm_restart,
687 MACHINE_END
688