1 /*
2 * linux/arch/arm/mach-omap1/board-h2.c
3 *
4 * Board specific inits for OMAP-1610 H2
5 *
6 * Copyright (C) 2001 RidgeRun, Inc.
7 * Author: Greg Lonnon <glonnon@ridgerun.com>
8 *
9 * Copyright (C) 2002 MontaVista Software, Inc.
10 *
11 * Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6
12 * Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com>
13 *
14 * H2 specific changes and cleanup
15 * Copyright (C) 2004 Nokia Corporation by Imre Deak <imre.deak@nokia.com>
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
20 */
21 #include <linux/gpio.h>
22 #include <linux/kernel.h>
23 #include <linux/platform_device.h>
24 #include <linux/delay.h>
25 #include <linux/i2c.h>
26 #include <linux/mtd/mtd.h>
27 #include <linux/mtd/nand.h>
28 #include <linux/mtd/partitions.h>
29 #include <linux/mtd/physmap.h>
30 #include <linux/input.h>
31 #include <linux/i2c/tps65010.h>
32 #include <linux/smc91x.h>
33
34 #include <mach/hardware.h>
35
36 #include <asm/mach-types.h>
37 #include <asm/mach/arch.h>
38 #include <asm/mach/map.h>
39
40 #include <plat/mux.h>
41 #include <plat/dma.h>
42 #include <plat/tc.h>
43 #include <plat/irda.h>
44 #include <plat/usb.h>
45 #include <plat/keypad.h>
46 #include "common.h"
47 #include <plat/flash.h>
48
49 #include "board-h2.h"
50
51 /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
52 #define OMAP1610_ETHR_START 0x04000300
53
54 static const unsigned int h2_keymap[] = {
55 KEY(0, 0, KEY_LEFT),
56 KEY(1, 0, KEY_RIGHT),
57 KEY(2, 0, KEY_3),
58 KEY(3, 0, KEY_F10),
59 KEY(4, 0, KEY_F5),
60 KEY(5, 0, KEY_9),
61 KEY(0, 1, KEY_DOWN),
62 KEY(1, 1, KEY_UP),
63 KEY(2, 1, KEY_2),
64 KEY(3, 1, KEY_F9),
65 KEY(4, 1, KEY_F7),
66 KEY(5, 1, KEY_0),
67 KEY(0, 2, KEY_ENTER),
68 KEY(1, 2, KEY_6),
69 KEY(2, 2, KEY_1),
70 KEY(3, 2, KEY_F2),
71 KEY(4, 2, KEY_F6),
72 KEY(5, 2, KEY_HOME),
73 KEY(0, 3, KEY_8),
74 KEY(1, 3, KEY_5),
75 KEY(2, 3, KEY_F12),
76 KEY(3, 3, KEY_F3),
77 KEY(4, 3, KEY_F8),
78 KEY(5, 3, KEY_END),
79 KEY(0, 4, KEY_7),
80 KEY(1, 4, KEY_4),
81 KEY(2, 4, KEY_F11),
82 KEY(3, 4, KEY_F1),
83 KEY(4, 4, KEY_F4),
84 KEY(5, 4, KEY_ESC),
85 KEY(0, 5, KEY_F13),
86 KEY(1, 5, KEY_F14),
87 KEY(2, 5, KEY_F15),
88 KEY(3, 5, KEY_F16),
89 KEY(4, 5, KEY_SLEEP),
90 };
91
92 static struct mtd_partition h2_nor_partitions[] = {
93 /* bootloader (U-Boot, etc) in first sector */
94 {
95 .name = "bootloader",
96 .offset = 0,
97 .size = SZ_128K,
98 .mask_flags = MTD_WRITEABLE, /* force read-only */
99 },
100 /* bootloader params in the next sector */
101 {
102 .name = "params",
103 .offset = MTDPART_OFS_APPEND,
104 .size = SZ_128K,
105 .mask_flags = 0,
106 },
107 /* kernel */
108 {
109 .name = "kernel",
110 .offset = MTDPART_OFS_APPEND,
111 .size = SZ_2M,
112 .mask_flags = 0
113 },
114 /* file system */
115 {
116 .name = "filesystem",
117 .offset = MTDPART_OFS_APPEND,
118 .size = MTDPART_SIZ_FULL,
119 .mask_flags = 0
120 }
121 };
122
123 static struct physmap_flash_data h2_nor_data = {
124 .width = 2,
125 .set_vpp = omap1_set_vpp,
126 .parts = h2_nor_partitions,
127 .nr_parts = ARRAY_SIZE(h2_nor_partitions),
128 };
129
130 static struct resource h2_nor_resource = {
131 /* This is on CS3, wherever it's mapped */
132 .flags = IORESOURCE_MEM,
133 };
134
135 static struct platform_device h2_nor_device = {
136 .name = "physmap-flash",
137 .id = 0,
138 .dev = {
139 .platform_data = &h2_nor_data,
140 },
141 .num_resources = 1,
142 .resource = &h2_nor_resource,
143 };
144
145 static struct mtd_partition h2_nand_partitions[] = {
146 #if 0
147 /* REVISIT: enable these partitions if you make NAND BOOT
148 * work on your H2 (rev C or newer); published versions of
149 * x-load only support P2 and H3.
150 */
151 {
152 .name = "xloader",
153 .offset = 0,
154 .size = 64 * 1024,
155 .mask_flags = MTD_WRITEABLE, /* force read-only */
156 },
157 {
158 .name = "bootloader",
159 .offset = MTDPART_OFS_APPEND,
160 .size = 256 * 1024,
161 .mask_flags = MTD_WRITEABLE, /* force read-only */
162 },
163 {
164 .name = "params",
165 .offset = MTDPART_OFS_APPEND,
166 .size = 192 * 1024,
167 },
168 {
169 .name = "kernel",
170 .offset = MTDPART_OFS_APPEND,
171 .size = 2 * SZ_1M,
172 },
173 #endif
174 {
175 .name = "filesystem",
176 .size = MTDPART_SIZ_FULL,
177 .offset = MTDPART_OFS_APPEND,
178 },
179 };
180
h2_nand_cmd_ctl(struct mtd_info * mtd,int cmd,unsigned int ctrl)181 static void h2_nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
182 {
183 struct nand_chip *this = mtd->priv;
184 unsigned long mask;
185
186 if (cmd == NAND_CMD_NONE)
187 return;
188
189 mask = (ctrl & NAND_CLE) ? 0x02 : 0;
190 if (ctrl & NAND_ALE)
191 mask |= 0x04;
192 writeb(cmd, (unsigned long)this->IO_ADDR_W | mask);
193 }
194
195 #define H2_NAND_RB_GPIO_PIN 62
196
h2_nand_dev_ready(struct mtd_info * mtd)197 static int h2_nand_dev_ready(struct mtd_info *mtd)
198 {
199 return gpio_get_value(H2_NAND_RB_GPIO_PIN);
200 }
201
202 static const char *h2_part_probes[] = { "cmdlinepart", NULL };
203
204 static struct platform_nand_data h2_nand_platdata = {
205 .chip = {
206 .nr_chips = 1,
207 .chip_offset = 0,
208 .nr_partitions = ARRAY_SIZE(h2_nand_partitions),
209 .partitions = h2_nand_partitions,
210 .options = NAND_SAMSUNG_LP_OPTIONS,
211 .part_probe_types = h2_part_probes,
212 },
213 .ctrl = {
214 .cmd_ctrl = h2_nand_cmd_ctl,
215 .dev_ready = h2_nand_dev_ready,
216
217 },
218 };
219
220 static struct resource h2_nand_resource = {
221 .flags = IORESOURCE_MEM,
222 };
223
224 static struct platform_device h2_nand_device = {
225 .name = "gen_nand",
226 .id = 0,
227 .dev = {
228 .platform_data = &h2_nand_platdata,
229 },
230 .num_resources = 1,
231 .resource = &h2_nand_resource,
232 };
233
234 static struct smc91x_platdata h2_smc91x_info = {
235 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
236 .leda = RPC_LED_100_10,
237 .ledb = RPC_LED_TX_RX,
238 };
239
240 static struct resource h2_smc91x_resources[] = {
241 [0] = {
242 .start = OMAP1610_ETHR_START, /* Physical */
243 .end = OMAP1610_ETHR_START + 0xf,
244 .flags = IORESOURCE_MEM,
245 },
246 [1] = {
247 .start = OMAP_GPIO_IRQ(0),
248 .end = OMAP_GPIO_IRQ(0),
249 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
250 },
251 };
252
253 static struct platform_device h2_smc91x_device = {
254 .name = "smc91x",
255 .id = 0,
256 .dev = {
257 .platform_data = &h2_smc91x_info,
258 },
259 .num_resources = ARRAY_SIZE(h2_smc91x_resources),
260 .resource = h2_smc91x_resources,
261 };
262
263 static struct resource h2_kp_resources[] = {
264 [0] = {
265 .start = INT_KEYBOARD,
266 .end = INT_KEYBOARD,
267 .flags = IORESOURCE_IRQ,
268 },
269 };
270
271 static const struct matrix_keymap_data h2_keymap_data = {
272 .keymap = h2_keymap,
273 .keymap_size = ARRAY_SIZE(h2_keymap),
274 };
275
276 static struct omap_kp_platform_data h2_kp_data = {
277 .rows = 8,
278 .cols = 8,
279 .keymap_data = &h2_keymap_data,
280 .rep = true,
281 .delay = 9,
282 .dbounce = true,
283 };
284
285 static struct platform_device h2_kp_device = {
286 .name = "omap-keypad",
287 .id = -1,
288 .dev = {
289 .platform_data = &h2_kp_data,
290 },
291 .num_resources = ARRAY_SIZE(h2_kp_resources),
292 .resource = h2_kp_resources,
293 };
294
295 #define H2_IRDA_FIRSEL_GPIO_PIN 17
296
297 static struct omap_irda_config h2_irda_data = {
298 .transceiver_cap = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE,
299 .rx_channel = OMAP_DMA_UART3_RX,
300 .tx_channel = OMAP_DMA_UART3_TX,
301 .dest_start = UART3_THR,
302 .src_start = UART3_RHR,
303 .tx_trigger = 0,
304 .rx_trigger = 0,
305 };
306
307 static struct resource h2_irda_resources[] = {
308 [0] = {
309 .start = INT_UART3,
310 .end = INT_UART3,
311 .flags = IORESOURCE_IRQ,
312 },
313 };
314
315 static u64 irda_dmamask = 0xffffffff;
316
317 static struct platform_device h2_irda_device = {
318 .name = "omapirda",
319 .id = 0,
320 .dev = {
321 .platform_data = &h2_irda_data,
322 .dma_mask = &irda_dmamask,
323 },
324 .num_resources = ARRAY_SIZE(h2_irda_resources),
325 .resource = h2_irda_resources,
326 };
327
328 static struct platform_device h2_lcd_device = {
329 .name = "lcd_h2",
330 .id = -1,
331 };
332
333 static struct platform_device *h2_devices[] __initdata = {
334 &h2_nor_device,
335 &h2_nand_device,
336 &h2_smc91x_device,
337 &h2_irda_device,
338 &h2_kp_device,
339 &h2_lcd_device,
340 };
341
h2_init_smc91x(void)342 static void __init h2_init_smc91x(void)
343 {
344 if (gpio_request(0, "SMC91x irq") < 0) {
345 printk("Error requesting gpio 0 for smc91x irq\n");
346 return;
347 }
348 }
349
tps_setup(struct i2c_client * client,void * context)350 static int tps_setup(struct i2c_client *client, void *context)
351 {
352 tps65010_config_vregs1(TPS_LDO2_ENABLE | TPS_VLDO2_3_0V |
353 TPS_LDO1_ENABLE | TPS_VLDO1_3_0V);
354
355 return 0;
356 }
357
358 static struct tps65010_board tps_board = {
359 .base = H2_TPS_GPIO_BASE,
360 .outmask = 0x0f,
361 .setup = tps_setup,
362 };
363
364 static struct i2c_board_info __initdata h2_i2c_board_info[] = {
365 {
366 I2C_BOARD_INFO("tps65010", 0x48),
367 .irq = OMAP_GPIO_IRQ(58),
368 .platform_data = &tps_board,
369 }, {
370 I2C_BOARD_INFO("isp1301_omap", 0x2d),
371 .irq = OMAP_GPIO_IRQ(2),
372 },
373 };
374
375 static struct omap_usb_config h2_usb_config __initdata = {
376 /* usb1 has a Mini-AB port and external isp1301 transceiver */
377 .otg = 2,
378
379 #ifdef CONFIG_USB_GADGET_OMAP
380 .hmc_mode = 19, /* 0:host(off) 1:dev|otg 2:disabled */
381 /* .hmc_mode = 21,*/ /* 0:host(off) 1:dev(loopback) 2:host(loopback) */
382 #elif defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
383 /* needs OTG cable, or NONSTANDARD (B-to-MiniB) */
384 .hmc_mode = 20, /* 1:dev|otg(off) 1:host 2:disabled */
385 #endif
386
387 .pins[1] = 3,
388 };
389
390 static struct omap_lcd_config h2_lcd_config __initdata = {
391 .ctrl_name = "internal",
392 };
393
394 static struct omap_board_config_kernel h2_config[] __initdata = {
395 { OMAP_TAG_LCD, &h2_lcd_config },
396 };
397
h2_init(void)398 static void __init h2_init(void)
399 {
400 h2_init_smc91x();
401
402 /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
403 * to address 0 by a dip switch), NAND on CS2B. The NAND driver will
404 * notice whether a NAND chip is enabled at probe time.
405 *
406 * FIXME revC boards (and H3) support NAND-boot, with a dip switch to
407 * put NOR on CS2B and NAND (which on H2 may be 16bit) on CS3. Try
408 * detecting that in code here, to avoid probing every possible flash
409 * configuration...
410 */
411 h2_nor_resource.end = h2_nor_resource.start = omap_cs3_phys();
412 h2_nor_resource.end += SZ_32M - 1;
413
414 h2_nand_resource.end = h2_nand_resource.start = OMAP_CS2B_PHYS;
415 h2_nand_resource.end += SZ_4K - 1;
416 if (gpio_request(H2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
417 BUG();
418 gpio_direction_input(H2_NAND_RB_GPIO_PIN);
419
420 omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
421 omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
422
423 /* MMC: card detect and WP */
424 /* omap_cfg_reg(U19_ARMIO1); */ /* CD */
425 omap_cfg_reg(BALLOUT_V8_ARMIO3); /* WP */
426
427 /* Mux pins for keypad */
428 omap_cfg_reg(F18_1610_KBC0);
429 omap_cfg_reg(D20_1610_KBC1);
430 omap_cfg_reg(D19_1610_KBC2);
431 omap_cfg_reg(E18_1610_KBC3);
432 omap_cfg_reg(C21_1610_KBC4);
433 omap_cfg_reg(G18_1610_KBR0);
434 omap_cfg_reg(F19_1610_KBR1);
435 omap_cfg_reg(H14_1610_KBR2);
436 omap_cfg_reg(E20_1610_KBR3);
437 omap_cfg_reg(E19_1610_KBR4);
438 omap_cfg_reg(N19_1610_KBR5);
439
440 platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices));
441 omap_board_config = h2_config;
442 omap_board_config_size = ARRAY_SIZE(h2_config);
443 omap_serial_init();
444 omap_register_i2c_bus(1, 100, h2_i2c_board_info,
445 ARRAY_SIZE(h2_i2c_board_info));
446 omap1_usb_init(&h2_usb_config);
447 h2_mmc_init();
448 }
449
450 MACHINE_START(OMAP_H2, "TI-H2")
451 /* Maintainer: Imre Deak <imre.deak@nokia.com> */
452 .atag_offset = 0x100,
453 .map_io = omap16xx_map_io,
454 .init_early = omap1_init_early,
455 .reserve = omap_reserve,
456 .init_irq = omap1_init_irq,
457 .init_machine = h2_init,
458 .timer = &omap1_timer,
459 .restart = omap1_restart,
460 MACHINE_END
461