1/*
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
5 * Author: Brian Swetland <swetland@google.com>
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14 * GNU General Public License for more details.
15 *
16 */
17
18#include <mach/hardware.h>
19#include <mach/msm_iomap.h>
20
21	.macro	addruart, rp, rv, tmp
22#ifdef MSM_DEBUG_UART_PHYS
23	ldr	\rp, =MSM_DEBUG_UART_PHYS
24	ldr	\rv, =MSM_DEBUG_UART_BASE
25#endif
26	.endm
27
28	.macro	senduart, rd, rx
29#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
30	@ Write the 1 character to UARTDM_TF
31	str	\rd, [\rx, #0x70]
32#else
33	teq	\rx, #0
34	strne	\rd, [\rx, #0x0C]
35#endif
36	.endm
37
38	.macro	waituart, rd, rx
39#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
40	@ check for TX_EMT in UARTDM_SR
41	ldr	\rd, [\rx, #0x08]
42	tst	\rd, #0x08
43	bne	1002f
44	@ wait for TXREADY in UARTDM_ISR
451001:	ldr	\rd, [\rx, #0x14]
46	tst	\rd, #0x80
47	beq 	1001b
481002:
49	@ Clear TX_READY by writing to the UARTDM_CR register
50	mov	\rd, #0x300
51	str	\rd, [\rx, #0x10]
52	@ Write 0x1 to NCF register
53	mov 	\rd, #0x1
54	str	\rd, [\rx, #0x40]
55	@ UARTDM reg. Read to induce delay
56	ldr	\rd, [\rx, #0x08]
57#else
58	@ wait for TX_READY
591001:	ldr	\rd, [\rx, #0x08]
60	tst	\rd, #0x04
61	beq	1001b
62#endif
63	.endm
64
65	.macro	busyuart, rd, rx
66	.endm
67