1 /*
2 * linux/arch/arm/mach-mmp/pxa168.c
3 *
4 * Code specific to PXA168
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10 #include <linux/module.h>
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/list.h>
14 #include <linux/io.h>
15 #include <linux/clk.h>
16 #include <linux/platform_device.h>
17
18 #include <asm/mach/time.h>
19 #include <mach/addr-map.h>
20 #include <mach/cputype.h>
21 #include <mach/regs-apbc.h>
22 #include <mach/regs-apmu.h>
23 #include <mach/irqs.h>
24 #include <mach/dma.h>
25 #include <mach/devices.h>
26 #include <mach/mfp.h>
27 #include <linux/dma-mapping.h>
28 #include <mach/pxa168.h>
29
30 #include "common.h"
31 #include "clock.h"
32
33 #define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
34
35 static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata =
36 {
37 MFP_ADDR_X(GPIO0, GPIO36, 0x04c),
38 MFP_ADDR_X(GPIO37, GPIO55, 0x000),
39 MFP_ADDR_X(GPIO56, GPIO123, 0x0e0),
40 MFP_ADDR_X(GPIO124, GPIO127, 0x0f4),
41
42 MFP_ADDR_END,
43 };
44
pxa168_init_irq(void)45 void __init pxa168_init_irq(void)
46 {
47 icu_init_irq();
48 }
49
50 /* APB peripheral clocks */
51 static APBC_CLK(uart1, PXA168_UART1, 1, 14745600);
52 static APBC_CLK(uart2, PXA168_UART2, 1, 14745600);
53 static APBC_CLK(uart3, PXA168_UART3, 1, 14745600);
54 static APBC_CLK(twsi0, PXA168_TWSI0, 1, 33000000);
55 static APBC_CLK(twsi1, PXA168_TWSI1, 1, 33000000);
56 static APBC_CLK(pwm1, PXA168_PWM1, 1, 13000000);
57 static APBC_CLK(pwm2, PXA168_PWM2, 1, 13000000);
58 static APBC_CLK(pwm3, PXA168_PWM3, 1, 13000000);
59 static APBC_CLK(pwm4, PXA168_PWM4, 1, 13000000);
60 static APBC_CLK(ssp1, PXA168_SSP1, 4, 0);
61 static APBC_CLK(ssp2, PXA168_SSP2, 4, 0);
62 static APBC_CLK(ssp3, PXA168_SSP3, 4, 0);
63 static APBC_CLK(ssp4, PXA168_SSP4, 4, 0);
64 static APBC_CLK(ssp5, PXA168_SSP5, 4, 0);
65 static APBC_CLK(gpio, PXA168_GPIO, 0, 13000000);
66 static APBC_CLK(keypad, PXA168_KPC, 0, 32000);
67
68 static APMU_CLK(nand, NAND, 0x19b, 156000000);
69 static APMU_CLK(lcd, LCD, 0x7f, 312000000);
70 static APMU_CLK(eth, ETH, 0x09, 0);
71 static APMU_CLK(usb, USB, 0x12, 0);
72
73 /* device and clock bindings */
74 static struct clk_lookup pxa168_clkregs[] = {
75 INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
76 INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL),
77 INIT_CLKREG(&clk_uart3, "pxa2xx-uart.2", NULL),
78 INIT_CLKREG(&clk_twsi0, "pxa2xx-i2c.0", NULL),
79 INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.1", NULL),
80 INIT_CLKREG(&clk_pwm1, "pxa168-pwm.0", NULL),
81 INIT_CLKREG(&clk_pwm2, "pxa168-pwm.1", NULL),
82 INIT_CLKREG(&clk_pwm3, "pxa168-pwm.2", NULL),
83 INIT_CLKREG(&clk_pwm4, "pxa168-pwm.3", NULL),
84 INIT_CLKREG(&clk_ssp1, "pxa168-ssp.0", NULL),
85 INIT_CLKREG(&clk_ssp2, "pxa168-ssp.1", NULL),
86 INIT_CLKREG(&clk_ssp3, "pxa168-ssp.2", NULL),
87 INIT_CLKREG(&clk_ssp4, "pxa168-ssp.3", NULL),
88 INIT_CLKREG(&clk_ssp5, "pxa168-ssp.4", NULL),
89 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
90 INIT_CLKREG(&clk_lcd, "pxa168-fb", NULL),
91 INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
92 INIT_CLKREG(&clk_keypad, "pxa27x-keypad", NULL),
93 INIT_CLKREG(&clk_eth, "pxa168-eth", "MFUCLK"),
94 INIT_CLKREG(&clk_usb, "pxa168-ehci", "PXA168-USBCLK"),
95 };
96
pxa168_init(void)97 static int __init pxa168_init(void)
98 {
99 if (cpu_is_pxa168()) {
100 mfp_init_base(MFPR_VIRT_BASE);
101 mfp_init_addr(pxa168_mfp_addr_map);
102 pxa_init_dma(IRQ_PXA168_DMA_INT0, 32);
103 clkdev_add_table(ARRAY_AND_SIZE(pxa168_clkregs));
104 }
105
106 return 0;
107 }
108 postcore_initcall(pxa168_init);
109
110 /* system timer - clock enabled, 3.25MHz */
111 #define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))
112
pxa168_timer_init(void)113 static void __init pxa168_timer_init(void)
114 {
115 /* this is early, we have to initialize the CCU registers by
116 * ourselves instead of using clk_* API. Clock rate is defined
117 * by APBC_TIMERS_CLK_RST (3.25MHz) and enabled free-running
118 */
119 __raw_writel(APBC_APBCLK | APBC_RST, APBC_PXA168_TIMERS);
120
121 /* 3.25MHz, bus/functional clock enabled, release reset */
122 __raw_writel(TIMER_CLK_RST, APBC_PXA168_TIMERS);
123
124 timer_init(IRQ_PXA168_TIMER1);
125 }
126
127 struct sys_timer pxa168_timer = {
128 .init = pxa168_timer_init,
129 };
130
pxa168_clear_keypad_wakeup(void)131 void pxa168_clear_keypad_wakeup(void)
132 {
133 uint32_t val;
134 uint32_t mask = APMU_PXA168_KP_WAKE_CLR;
135
136 /* wake event clear is needed in order to clear keypad interrupt */
137 val = __raw_readl(APMU_WAKE_CLR);
138 __raw_writel(val | mask, APMU_WAKE_CLR);
139 }
140
141 /* on-chip devices */
142 PXA168_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4017000, 0x30, 21, 22);
143 PXA168_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4018000, 0x30, 23, 24);
144 PXA168_DEVICE(uart3, "pxa2xx-uart", 2, UART3, 0xd4026000, 0x30, 23, 24);
145 PXA168_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28);
146 PXA168_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28);
147 PXA168_DEVICE(pwm1, "pxa168-pwm", 0, NONE, 0xd401a000, 0x10);
148 PXA168_DEVICE(pwm2, "pxa168-pwm", 1, NONE, 0xd401a400, 0x10);
149 PXA168_DEVICE(pwm3, "pxa168-pwm", 2, NONE, 0xd401a800, 0x10);
150 PXA168_DEVICE(pwm4, "pxa168-pwm", 3, NONE, 0xd401ac00, 0x10);
151 PXA168_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);
152 PXA168_DEVICE(ssp1, "pxa168-ssp", 0, SSP1, 0xd401b000, 0x40, 52, 53);
153 PXA168_DEVICE(ssp2, "pxa168-ssp", 1, SSP2, 0xd401c000, 0x40, 54, 55);
154 PXA168_DEVICE(ssp3, "pxa168-ssp", 2, SSP3, 0xd401f000, 0x40, 56, 57);
155 PXA168_DEVICE(ssp4, "pxa168-ssp", 3, SSP4, 0xd4020000, 0x40, 58, 59);
156 PXA168_DEVICE(ssp5, "pxa168-ssp", 4, SSP5, 0xd4021000, 0x40, 60, 61);
157 PXA168_DEVICE(fb, "pxa168-fb", -1, LCD, 0xd420b000, 0x1c8);
158 PXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c);
159 PXA168_DEVICE(eth, "pxa168-eth", -1, MFU, 0xc0800000, 0x0fff);
160
161 struct resource pxa168_resource_gpio[] = {
162 {
163 .start = 0xd4019000,
164 .end = 0xd4019fff,
165 .flags = IORESOURCE_MEM,
166 }, {
167 .start = IRQ_PXA168_GPIOX,
168 .end = IRQ_PXA168_GPIOX,
169 .flags = IORESOURCE_IRQ,
170 },
171 };
172
173 struct platform_device pxa168_device_gpio = {
174 .name = "pxa-gpio",
175 .id = -1,
176 .num_resources = ARRAY_SIZE(pxa168_resource_gpio),
177 .resource = pxa168_resource_gpio,
178 };
179
180 struct resource pxa168_usb_host_resources[] = {
181 /* USB Host conroller register base */
182 [0] = {
183 .start = 0xd4209000,
184 .end = 0xd4209000 + 0x200,
185 .flags = IORESOURCE_MEM,
186 .name = "pxa168-usb-host",
187 },
188 /* USB PHY register base */
189 [1] = {
190 .start = 0xd4206000,
191 .end = 0xd4206000 + 0xff,
192 .flags = IORESOURCE_MEM,
193 .name = "pxa168-usb-phy",
194 },
195 [2] = {
196 .start = IRQ_PXA168_USB2,
197 .end = IRQ_PXA168_USB2,
198 .flags = IORESOURCE_IRQ,
199 },
200 };
201
202 static u64 pxa168_usb_host_dmamask = DMA_BIT_MASK(32);
203 struct platform_device pxa168_device_usb_host = {
204 .name = "pxa168-ehci",
205 .id = -1,
206 .dev = {
207 .dma_mask = &pxa168_usb_host_dmamask,
208 .coherent_dma_mask = DMA_BIT_MASK(32),
209 },
210
211 .num_resources = ARRAY_SIZE(pxa168_usb_host_resources),
212 .resource = pxa168_usb_host_resources,
213 };
214
pxa168_add_usb_host(struct pxa168_usb_pdata * pdata)215 int __init pxa168_add_usb_host(struct pxa168_usb_pdata *pdata)
216 {
217 pxa168_device_usb_host.dev.platform_data = pdata;
218 return platform_device_register(&pxa168_device_usb_host);
219 }
220
pxa168_restart(char mode,const char * cmd)221 void pxa168_restart(char mode, const char *cmd)
222 {
223 soft_restart(0xffff0000);
224 }
225