1 /*
2  * arch/arm/mach-ixp2000/ixdp2800.c
3  *
4  * IXDP2800 platform support
5  *
6  * Original Author: Jeffrey Daly <jeffrey.daly@intel.com>
7  * Maintainer: Deepak Saxena <dsaxena@plexity.net>
8  *
9  * Copyright (C) 2002 Intel Corp.
10  * Copyright (C) 2003-2004 MontaVista Software, Inc.
11  *
12  *  This program is free software; you can redistribute  it and/or modify it
13  *  under  the terms of  the GNU General  Public License as published by the
14  *  Free Software Foundation;  either version 2 of the  License, or (at your
15  *  option) any later version.
16  */
17 #include <linux/kernel.h>
18 #include <linux/init.h>
19 #include <linux/mm.h>
20 #include <linux/sched.h>
21 #include <linux/interrupt.h>
22 #include <linux/device.h>
23 #include <linux/bitops.h>
24 #include <linux/pci.h>
25 #include <linux/ioport.h>
26 #include <linux/delay.h>
27 #include <linux/io.h>
28 
29 #include <asm/irq.h>
30 #include <asm/pgtable.h>
31 #include <asm/page.h>
32 #include <asm/system.h>
33 #include <mach/hardware.h>
34 #include <asm/mach-types.h>
35 
36 #include <asm/mach/pci.h>
37 #include <asm/mach/map.h>
38 #include <asm/mach/irq.h>
39 #include <asm/mach/time.h>
40 #include <asm/mach/flash.h>
41 #include <asm/mach/arch.h>
42 
43 /*************************************************************************
44  * IXDP2800 timer tick
45  *************************************************************************/
46 
ixdp2800_timer_init(void)47 static void __init ixdp2800_timer_init(void)
48 {
49 	ixp2000_init_time(50000000);
50 }
51 
52 static struct sys_timer ixdp2800_timer = {
53 	.init		= ixdp2800_timer_init,
54 	.offset		= ixp2000_gettimeoffset,
55 };
56 
57 /*************************************************************************
58  * IXDP2800 PCI
59  *************************************************************************/
ixdp2800_slave_disable_pci_master(void)60 static void __init ixdp2800_slave_disable_pci_master(void)
61 {
62 	*IXP2000_PCI_CMDSTAT &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
63 }
64 
ixdp2800_master_wait_for_slave(void)65 static void __init ixdp2800_master_wait_for_slave(void)
66 {
67 	volatile u32 *addr;
68 
69 	printk(KERN_INFO "IXDP2800: waiting for slave NPU to configure "
70 			 "its BAR sizes\n");
71 
72 	addr = ixp2000_pci_config_addr(0, IXDP2X00_SLAVE_NPU_DEVFN,
73 					PCI_BASE_ADDRESS_1);
74 	do {
75 		*addr = 0xffffffff;
76 		cpu_relax();
77 	} while (*addr != 0xfe000008);
78 
79 	addr = ixp2000_pci_config_addr(0, IXDP2X00_SLAVE_NPU_DEVFN,
80 					PCI_BASE_ADDRESS_2);
81 	do {
82 		*addr = 0xffffffff;
83 		cpu_relax();
84 	} while (*addr != 0xc0000008);
85 
86 	/*
87 	 * Configure the slave's SDRAM BAR by hand.
88 	 */
89 	*addr = 0x40000008;
90 }
91 
ixdp2800_slave_wait_for_master_enable(void)92 static void __init ixdp2800_slave_wait_for_master_enable(void)
93 {
94 	printk(KERN_INFO "IXDP2800: waiting for master NPU to enable us\n");
95 
96 	while ((*IXP2000_PCI_CMDSTAT & PCI_COMMAND_MASTER) == 0)
97 		cpu_relax();
98 }
99 
ixdp2800_pci_preinit(void)100 void __init ixdp2800_pci_preinit(void)
101 {
102 	printk("ixdp2x00_pci_preinit called\n");
103 
104 	*IXP2000_PCI_ADDR_EXT = 0x0001e000;
105 
106 	if (!ixdp2x00_master_npu())
107 		ixdp2800_slave_disable_pci_master();
108 
109 	*IXP2000_PCI_SRAM_BASE_ADDR_MASK = (0x2000000 - 1) & ~0x3ffff;
110 	*IXP2000_PCI_DRAM_BASE_ADDR_MASK = (0x40000000 - 1) & ~0xfffff;
111 
112 	ixp2000_pci_preinit();
113 
114 	if (ixdp2x00_master_npu()) {
115 		/*
116 		 * Wait until the slave set its SRAM/SDRAM BAR sizes
117 		 * correctly before we proceed to scan and enumerate
118 		 * the bus.
119 		 */
120 		ixdp2800_master_wait_for_slave();
121 
122 		/*
123 		 * We configure the SDRAM BARs by hand because they
124 		 * are 1G and fall outside of the regular allocated
125 		 * PCI address space.
126 		 */
127 		*IXP2000_PCI_SDRAM_BAR = 0x00000008;
128 	} else {
129 		/*
130 		 * Wait for the master to complete scanning the bus
131 		 * and assigning resources before we proceed to scan
132 		 * the bus ourselves.  Set pci=firmware to honor the
133 		 * master's resource assignment.
134 		 */
135 		ixdp2800_slave_wait_for_master_enable();
136 		pcibios_setup("firmware");
137 	}
138 }
139 
140 /*
141  * We assign the SDRAM BARs for the two IXP2800 CPUs by hand, outside
142  * of the regular PCI window, because there's only 512M of outbound PCI
143  * memory window on each IXP, while we need 1G for each of the BARs.
144  */
ixp2800_pci_fixup(struct pci_dev * dev)145 static void __devinit ixp2800_pci_fixup(struct pci_dev *dev)
146 {
147 	if (machine_is_ixdp2800()) {
148 		dev->resource[2].start = 0;
149 		dev->resource[2].end   = 0;
150 		dev->resource[2].flags = 0;
151 	}
152 }
153 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IXP2800, ixp2800_pci_fixup);
154 
ixdp2800_pci_setup(int nr,struct pci_sys_data * sys)155 static int __init ixdp2800_pci_setup(int nr, struct pci_sys_data *sys)
156 {
157 	sys->mem_offset = 0x00000000;
158 
159 	ixp2000_pci_setup(nr, sys);
160 
161 	return 1;
162 }
163 
ixdp2800_pci_map_irq(const struct pci_dev * dev,u8 slot,u8 pin)164 static int __init ixdp2800_pci_map_irq(const struct pci_dev *dev, u8 slot,
165 	u8 pin)
166 {
167 	if (ixdp2x00_master_npu()) {
168 
169 		/*
170 		 * Root bus devices.  Slave NPU is only one with interrupt.
171 		 * Everything else, we just return -1 which is invalid.
172 		 */
173 		if(!dev->bus->self) {
174 			if(dev->devfn == IXDP2X00_SLAVE_NPU_DEVFN )
175 				return IRQ_IXDP2800_INGRESS_NPU;
176 
177 			return -1;
178 		}
179 
180 		/*
181 		 * Bridge behind the PMC slot.
182 		 */
183 		if(dev->bus->self->devfn == IXDP2X00_PMC_DEVFN &&
184 			dev->bus->parent->self->devfn == IXDP2X00_P2P_DEVFN &&
185 			!dev->bus->parent->self->bus->parent)
186 				  return IRQ_IXDP2800_PMC;
187 
188 		/*
189 		 * Device behind the first bridge
190 		 */
191 		if(dev->bus->self->devfn == IXDP2X00_P2P_DEVFN) {
192 			switch(dev->devfn) {
193 				case IXDP2X00_PMC_DEVFN:
194 					return IRQ_IXDP2800_PMC;
195 
196 				case IXDP2800_MASTER_ENET_DEVFN:
197 					return IRQ_IXDP2800_EGRESS_ENET;
198 
199 				case IXDP2800_SWITCH_FABRIC_DEVFN:
200 					return IRQ_IXDP2800_FABRIC;
201 			}
202 		}
203 
204 		return -1;
205 	} else return IRQ_IXP2000_PCIB; /* Slave NIC interrupt */
206 }
207 
ixdp2800_master_enable_slave(void)208 static void __init ixdp2800_master_enable_slave(void)
209 {
210 	volatile u32 *addr;
211 
212 	printk(KERN_INFO "IXDP2800: enabling slave NPU\n");
213 
214 	addr = (volatile u32 *)ixp2000_pci_config_addr(0,
215 					IXDP2X00_SLAVE_NPU_DEVFN,
216 					PCI_COMMAND);
217 
218 	*addr |= PCI_COMMAND_MASTER;
219 }
220 
ixdp2800_master_wait_for_slave_bus_scan(void)221 static void __init ixdp2800_master_wait_for_slave_bus_scan(void)
222 {
223 	volatile u32 *addr;
224 
225 	printk(KERN_INFO "IXDP2800: waiting for slave to finish bus scan\n");
226 
227 	addr = (volatile u32 *)ixp2000_pci_config_addr(0,
228 					IXDP2X00_SLAVE_NPU_DEVFN,
229 					PCI_COMMAND);
230 	while ((*addr & PCI_COMMAND_MEMORY) == 0)
231 		cpu_relax();
232 }
233 
ixdp2800_slave_signal_bus_scan_completion(void)234 static void __init ixdp2800_slave_signal_bus_scan_completion(void)
235 {
236 	printk(KERN_INFO "IXDP2800: bus scan done, signaling master\n");
237 	*IXP2000_PCI_CMDSTAT |= PCI_COMMAND_MEMORY;
238 }
239 
ixdp2800_pci_postinit(void)240 static void __init ixdp2800_pci_postinit(void)
241 {
242 	if (!ixdp2x00_master_npu()) {
243 		ixdp2x00_slave_pci_postinit();
244 		ixdp2800_slave_signal_bus_scan_completion();
245 	}
246 }
247 
248 struct __initdata hw_pci ixdp2800_pci __initdata = {
249 	.nr_controllers	= 1,
250 	.setup		= ixdp2800_pci_setup,
251 	.preinit	= ixdp2800_pci_preinit,
252 	.postinit	= ixdp2800_pci_postinit,
253 	.scan		= ixp2000_pci_scan_bus,
254 	.map_irq	= ixdp2800_pci_map_irq,
255 };
256 
ixdp2800_pci_init(void)257 int __init ixdp2800_pci_init(void)
258 {
259 	if (machine_is_ixdp2800()) {
260 		struct pci_dev *dev;
261 
262 		pci_common_init(&ixdp2800_pci);
263 		if (ixdp2x00_master_npu()) {
264 			dev = pci_get_bus_and_slot(1, IXDP2800_SLAVE_ENET_DEVFN);
265 			pci_remove_bus_device(dev);
266 			pci_dev_put(dev);
267 
268 			ixdp2800_master_enable_slave();
269 			ixdp2800_master_wait_for_slave_bus_scan();
270 		} else {
271 			dev = pci_get_bus_and_slot(1, IXDP2800_MASTER_ENET_DEVFN);
272 			pci_remove_bus_device(dev);
273 			pci_dev_put(dev);
274 		}
275 	}
276 
277 	return 0;
278 }
279 
280 subsys_initcall(ixdp2800_pci_init);
281 
ixdp2800_init_irq(void)282 void __init ixdp2800_init_irq(void)
283 {
284 	ixdp2x00_init_irq(IXDP2800_CPLD_INT_STAT, IXDP2800_CPLD_INT_MASK, IXDP2800_NR_IRQS);
285 }
286 
287 MACHINE_START(IXDP2800, "Intel IXDP2800 Development Platform")
288 	/* Maintainer: MontaVista Software, Inc. */
289 	.atag_offset	= 0x100,
290 	.map_io		= ixdp2x00_map_io,
291 	.init_irq	= ixdp2800_init_irq,
292 	.timer		= &ixdp2800_timer,
293 	.init_machine	= ixdp2x00_init_machine,
294 	.restart	= ixp2000_restart,
295 MACHINE_END
296 
297