1 /* linux/arch/arm/mach-exynos4/mach-smdkv310.c
2 *
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11 #include <linux/serial_core.h>
12 #include <linux/delay.h>
13 #include <linux/gpio.h>
14 #include <linux/lcd.h>
15 #include <linux/mmc/host.h>
16 #include <linux/platform_device.h>
17 #include <linux/smsc911x.h>
18 #include <linux/io.h>
19 #include <linux/i2c.h>
20 #include <linux/input.h>
21 #include <linux/pwm_backlight.h>
22
23 #include <asm/mach/arch.h>
24 #include <asm/hardware/gic.h>
25 #include <asm/mach-types.h>
26
27 #include <video/platform_lcd.h>
28 #include <plat/regs-serial.h>
29 #include <plat/regs-srom.h>
30 #include <plat/regs-fb-v4.h>
31 #include <plat/cpu.h>
32 #include <plat/devs.h>
33 #include <plat/fb.h>
34 #include <plat/keypad.h>
35 #include <plat/sdhci.h>
36 #include <plat/iic.h>
37 #include <plat/pd.h>
38 #include <plat/gpio-cfg.h>
39 #include <plat/backlight.h>
40 #include <plat/mfc.h>
41 #include <plat/ehci.h>
42 #include <plat/clock.h>
43
44 #include <mach/map.h>
45 #include <mach/ohci.h>
46
47 #include "common.h"
48
49 /* Following are default values for UCON, ULCON and UFCON UART registers */
50 #define SMDKV310_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
51 S3C2410_UCON_RXILEVEL | \
52 S3C2410_UCON_TXIRQMODE | \
53 S3C2410_UCON_RXIRQMODE | \
54 S3C2410_UCON_RXFIFO_TOI | \
55 S3C2443_UCON_RXERR_IRQEN)
56
57 #define SMDKV310_ULCON_DEFAULT S3C2410_LCON_CS8
58
59 #define SMDKV310_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
60 S5PV210_UFCON_TXTRIG4 | \
61 S5PV210_UFCON_RXTRIG4)
62
63 static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = {
64 [0] = {
65 .hwport = 0,
66 .flags = 0,
67 .ucon = SMDKV310_UCON_DEFAULT,
68 .ulcon = SMDKV310_ULCON_DEFAULT,
69 .ufcon = SMDKV310_UFCON_DEFAULT,
70 },
71 [1] = {
72 .hwport = 1,
73 .flags = 0,
74 .ucon = SMDKV310_UCON_DEFAULT,
75 .ulcon = SMDKV310_ULCON_DEFAULT,
76 .ufcon = SMDKV310_UFCON_DEFAULT,
77 },
78 [2] = {
79 .hwport = 2,
80 .flags = 0,
81 .ucon = SMDKV310_UCON_DEFAULT,
82 .ulcon = SMDKV310_ULCON_DEFAULT,
83 .ufcon = SMDKV310_UFCON_DEFAULT,
84 },
85 [3] = {
86 .hwport = 3,
87 .flags = 0,
88 .ucon = SMDKV310_UCON_DEFAULT,
89 .ulcon = SMDKV310_ULCON_DEFAULT,
90 .ufcon = SMDKV310_UFCON_DEFAULT,
91 },
92 };
93
94 static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = {
95 .cd_type = S3C_SDHCI_CD_INTERNAL,
96 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
97 #ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
98 .max_width = 8,
99 .host_caps = MMC_CAP_8_BIT_DATA,
100 #endif
101 };
102
103 static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = {
104 .cd_type = S3C_SDHCI_CD_GPIO,
105 .ext_cd_gpio = EXYNOS4_GPK0(2),
106 .ext_cd_gpio_invert = 1,
107 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
108 };
109
110 static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = {
111 .cd_type = S3C_SDHCI_CD_INTERNAL,
112 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
113 #ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
114 .max_width = 8,
115 .host_caps = MMC_CAP_8_BIT_DATA,
116 #endif
117 };
118
119 static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = {
120 .cd_type = S3C_SDHCI_CD_GPIO,
121 .ext_cd_gpio = EXYNOS4_GPK2(2),
122 .ext_cd_gpio_invert = 1,
123 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
124 };
125
lcd_lte480wv_set_power(struct plat_lcd_data * pd,unsigned int power)126 static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,
127 unsigned int power)
128 {
129 if (power) {
130 #if !defined(CONFIG_BACKLIGHT_PWM)
131 gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_HIGH, "GPD0");
132 gpio_free(EXYNOS4_GPD0(1));
133 #endif
134 /* fire nRESET on power up */
135 gpio_request_one(EXYNOS4_GPX0(6), GPIOF_OUT_INIT_HIGH, "GPX0");
136 mdelay(100);
137
138 gpio_set_value(EXYNOS4_GPX0(6), 0);
139 mdelay(10);
140
141 gpio_set_value(EXYNOS4_GPX0(6), 1);
142 mdelay(10);
143
144 gpio_free(EXYNOS4_GPX0(6));
145 } else {
146 #if !defined(CONFIG_BACKLIGHT_PWM)
147 gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_LOW, "GPD0");
148 gpio_free(EXYNOS4_GPD0(1));
149 #endif
150 }
151 }
152
153 static struct plat_lcd_data smdkv310_lcd_lte480wv_data = {
154 .set_power = lcd_lte480wv_set_power,
155 };
156
157 static struct platform_device smdkv310_lcd_lte480wv = {
158 .name = "platform-lcd",
159 .dev.parent = &s5p_device_fimd0.dev,
160 .dev.platform_data = &smdkv310_lcd_lte480wv_data,
161 };
162
163 static struct s3c_fb_pd_win smdkv310_fb_win0 = {
164 .win_mode = {
165 .left_margin = 13,
166 .right_margin = 8,
167 .upper_margin = 7,
168 .lower_margin = 5,
169 .hsync_len = 3,
170 .vsync_len = 1,
171 .xres = 800,
172 .yres = 480,
173 },
174 .max_bpp = 32,
175 .default_bpp = 24,
176 };
177
178 static struct s3c_fb_platdata smdkv310_lcd0_pdata __initdata = {
179 .win[0] = &smdkv310_fb_win0,
180 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
181 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
182 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
183 };
184
185 static struct resource smdkv310_smsc911x_resources[] = {
186 [0] = {
187 .start = EXYNOS4_PA_SROM_BANK(1),
188 .end = EXYNOS4_PA_SROM_BANK(1) + SZ_64K - 1,
189 .flags = IORESOURCE_MEM,
190 },
191 [1] = {
192 .start = IRQ_EINT(5),
193 .end = IRQ_EINT(5),
194 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
195 },
196 };
197
198 static struct smsc911x_platform_config smsc9215_config = {
199 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
200 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
201 .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
202 .phy_interface = PHY_INTERFACE_MODE_MII,
203 .mac = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
204 };
205
206 static struct platform_device smdkv310_smsc911x = {
207 .name = "smsc911x",
208 .id = -1,
209 .num_resources = ARRAY_SIZE(smdkv310_smsc911x_resources),
210 .resource = smdkv310_smsc911x_resources,
211 .dev = {
212 .platform_data = &smsc9215_config,
213 },
214 };
215
216 static uint32_t smdkv310_keymap[] __initdata = {
217 /* KEY(row, col, keycode) */
218 KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
219 KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
220 KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
221 KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
222 };
223
224 static struct matrix_keymap_data smdkv310_keymap_data __initdata = {
225 .keymap = smdkv310_keymap,
226 .keymap_size = ARRAY_SIZE(smdkv310_keymap),
227 };
228
229 static struct samsung_keypad_platdata smdkv310_keypad_data __initdata = {
230 .keymap_data = &smdkv310_keymap_data,
231 .rows = 2,
232 .cols = 8,
233 };
234
235 static struct i2c_board_info i2c_devs1[] __initdata = {
236 {I2C_BOARD_INFO("wm8994", 0x1a),},
237 };
238
239 /* USB EHCI */
240 static struct s5p_ehci_platdata smdkv310_ehci_pdata;
241
smdkv310_ehci_init(void)242 static void __init smdkv310_ehci_init(void)
243 {
244 struct s5p_ehci_platdata *pdata = &smdkv310_ehci_pdata;
245
246 s5p_ehci_set_platdata(pdata);
247 }
248
249 /* USB OHCI */
250 static struct exynos4_ohci_platdata smdkv310_ohci_pdata;
251
smdkv310_ohci_init(void)252 static void __init smdkv310_ohci_init(void)
253 {
254 struct exynos4_ohci_platdata *pdata = &smdkv310_ohci_pdata;
255
256 exynos4_ohci_set_platdata(pdata);
257 }
258
259 static struct platform_device *smdkv310_devices[] __initdata = {
260 &s3c_device_hsmmc0,
261 &s3c_device_hsmmc1,
262 &s3c_device_hsmmc2,
263 &s3c_device_hsmmc3,
264 &s3c_device_i2c1,
265 &s5p_device_i2c_hdmiphy,
266 &s3c_device_rtc,
267 &s3c_device_wdt,
268 &s5p_device_ehci,
269 &s5p_device_fimc0,
270 &s5p_device_fimc1,
271 &s5p_device_fimc2,
272 &s5p_device_fimc3,
273 &exynos4_device_ac97,
274 &exynos4_device_i2s0,
275 &exynos4_device_ohci,
276 &samsung_device_keypad,
277 &s5p_device_mfc,
278 &s5p_device_mfc_l,
279 &s5p_device_mfc_r,
280 &exynos4_device_pd[PD_MFC],
281 &exynos4_device_pd[PD_G3D],
282 &exynos4_device_pd[PD_LCD0],
283 &exynos4_device_pd[PD_LCD1],
284 &exynos4_device_pd[PD_CAM],
285 &exynos4_device_pd[PD_TV],
286 &exynos4_device_pd[PD_GPS],
287 &exynos4_device_spdif,
288 &exynos4_device_sysmmu,
289 &samsung_asoc_dma,
290 &samsung_asoc_idma,
291 &s5p_device_fimd0,
292 &smdkv310_lcd_lte480wv,
293 &smdkv310_smsc911x,
294 &exynos4_device_ahci,
295 &s5p_device_hdmi,
296 &s5p_device_mixer,
297 };
298
smdkv310_smsc911x_init(void)299 static void __init smdkv310_smsc911x_init(void)
300 {
301 u32 cs1;
302
303 /* configure nCS1 width to 16 bits */
304 cs1 = __raw_readl(S5P_SROM_BW) &
305 ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
306 cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
307 (1 << S5P_SROM_BW__WAITENABLE__SHIFT) |
308 (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
309 S5P_SROM_BW__NCS1__SHIFT;
310 __raw_writel(cs1, S5P_SROM_BW);
311
312 /* set timing for nCS1 suitable for ethernet chip */
313 __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
314 (0x9 << S5P_SROM_BCX__TACP__SHIFT) |
315 (0xc << S5P_SROM_BCX__TCAH__SHIFT) |
316 (0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
317 (0x6 << S5P_SROM_BCX__TACC__SHIFT) |
318 (0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
319 (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
320 }
321
322 /* LCD Backlight data */
323 static struct samsung_bl_gpio_info smdkv310_bl_gpio_info = {
324 .no = EXYNOS4_GPD0(1),
325 .func = S3C_GPIO_SFN(2),
326 };
327
328 static struct platform_pwm_backlight_data smdkv310_bl_data = {
329 .pwm_id = 1,
330 .pwm_period_ns = 1000,
331 };
332
s5p_tv_setup(void)333 static void s5p_tv_setup(void)
334 {
335 /* direct HPD to HDMI chip */
336 WARN_ON(gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug"));
337 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
338 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
339
340 /* setup dependencies between TV devices */
341 s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev;
342 s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev;
343 }
344
smdkv310_map_io(void)345 static void __init smdkv310_map_io(void)
346 {
347 exynos_init_io(NULL, 0);
348 s3c24xx_init_clocks(24000000);
349 s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs));
350 }
351
smdkv310_reserve(void)352 static void __init smdkv310_reserve(void)
353 {
354 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
355 }
356
smdkv310_machine_init(void)357 static void __init smdkv310_machine_init(void)
358 {
359 s3c_i2c1_set_platdata(NULL);
360 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
361
362 smdkv310_smsc911x_init();
363
364 s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata);
365 s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata);
366 s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata);
367 s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata);
368
369 s5p_tv_setup();
370 s5p_i2c_hdmiphy_set_platdata(NULL);
371
372 samsung_keypad_set_platdata(&smdkv310_keypad_data);
373
374 samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
375 s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata);
376
377 smdkv310_ehci_init();
378 smdkv310_ohci_init();
379 clk_xusbxti.rate = 24000000;
380
381 platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
382 s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
383 }
384
385 MACHINE_START(SMDKV310, "SMDKV310")
386 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
387 /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
388 .atag_offset = 0x100,
389 .init_irq = exynos4_init_irq,
390 .map_io = smdkv310_map_io,
391 .handle_irq = gic_handle_irq,
392 .init_machine = smdkv310_machine_init,
393 .timer = &exynos4_timer,
394 .reserve = &smdkv310_reserve,
395 .restart = exynos4_restart,
396 MACHINE_END
397
398 MACHINE_START(SMDKC210, "SMDKC210")
399 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
400 .atag_offset = 0x100,
401 .init_irq = exynos4_init_irq,
402 .map_io = smdkv310_map_io,
403 .handle_irq = gic_handle_irq,
404 .init_machine = smdkv310_machine_init,
405 .timer = &exynos4_timer,
406 .restart = exynos4_restart,
407 MACHINE_END
408