1 /* linux/arch/arm/mach-exynos4/mach-origen.c
2 *
3 * Copyright (c) 2011 Insignal Co., Ltd.
4 * http://www.insignal.co.kr/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11 #include <linux/serial_core.h>
12 #include <linux/gpio.h>
13 #include <linux/mmc/host.h>
14 #include <linux/platform_device.h>
15 #include <linux/io.h>
16 #include <linux/input.h>
17 #include <linux/pwm_backlight.h>
18 #include <linux/gpio_keys.h>
19 #include <linux/i2c.h>
20 #include <linux/regulator/machine.h>
21 #include <linux/mfd/max8997.h>
22 #include <linux/lcd.h>
23
24 #include <asm/mach/arch.h>
25 #include <asm/hardware/gic.h>
26 #include <asm/mach-types.h>
27
28 #include <video/platform_lcd.h>
29
30 #include <plat/regs-serial.h>
31 #include <plat/regs-fb-v4.h>
32 #include <plat/cpu.h>
33 #include <plat/devs.h>
34 #include <plat/sdhci.h>
35 #include <plat/iic.h>
36 #include <plat/ehci.h>
37 #include <plat/clock.h>
38 #include <plat/gpio-cfg.h>
39 #include <plat/backlight.h>
40 #include <plat/pd.h>
41 #include <plat/fb.h>
42 #include <plat/mfc.h>
43
44 #include <mach/ohci.h>
45 #include <mach/map.h>
46
47 #include "common.h"
48
49 /* Following are default values for UCON, ULCON and UFCON UART registers */
50 #define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
51 S3C2410_UCON_RXILEVEL | \
52 S3C2410_UCON_TXIRQMODE | \
53 S3C2410_UCON_RXIRQMODE | \
54 S3C2410_UCON_RXFIFO_TOI | \
55 S3C2443_UCON_RXERR_IRQEN)
56
57 #define ORIGEN_ULCON_DEFAULT S3C2410_LCON_CS8
58
59 #define ORIGEN_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
60 S5PV210_UFCON_TXTRIG4 | \
61 S5PV210_UFCON_RXTRIG4)
62
63 static struct s3c2410_uartcfg origen_uartcfgs[] __initdata = {
64 [0] = {
65 .hwport = 0,
66 .flags = 0,
67 .ucon = ORIGEN_UCON_DEFAULT,
68 .ulcon = ORIGEN_ULCON_DEFAULT,
69 .ufcon = ORIGEN_UFCON_DEFAULT,
70 },
71 [1] = {
72 .hwport = 1,
73 .flags = 0,
74 .ucon = ORIGEN_UCON_DEFAULT,
75 .ulcon = ORIGEN_ULCON_DEFAULT,
76 .ufcon = ORIGEN_UFCON_DEFAULT,
77 },
78 [2] = {
79 .hwport = 2,
80 .flags = 0,
81 .ucon = ORIGEN_UCON_DEFAULT,
82 .ulcon = ORIGEN_ULCON_DEFAULT,
83 .ufcon = ORIGEN_UFCON_DEFAULT,
84 },
85 [3] = {
86 .hwport = 3,
87 .flags = 0,
88 .ucon = ORIGEN_UCON_DEFAULT,
89 .ulcon = ORIGEN_ULCON_DEFAULT,
90 .ufcon = ORIGEN_UFCON_DEFAULT,
91 },
92 };
93
94 static struct regulator_consumer_supply __initdata ldo3_consumer[] = {
95 REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"), /* MIPI */
96 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), /* HDMI */
97 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), /* HDMI */
98 };
99 static struct regulator_consumer_supply __initdata ldo6_consumer[] = {
100 REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"), /* MIPI */
101 };
102 static struct regulator_consumer_supply __initdata ldo7_consumer[] = {
103 REGULATOR_SUPPLY("avdd", "alc5625"), /* Realtek ALC5625 */
104 };
105 static struct regulator_consumer_supply __initdata ldo8_consumer[] = {
106 REGULATOR_SUPPLY("vdd", "s5p-adc"), /* ADC */
107 REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"), /* HDMI */
108 };
109 static struct regulator_consumer_supply __initdata ldo9_consumer[] = {
110 REGULATOR_SUPPLY("dvdd", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
111 };
112 static struct regulator_consumer_supply __initdata ldo11_consumer[] = {
113 REGULATOR_SUPPLY("dvdd", "alc5625"), /* Realtek ALC5625 */
114 };
115 static struct regulator_consumer_supply __initdata ldo14_consumer[] = {
116 REGULATOR_SUPPLY("avdd18", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
117 };
118 static struct regulator_consumer_supply __initdata ldo17_consumer[] = {
119 REGULATOR_SUPPLY("vdd33", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
120 };
121 static struct regulator_consumer_supply __initdata buck1_consumer[] = {
122 REGULATOR_SUPPLY("vdd_arm", NULL), /* CPUFREQ */
123 };
124 static struct regulator_consumer_supply __initdata buck2_consumer[] = {
125 REGULATOR_SUPPLY("vdd_int", NULL), /* CPUFREQ */
126 };
127 static struct regulator_consumer_supply __initdata buck3_consumer[] = {
128 REGULATOR_SUPPLY("vdd_g3d", "mali_drm"), /* G3D */
129 };
130 static struct regulator_consumer_supply __initdata buck7_consumer[] = {
131 REGULATOR_SUPPLY("vcc", "platform-lcd"), /* LCD */
132 };
133
134 static struct regulator_init_data __initdata max8997_ldo1_data = {
135 .constraints = {
136 .name = "VDD_ABB_3.3V",
137 .min_uV = 3300000,
138 .max_uV = 3300000,
139 .apply_uV = 1,
140 .state_mem = {
141 .disabled = 1,
142 },
143 },
144 };
145
146 static struct regulator_init_data __initdata max8997_ldo2_data = {
147 .constraints = {
148 .name = "VDD_ALIVE_1.1V",
149 .min_uV = 1100000,
150 .max_uV = 1100000,
151 .apply_uV = 1,
152 .always_on = 1,
153 .state_mem = {
154 .enabled = 1,
155 },
156 },
157 };
158
159 static struct regulator_init_data __initdata max8997_ldo3_data = {
160 .constraints = {
161 .name = "VMIPI_1.1V",
162 .min_uV = 1100000,
163 .max_uV = 1100000,
164 .apply_uV = 1,
165 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
166 .state_mem = {
167 .disabled = 1,
168 },
169 },
170 .num_consumer_supplies = ARRAY_SIZE(ldo3_consumer),
171 .consumer_supplies = ldo3_consumer,
172 };
173
174 static struct regulator_init_data __initdata max8997_ldo4_data = {
175 .constraints = {
176 .name = "VDD_RTC_1.8V",
177 .min_uV = 1800000,
178 .max_uV = 1800000,
179 .apply_uV = 1,
180 .always_on = 1,
181 .state_mem = {
182 .disabled = 1,
183 },
184 },
185 };
186
187 static struct regulator_init_data __initdata max8997_ldo6_data = {
188 .constraints = {
189 .name = "VMIPI_1.8V",
190 .min_uV = 1800000,
191 .max_uV = 1800000,
192 .apply_uV = 1,
193 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
194 .state_mem = {
195 .disabled = 1,
196 },
197 },
198 .num_consumer_supplies = ARRAY_SIZE(ldo6_consumer),
199 .consumer_supplies = ldo6_consumer,
200 };
201
202 static struct regulator_init_data __initdata max8997_ldo7_data = {
203 .constraints = {
204 .name = "VDD_AUD_1.8V",
205 .min_uV = 1800000,
206 .max_uV = 1800000,
207 .apply_uV = 1,
208 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
209 .state_mem = {
210 .disabled = 1,
211 },
212 },
213 .num_consumer_supplies = ARRAY_SIZE(ldo7_consumer),
214 .consumer_supplies = ldo7_consumer,
215 };
216
217 static struct regulator_init_data __initdata max8997_ldo8_data = {
218 .constraints = {
219 .name = "VADC_3.3V",
220 .min_uV = 3300000,
221 .max_uV = 3300000,
222 .apply_uV = 1,
223 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
224 .state_mem = {
225 .disabled = 1,
226 },
227 },
228 .num_consumer_supplies = ARRAY_SIZE(ldo8_consumer),
229 .consumer_supplies = ldo8_consumer,
230 };
231
232 static struct regulator_init_data __initdata max8997_ldo9_data = {
233 .constraints = {
234 .name = "DVDD_SWB_2.8V",
235 .min_uV = 2800000,
236 .max_uV = 2800000,
237 .apply_uV = 1,
238 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
239 .state_mem = {
240 .disabled = 1,
241 },
242 },
243 .num_consumer_supplies = ARRAY_SIZE(ldo9_consumer),
244 .consumer_supplies = ldo9_consumer,
245 };
246
247 static struct regulator_init_data __initdata max8997_ldo10_data = {
248 .constraints = {
249 .name = "VDD_PLL_1.1V",
250 .min_uV = 1100000,
251 .max_uV = 1100000,
252 .apply_uV = 1,
253 .always_on = 1,
254 .state_mem = {
255 .disabled = 1,
256 },
257 },
258 };
259
260 static struct regulator_init_data __initdata max8997_ldo11_data = {
261 .constraints = {
262 .name = "VDD_AUD_3V",
263 .min_uV = 3000000,
264 .max_uV = 3000000,
265 .apply_uV = 1,
266 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
267 .state_mem = {
268 .disabled = 1,
269 },
270 },
271 .num_consumer_supplies = ARRAY_SIZE(ldo11_consumer),
272 .consumer_supplies = ldo11_consumer,
273 };
274
275 static struct regulator_init_data __initdata max8997_ldo14_data = {
276 .constraints = {
277 .name = "AVDD18_SWB_1.8V",
278 .min_uV = 1800000,
279 .max_uV = 1800000,
280 .apply_uV = 1,
281 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
282 .state_mem = {
283 .disabled = 1,
284 },
285 },
286 .num_consumer_supplies = ARRAY_SIZE(ldo14_consumer),
287 .consumer_supplies = ldo14_consumer,
288 };
289
290 static struct regulator_init_data __initdata max8997_ldo17_data = {
291 .constraints = {
292 .name = "VDD_SWB_3.3V",
293 .min_uV = 3300000,
294 .max_uV = 3300000,
295 .apply_uV = 1,
296 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
297 .state_mem = {
298 .disabled = 1,
299 },
300 },
301 .num_consumer_supplies = ARRAY_SIZE(ldo17_consumer),
302 .consumer_supplies = ldo17_consumer,
303 };
304
305 static struct regulator_init_data __initdata max8997_ldo21_data = {
306 .constraints = {
307 .name = "VDD_MIF_1.2V",
308 .min_uV = 1200000,
309 .max_uV = 1200000,
310 .apply_uV = 1,
311 .always_on = 1,
312 .state_mem = {
313 .disabled = 1,
314 },
315 },
316 };
317
318 static struct regulator_init_data __initdata max8997_buck1_data = {
319 .constraints = {
320 .name = "VDD_ARM_1.2V",
321 .min_uV = 950000,
322 .max_uV = 1350000,
323 .always_on = 1,
324 .boot_on = 1,
325 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
326 .state_mem = {
327 .disabled = 1,
328 },
329 },
330 .num_consumer_supplies = ARRAY_SIZE(buck1_consumer),
331 .consumer_supplies = buck1_consumer,
332 };
333
334 static struct regulator_init_data __initdata max8997_buck2_data = {
335 .constraints = {
336 .name = "VDD_INT_1.1V",
337 .min_uV = 900000,
338 .max_uV = 1100000,
339 .always_on = 1,
340 .boot_on = 1,
341 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
342 .state_mem = {
343 .disabled = 1,
344 },
345 },
346 .num_consumer_supplies = ARRAY_SIZE(buck2_consumer),
347 .consumer_supplies = buck2_consumer,
348 };
349
350 static struct regulator_init_data __initdata max8997_buck3_data = {
351 .constraints = {
352 .name = "VDD_G3D_1.1V",
353 .min_uV = 900000,
354 .max_uV = 1100000,
355 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
356 REGULATOR_CHANGE_STATUS,
357 .state_mem = {
358 .disabled = 1,
359 },
360 },
361 .num_consumer_supplies = ARRAY_SIZE(buck3_consumer),
362 .consumer_supplies = buck3_consumer,
363 };
364
365 static struct regulator_init_data __initdata max8997_buck5_data = {
366 .constraints = {
367 .name = "VDDQ_M1M2_1.2V",
368 .min_uV = 1200000,
369 .max_uV = 1200000,
370 .apply_uV = 1,
371 .always_on = 1,
372 .state_mem = {
373 .disabled = 1,
374 },
375 },
376 };
377
378 static struct regulator_init_data __initdata max8997_buck7_data = {
379 .constraints = {
380 .name = "VDD_LCD_3.3V",
381 .min_uV = 3300000,
382 .max_uV = 3300000,
383 .boot_on = 1,
384 .apply_uV = 1,
385 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
386 .state_mem = {
387 .disabled = 1
388 },
389 },
390 .num_consumer_supplies = ARRAY_SIZE(buck7_consumer),
391 .consumer_supplies = buck7_consumer,
392 };
393
394 static struct max8997_regulator_data __initdata origen_max8997_regulators[] = {
395 { MAX8997_LDO1, &max8997_ldo1_data },
396 { MAX8997_LDO2, &max8997_ldo2_data },
397 { MAX8997_LDO3, &max8997_ldo3_data },
398 { MAX8997_LDO4, &max8997_ldo4_data },
399 { MAX8997_LDO6, &max8997_ldo6_data },
400 { MAX8997_LDO7, &max8997_ldo7_data },
401 { MAX8997_LDO8, &max8997_ldo8_data },
402 { MAX8997_LDO9, &max8997_ldo9_data },
403 { MAX8997_LDO10, &max8997_ldo10_data },
404 { MAX8997_LDO11, &max8997_ldo11_data },
405 { MAX8997_LDO14, &max8997_ldo14_data },
406 { MAX8997_LDO17, &max8997_ldo17_data },
407 { MAX8997_LDO21, &max8997_ldo21_data },
408 { MAX8997_BUCK1, &max8997_buck1_data },
409 { MAX8997_BUCK2, &max8997_buck2_data },
410 { MAX8997_BUCK3, &max8997_buck3_data },
411 { MAX8997_BUCK5, &max8997_buck5_data },
412 { MAX8997_BUCK7, &max8997_buck7_data },
413 };
414
415 struct max8997_platform_data __initdata origen_max8997_pdata = {
416 .num_regulators = ARRAY_SIZE(origen_max8997_regulators),
417 .regulators = origen_max8997_regulators,
418
419 .wakeup = true,
420 .buck1_gpiodvs = false,
421 .buck2_gpiodvs = false,
422 .buck5_gpiodvs = false,
423 .irq_base = IRQ_GPIO_END + 1,
424
425 .ignore_gpiodvs_side_effect = true,
426 .buck125_default_idx = 0x0,
427
428 .buck125_gpios[0] = EXYNOS4_GPX0(0),
429 .buck125_gpios[1] = EXYNOS4_GPX0(1),
430 .buck125_gpios[2] = EXYNOS4_GPX0(2),
431
432 .buck1_voltage[0] = 1350000,
433 .buck1_voltage[1] = 1300000,
434 .buck1_voltage[2] = 1250000,
435 .buck1_voltage[3] = 1200000,
436 .buck1_voltage[4] = 1150000,
437 .buck1_voltage[5] = 1100000,
438 .buck1_voltage[6] = 1000000,
439 .buck1_voltage[7] = 950000,
440
441 .buck2_voltage[0] = 1100000,
442 .buck2_voltage[1] = 1100000,
443 .buck2_voltage[2] = 1100000,
444 .buck2_voltage[3] = 1100000,
445 .buck2_voltage[4] = 1000000,
446 .buck2_voltage[5] = 1000000,
447 .buck2_voltage[6] = 1000000,
448 .buck2_voltage[7] = 1000000,
449
450 .buck5_voltage[0] = 1200000,
451 .buck5_voltage[1] = 1200000,
452 .buck5_voltage[2] = 1200000,
453 .buck5_voltage[3] = 1200000,
454 .buck5_voltage[4] = 1200000,
455 .buck5_voltage[5] = 1200000,
456 .buck5_voltage[6] = 1200000,
457 .buck5_voltage[7] = 1200000,
458 };
459
460 /* I2C0 */
461 static struct i2c_board_info i2c0_devs[] __initdata = {
462 {
463 I2C_BOARD_INFO("max8997", (0xCC >> 1)),
464 .platform_data = &origen_max8997_pdata,
465 .irq = IRQ_EINT(4),
466 },
467 };
468
469 static struct s3c_sdhci_platdata origen_hsmmc0_pdata __initdata = {
470 .cd_type = S3C_SDHCI_CD_INTERNAL,
471 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
472 };
473
474 static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = {
475 .cd_type = S3C_SDHCI_CD_INTERNAL,
476 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
477 };
478
479 /* USB EHCI */
480 static struct s5p_ehci_platdata origen_ehci_pdata;
481
origen_ehci_init(void)482 static void __init origen_ehci_init(void)
483 {
484 struct s5p_ehci_platdata *pdata = &origen_ehci_pdata;
485
486 s5p_ehci_set_platdata(pdata);
487 }
488
489 /* USB OHCI */
490 static struct exynos4_ohci_platdata origen_ohci_pdata;
491
origen_ohci_init(void)492 static void __init origen_ohci_init(void)
493 {
494 struct exynos4_ohci_platdata *pdata = &origen_ohci_pdata;
495
496 exynos4_ohci_set_platdata(pdata);
497 }
498
499 static struct gpio_keys_button origen_gpio_keys_table[] = {
500 {
501 .code = KEY_MENU,
502 .gpio = EXYNOS4_GPX1(5),
503 .desc = "gpio-keys: KEY_MENU",
504 .type = EV_KEY,
505 .active_low = 1,
506 .wakeup = 1,
507 .debounce_interval = 1,
508 }, {
509 .code = KEY_HOME,
510 .gpio = EXYNOS4_GPX1(6),
511 .desc = "gpio-keys: KEY_HOME",
512 .type = EV_KEY,
513 .active_low = 1,
514 .wakeup = 1,
515 .debounce_interval = 1,
516 }, {
517 .code = KEY_BACK,
518 .gpio = EXYNOS4_GPX1(7),
519 .desc = "gpio-keys: KEY_BACK",
520 .type = EV_KEY,
521 .active_low = 1,
522 .wakeup = 1,
523 .debounce_interval = 1,
524 }, {
525 .code = KEY_UP,
526 .gpio = EXYNOS4_GPX2(0),
527 .desc = "gpio-keys: KEY_UP",
528 .type = EV_KEY,
529 .active_low = 1,
530 .wakeup = 1,
531 .debounce_interval = 1,
532 }, {
533 .code = KEY_DOWN,
534 .gpio = EXYNOS4_GPX2(1),
535 .desc = "gpio-keys: KEY_DOWN",
536 .type = EV_KEY,
537 .active_low = 1,
538 .wakeup = 1,
539 .debounce_interval = 1,
540 },
541 };
542
543 static struct gpio_keys_platform_data origen_gpio_keys_data = {
544 .buttons = origen_gpio_keys_table,
545 .nbuttons = ARRAY_SIZE(origen_gpio_keys_table),
546 };
547
548 static struct platform_device origen_device_gpiokeys = {
549 .name = "gpio-keys",
550 .dev = {
551 .platform_data = &origen_gpio_keys_data,
552 },
553 };
554
lcd_hv070wsa_set_power(struct plat_lcd_data * pd,unsigned int power)555 static void lcd_hv070wsa_set_power(struct plat_lcd_data *pd, unsigned int power)
556 {
557 int ret;
558
559 if (power)
560 ret = gpio_request_one(EXYNOS4_GPE3(4),
561 GPIOF_OUT_INIT_HIGH, "GPE3_4");
562 else
563 ret = gpio_request_one(EXYNOS4_GPE3(4),
564 GPIOF_OUT_INIT_LOW, "GPE3_4");
565
566 gpio_free(EXYNOS4_GPE3(4));
567
568 if (ret)
569 pr_err("failed to request gpio for LCD power: %d\n", ret);
570 }
571
572 static struct plat_lcd_data origen_lcd_hv070wsa_data = {
573 .set_power = lcd_hv070wsa_set_power,
574 };
575
576 static struct platform_device origen_lcd_hv070wsa = {
577 .name = "platform-lcd",
578 .dev.parent = &s5p_device_fimd0.dev,
579 .dev.platform_data = &origen_lcd_hv070wsa_data,
580 };
581
582 static struct s3c_fb_pd_win origen_fb_win0 = {
583 .win_mode = {
584 .left_margin = 64,
585 .right_margin = 16,
586 .upper_margin = 64,
587 .lower_margin = 16,
588 .hsync_len = 48,
589 .vsync_len = 3,
590 .xres = 1024,
591 .yres = 600,
592 },
593 .max_bpp = 32,
594 .default_bpp = 24,
595 };
596
597 static struct s3c_fb_platdata origen_lcd_pdata __initdata = {
598 .win[0] = &origen_fb_win0,
599 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
600 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
601 VIDCON1_INV_VCLK,
602 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
603 };
604
605 static struct platform_device *origen_devices[] __initdata = {
606 &s3c_device_hsmmc2,
607 &s3c_device_hsmmc0,
608 &s3c_device_i2c0,
609 &s3c_device_rtc,
610 &s3c_device_wdt,
611 &s5p_device_ehci,
612 &s5p_device_fimc0,
613 &s5p_device_fimc1,
614 &s5p_device_fimc2,
615 &s5p_device_fimc3,
616 &s5p_device_fimd0,
617 &s5p_device_hdmi,
618 &s5p_device_i2c_hdmiphy,
619 &s5p_device_mfc,
620 &s5p_device_mfc_l,
621 &s5p_device_mfc_r,
622 &s5p_device_mixer,
623 &exynos4_device_ohci,
624 &exynos4_device_pd[PD_LCD0],
625 &exynos4_device_pd[PD_TV],
626 &exynos4_device_pd[PD_G3D],
627 &exynos4_device_pd[PD_LCD1],
628 &exynos4_device_pd[PD_CAM],
629 &exynos4_device_pd[PD_GPS],
630 &exynos4_device_pd[PD_MFC],
631 &origen_device_gpiokeys,
632 &origen_lcd_hv070wsa,
633 };
634
635 /* LCD Backlight data */
636 static struct samsung_bl_gpio_info origen_bl_gpio_info = {
637 .no = EXYNOS4_GPD0(0),
638 .func = S3C_GPIO_SFN(2),
639 };
640
641 static struct platform_pwm_backlight_data origen_bl_data = {
642 .pwm_id = 0,
643 .pwm_period_ns = 1000,
644 };
645
s5p_tv_setup(void)646 static void s5p_tv_setup(void)
647 {
648 /* Direct HPD to HDMI chip */
649 gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
650 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
651 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
652 }
653
origen_map_io(void)654 static void __init origen_map_io(void)
655 {
656 exynos_init_io(NULL, 0);
657 s3c24xx_init_clocks(24000000);
658 s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs));
659 }
660
origen_power_init(void)661 static void __init origen_power_init(void)
662 {
663 gpio_request(EXYNOS4_GPX0(4), "PMIC_IRQ");
664 s3c_gpio_cfgpin(EXYNOS4_GPX0(4), S3C_GPIO_SFN(0xf));
665 s3c_gpio_setpull(EXYNOS4_GPX0(4), S3C_GPIO_PULL_NONE);
666 }
667
origen_reserve(void)668 static void __init origen_reserve(void)
669 {
670 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
671 }
672
origen_machine_init(void)673 static void __init origen_machine_init(void)
674 {
675 origen_power_init();
676
677 s3c_i2c0_set_platdata(NULL);
678 i2c_register_board_info(0, i2c0_devs, ARRAY_SIZE(i2c0_devs));
679
680 /*
681 * Since sdhci instance 2 can contain a bootable media,
682 * sdhci instance 0 is registered after instance 2.
683 */
684 s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata);
685 s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata);
686
687 origen_ehci_init();
688 origen_ohci_init();
689 clk_xusbxti.rate = 24000000;
690
691 s5p_tv_setup();
692 s5p_i2c_hdmiphy_set_platdata(NULL);
693
694 s5p_fimd0_set_platdata(&origen_lcd_pdata);
695
696 platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices));
697
698 s5p_device_fimd0.dev.parent = &exynos4_device_pd[PD_LCD0].dev;
699
700 s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev;
701 s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev;
702
703 s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
704
705 samsung_bl_set(&origen_bl_gpio_info, &origen_bl_data);
706 }
707
708 MACHINE_START(ORIGEN, "ORIGEN")
709 /* Maintainer: JeongHyeon Kim <jhkim@insignal.co.kr> */
710 .atag_offset = 0x100,
711 .init_irq = exynos4_init_irq,
712 .map_io = origen_map_io,
713 .handle_irq = gic_handle_irq,
714 .init_machine = origen_machine_init,
715 .timer = &exynos4_timer,
716 .reserve = &origen_reserve,
717 .restart = exynos4_restart,
718 MACHINE_END
719