1 /* linux/arch/arm/mach-exynos4/dma.c
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
7 * Jaswinder Singh <jassi.brar@samsung.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24 #include <linux/dma-mapping.h>
25 #include <linux/amba/bus.h>
26 #include <linux/amba/pl330.h>
27 #include <linux/of.h>
28
29 #include <asm/irq.h>
30 #include <plat/devs.h>
31 #include <plat/irqs.h>
32
33 #include <mach/map.h>
34 #include <mach/irqs.h>
35 #include <mach/dma.h>
36
37 static u64 dma_dmamask = DMA_BIT_MASK(32);
38
39 u8 pdma0_peri[] = {
40 DMACH_PCM0_RX,
41 DMACH_PCM0_TX,
42 DMACH_PCM2_RX,
43 DMACH_PCM2_TX,
44 DMACH_MSM_REQ0,
45 DMACH_MSM_REQ2,
46 DMACH_SPI0_RX,
47 DMACH_SPI0_TX,
48 DMACH_SPI2_RX,
49 DMACH_SPI2_TX,
50 DMACH_I2S0S_TX,
51 DMACH_I2S0_RX,
52 DMACH_I2S0_TX,
53 DMACH_I2S2_RX,
54 DMACH_I2S2_TX,
55 DMACH_UART0_RX,
56 DMACH_UART0_TX,
57 DMACH_UART2_RX,
58 DMACH_UART2_TX,
59 DMACH_UART4_RX,
60 DMACH_UART4_TX,
61 DMACH_SLIMBUS0_RX,
62 DMACH_SLIMBUS0_TX,
63 DMACH_SLIMBUS2_RX,
64 DMACH_SLIMBUS2_TX,
65 DMACH_SLIMBUS4_RX,
66 DMACH_SLIMBUS4_TX,
67 DMACH_AC97_MICIN,
68 DMACH_AC97_PCMIN,
69 DMACH_AC97_PCMOUT,
70 };
71
72 struct dma_pl330_platdata exynos4_pdma0_pdata = {
73 .nr_valid_peri = ARRAY_SIZE(pdma0_peri),
74 .peri_id = pdma0_peri,
75 };
76
77 struct amba_device exynos4_device_pdma0 = {
78 .dev = {
79 .init_name = "dma-pl330.0",
80 .dma_mask = &dma_dmamask,
81 .coherent_dma_mask = DMA_BIT_MASK(32),
82 .platform_data = &exynos4_pdma0_pdata,
83 },
84 .res = {
85 .start = EXYNOS4_PA_PDMA0,
86 .end = EXYNOS4_PA_PDMA0 + SZ_4K,
87 .flags = IORESOURCE_MEM,
88 },
89 .irq = {IRQ_PDMA0, NO_IRQ},
90 .periphid = 0x00041330,
91 };
92
93 u8 pdma1_peri[] = {
94 DMACH_PCM0_RX,
95 DMACH_PCM0_TX,
96 DMACH_PCM1_RX,
97 DMACH_PCM1_TX,
98 DMACH_MSM_REQ1,
99 DMACH_MSM_REQ3,
100 DMACH_SPI1_RX,
101 DMACH_SPI1_TX,
102 DMACH_I2S0S_TX,
103 DMACH_I2S0_RX,
104 DMACH_I2S0_TX,
105 DMACH_I2S1_RX,
106 DMACH_I2S1_TX,
107 DMACH_UART0_RX,
108 DMACH_UART0_TX,
109 DMACH_UART1_RX,
110 DMACH_UART1_TX,
111 DMACH_UART3_RX,
112 DMACH_UART3_TX,
113 DMACH_SLIMBUS1_RX,
114 DMACH_SLIMBUS1_TX,
115 DMACH_SLIMBUS3_RX,
116 DMACH_SLIMBUS3_TX,
117 DMACH_SLIMBUS5_RX,
118 DMACH_SLIMBUS5_TX,
119 };
120
121 struct dma_pl330_platdata exynos4_pdma1_pdata = {
122 .nr_valid_peri = ARRAY_SIZE(pdma1_peri),
123 .peri_id = pdma1_peri,
124 };
125
126 struct amba_device exynos4_device_pdma1 = {
127 .dev = {
128 .init_name = "dma-pl330.1",
129 .dma_mask = &dma_dmamask,
130 .coherent_dma_mask = DMA_BIT_MASK(32),
131 .platform_data = &exynos4_pdma1_pdata,
132 },
133 .res = {
134 .start = EXYNOS4_PA_PDMA1,
135 .end = EXYNOS4_PA_PDMA1 + SZ_4K,
136 .flags = IORESOURCE_MEM,
137 },
138 .irq = {IRQ_PDMA1, NO_IRQ},
139 .periphid = 0x00041330,
140 };
141
exynos4_dma_init(void)142 static int __init exynos4_dma_init(void)
143 {
144 if (of_have_populated_dt())
145 return 0;
146
147 dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask);
148 dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask);
149 amba_device_register(&exynos4_device_pdma0, &iomem_resource);
150
151 dma_cap_set(DMA_SLAVE, exynos4_pdma1_pdata.cap_mask);
152 dma_cap_set(DMA_CYCLIC, exynos4_pdma1_pdata.cap_mask);
153 amba_device_register(&exynos4_device_pdma1, &iomem_resource);
154
155 return 0;
156 }
157 arch_initcall(exynos4_dma_init);
158