1 /*
2  * arch/arm/mach-ep93xx/vision_ep9307.c
3  * Vision Engraving Systems EP9307 SoM support.
4  *
5  * Copyright (C) 2008-2011 Vision Engraving Systems
6  * H Hartley Sweeten <hsweeten@visionengravers.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or (at
11  * your option) any later version.
12  */
13 
14 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15 
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/platform_device.h>
19 #include <linux/irq.h>
20 #include <linux/gpio.h>
21 #include <linux/fb.h>
22 #include <linux/io.h>
23 #include <linux/mtd/partitions.h>
24 #include <linux/i2c.h>
25 #include <linux/i2c-gpio.h>
26 #include <linux/i2c/pca953x.h>
27 #include <linux/spi/spi.h>
28 #include <linux/spi/flash.h>
29 #include <linux/spi/mmc_spi.h>
30 #include <linux/mmc/host.h>
31 
32 #include <mach/hardware.h>
33 #include <mach/fb.h>
34 #include <mach/ep93xx_spi.h>
35 #include <mach/gpio-ep93xx.h>
36 
37 #include <asm/hardware/vic.h>
38 #include <asm/mach-types.h>
39 #include <asm/mach/map.h>
40 #include <asm/mach/arch.h>
41 
42 /*************************************************************************
43  * Static I/O mappings for the FPGA
44  *************************************************************************/
45 #define VISION_PHYS_BASE	EP93XX_CS7_PHYS_BASE
46 #define VISION_VIRT_BASE	0xfebff000
47 
48 static struct map_desc vision_io_desc[] __initdata = {
49 	{
50 		.virtual	= VISION_VIRT_BASE,
51 		.pfn		= __phys_to_pfn(VISION_PHYS_BASE),
52 		.length		= SZ_4K,
53 		.type		= MT_DEVICE,
54 	},
55 };
56 
vision_map_io(void)57 static void __init vision_map_io(void)
58 {
59 	ep93xx_map_io();
60 
61 	iotable_init(vision_io_desc, ARRAY_SIZE(vision_io_desc));
62 }
63 
64 /*************************************************************************
65  * Ethernet
66  *************************************************************************/
67 static struct ep93xx_eth_data vision_eth_data __initdata = {
68 	.phy_id		= 1,
69 };
70 
71 /*************************************************************************
72  * Framebuffer
73  *************************************************************************/
74 #define VISION_LCD_ENABLE	EP93XX_GPIO_LINE_EGPIO1
75 
vision_lcd_setup(struct platform_device * pdev)76 static int vision_lcd_setup(struct platform_device *pdev)
77 {
78 	int err;
79 
80 	err = gpio_request_one(VISION_LCD_ENABLE, GPIOF_INIT_HIGH,
81 				dev_name(&pdev->dev));
82 	if (err)
83 		return err;
84 
85 	ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_RAS |
86 				 EP93XX_SYSCON_DEVCFG_RASONP3 |
87 				 EP93XX_SYSCON_DEVCFG_EXVC);
88 
89 	return 0;
90 }
91 
vision_lcd_teardown(struct platform_device * pdev)92 static void vision_lcd_teardown(struct platform_device *pdev)
93 {
94 	gpio_free(VISION_LCD_ENABLE);
95 }
96 
vision_lcd_blank(int blank_mode,struct fb_info * info)97 static void vision_lcd_blank(int blank_mode, struct fb_info *info)
98 {
99 	if (blank_mode)
100 		gpio_set_value(VISION_LCD_ENABLE, 0);
101 	else
102 		gpio_set_value(VISION_LCD_ENABLE, 1);
103 }
104 
105 static struct ep93xxfb_mach_info ep93xxfb_info __initdata = {
106 	.num_modes	= EP93XXFB_USE_MODEDB,
107 	.bpp		= 16,
108 	.flags		= EP93XXFB_USE_SDCSN0 | EP93XXFB_PCLK_FALLING,
109 	.setup		= vision_lcd_setup,
110 	.teardown	= vision_lcd_teardown,
111 	.blank		= vision_lcd_blank,
112 };
113 
114 
115 /*************************************************************************
116  * GPIO Expanders
117  *************************************************************************/
118 #define PCA9539_74_GPIO_BASE	(EP93XX_GPIO_LINE_MAX + 1)
119 #define PCA9539_75_GPIO_BASE	(PCA9539_74_GPIO_BASE + 16)
120 #define PCA9539_76_GPIO_BASE	(PCA9539_75_GPIO_BASE + 16)
121 #define PCA9539_77_GPIO_BASE	(PCA9539_76_GPIO_BASE + 16)
122 
123 static struct pca953x_platform_data pca953x_74_gpio_data = {
124 	.gpio_base	= PCA9539_74_GPIO_BASE,
125 	.irq_base	= EP93XX_BOARD_IRQ(0),
126 };
127 
128 static struct pca953x_platform_data pca953x_75_gpio_data = {
129 	.gpio_base	= PCA9539_75_GPIO_BASE,
130 	.irq_base	= -1,
131 };
132 
133 static struct pca953x_platform_data pca953x_76_gpio_data = {
134 	.gpio_base	= PCA9539_76_GPIO_BASE,
135 	.irq_base	= -1,
136 };
137 
138 static struct pca953x_platform_data pca953x_77_gpio_data = {
139 	.gpio_base	= PCA9539_77_GPIO_BASE,
140 	.irq_base	= -1,
141 };
142 
143 /*************************************************************************
144  * I2C Bus
145  *************************************************************************/
146 static struct i2c_gpio_platform_data vision_i2c_gpio_data __initdata = {
147 	.sda_pin		= EP93XX_GPIO_LINE_EEDAT,
148 	.scl_pin		= EP93XX_GPIO_LINE_EECLK,
149 };
150 
151 static struct i2c_board_info vision_i2c_info[] __initdata = {
152 	{
153 		I2C_BOARD_INFO("isl1208", 0x6f),
154 		.irq		= IRQ_EP93XX_EXT1,
155 	}, {
156 		I2C_BOARD_INFO("pca9539", 0x74),
157 		.platform_data	= &pca953x_74_gpio_data,
158 	}, {
159 		I2C_BOARD_INFO("pca9539", 0x75),
160 		.platform_data	= &pca953x_75_gpio_data,
161 	}, {
162 		I2C_BOARD_INFO("pca9539", 0x76),
163 		.platform_data	= &pca953x_76_gpio_data,
164 	}, {
165 		I2C_BOARD_INFO("pca9539", 0x77),
166 		.platform_data	= &pca953x_77_gpio_data,
167 	},
168 };
169 
170 /*************************************************************************
171  * SPI Flash
172  *************************************************************************/
173 #define VISION_SPI_FLASH_CS	EP93XX_GPIO_LINE_EGPIO7
174 
175 static struct mtd_partition vision_spi_flash_partitions[] = {
176 	{
177 		.name	= "SPI bootstrap",
178 		.offset	= 0,
179 		.size	= SZ_4K,
180 	}, {
181 		.name	= "Bootstrap config",
182 		.offset	= MTDPART_OFS_APPEND,
183 		.size	= SZ_4K,
184 	}, {
185 		.name	= "System config",
186 		.offset	= MTDPART_OFS_APPEND,
187 		.size	= MTDPART_SIZ_FULL,
188 	},
189 };
190 
191 static struct flash_platform_data vision_spi_flash_data = {
192 	.name		= "SPI Flash",
193 	.parts		= vision_spi_flash_partitions,
194 	.nr_parts	= ARRAY_SIZE(vision_spi_flash_partitions),
195 };
196 
vision_spi_flash_hw_setup(struct spi_device * spi)197 static int vision_spi_flash_hw_setup(struct spi_device *spi)
198 {
199 	return gpio_request_one(VISION_SPI_FLASH_CS, GPIOF_INIT_HIGH,
200 				spi->modalias);
201 }
202 
vision_spi_flash_hw_cleanup(struct spi_device * spi)203 static void vision_spi_flash_hw_cleanup(struct spi_device *spi)
204 {
205 	gpio_free(VISION_SPI_FLASH_CS);
206 }
207 
vision_spi_flash_hw_cs_control(struct spi_device * spi,int value)208 static void vision_spi_flash_hw_cs_control(struct spi_device *spi, int value)
209 {
210 	gpio_set_value(VISION_SPI_FLASH_CS, value);
211 }
212 
213 static struct ep93xx_spi_chip_ops vision_spi_flash_hw = {
214 	.setup		= vision_spi_flash_hw_setup,
215 	.cleanup	= vision_spi_flash_hw_cleanup,
216 	.cs_control	= vision_spi_flash_hw_cs_control,
217 };
218 
219 /*************************************************************************
220  * SPI SD/MMC host
221  *************************************************************************/
222 #define VISION_SPI_MMC_CS	EP93XX_GPIO_LINE_G(2)
223 #define VISION_SPI_MMC_WP	EP93XX_GPIO_LINE_F(0)
224 #define VISION_SPI_MMC_CD	EP93XX_GPIO_LINE_EGPIO15
225 
226 static struct gpio vision_spi_mmc_gpios[] = {
227 	{ VISION_SPI_MMC_WP, GPIOF_DIR_IN, "mmc_spi:wp" },
228 	{ VISION_SPI_MMC_CD, GPIOF_DIR_IN, "mmc_spi:cd" },
229 };
230 
vision_spi_mmc_init(struct device * pdev,irqreturn_t (* func)(int,void *),void * pdata)231 static int vision_spi_mmc_init(struct device *pdev,
232 			irqreturn_t (*func)(int, void *), void *pdata)
233 {
234 	int err;
235 
236 	err = gpio_request_array(vision_spi_mmc_gpios,
237 				 ARRAY_SIZE(vision_spi_mmc_gpios));
238 	if (err)
239 		return err;
240 
241 	err = gpio_set_debounce(VISION_SPI_MMC_CD, 1);
242 	if (err)
243 		goto exit_err;
244 
245 	err = request_irq(gpio_to_irq(VISION_SPI_MMC_CD), func,
246 			IRQ_TYPE_EDGE_BOTH, "mmc_spi:cd", pdata);
247 	if (err)
248 		goto exit_err;
249 
250 	return 0;
251 
252 exit_err:
253 	gpio_free_array(vision_spi_mmc_gpios, ARRAY_SIZE(vision_spi_mmc_gpios));
254 	return err;
255 
256 }
257 
vision_spi_mmc_exit(struct device * pdev,void * pdata)258 static void vision_spi_mmc_exit(struct device *pdev, void *pdata)
259 {
260 	free_irq(gpio_to_irq(VISION_SPI_MMC_CD), pdata);
261 	gpio_free_array(vision_spi_mmc_gpios, ARRAY_SIZE(vision_spi_mmc_gpios));
262 }
263 
vision_spi_mmc_get_ro(struct device * pdev)264 static int vision_spi_mmc_get_ro(struct device *pdev)
265 {
266 	return !!gpio_get_value(VISION_SPI_MMC_WP);
267 }
268 
vision_spi_mmc_get_cd(struct device * pdev)269 static int vision_spi_mmc_get_cd(struct device *pdev)
270 {
271 	return !gpio_get_value(VISION_SPI_MMC_CD);
272 }
273 
274 static struct mmc_spi_platform_data vision_spi_mmc_data = {
275 	.init		= vision_spi_mmc_init,
276 	.exit		= vision_spi_mmc_exit,
277 	.get_ro		= vision_spi_mmc_get_ro,
278 	.get_cd		= vision_spi_mmc_get_cd,
279 	.detect_delay	= 100,
280 	.powerup_msecs	= 100,
281 	.ocr_mask	= MMC_VDD_32_33 | MMC_VDD_33_34,
282 };
283 
vision_spi_mmc_hw_setup(struct spi_device * spi)284 static int vision_spi_mmc_hw_setup(struct spi_device *spi)
285 {
286 	return gpio_request_one(VISION_SPI_MMC_CS, GPIOF_INIT_HIGH,
287 				spi->modalias);
288 }
289 
vision_spi_mmc_hw_cleanup(struct spi_device * spi)290 static void vision_spi_mmc_hw_cleanup(struct spi_device *spi)
291 {
292 	gpio_free(VISION_SPI_MMC_CS);
293 }
294 
vision_spi_mmc_hw_cs_control(struct spi_device * spi,int value)295 static void vision_spi_mmc_hw_cs_control(struct spi_device *spi, int value)
296 {
297 	gpio_set_value(VISION_SPI_MMC_CS, value);
298 }
299 
300 static struct ep93xx_spi_chip_ops vision_spi_mmc_hw = {
301 	.setup		= vision_spi_mmc_hw_setup,
302 	.cleanup	= vision_spi_mmc_hw_cleanup,
303 	.cs_control	= vision_spi_mmc_hw_cs_control,
304 };
305 
306 /*************************************************************************
307  * SPI Bus
308  *************************************************************************/
309 static struct spi_board_info vision_spi_board_info[] __initdata = {
310 	{
311 		.modalias		= "sst25l",
312 		.platform_data		= &vision_spi_flash_data,
313 		.controller_data	= &vision_spi_flash_hw,
314 		.max_speed_hz		= 20000000,
315 		.bus_num		= 0,
316 		.chip_select		= 0,
317 		.mode			= SPI_MODE_3,
318 	}, {
319 		.modalias		= "mmc_spi",
320 		.platform_data		= &vision_spi_mmc_data,
321 		.controller_data	= &vision_spi_mmc_hw,
322 		.max_speed_hz		= 20000000,
323 		.bus_num		= 0,
324 		.chip_select		= 1,
325 		.mode			= SPI_MODE_3,
326 	},
327 };
328 
329 static struct ep93xx_spi_info vision_spi_master __initdata = {
330 	.num_chipselect		= ARRAY_SIZE(vision_spi_board_info),
331 };
332 
333 /*************************************************************************
334  * Machine Initialization
335  *************************************************************************/
vision_init_machine(void)336 static void __init vision_init_machine(void)
337 {
338 	ep93xx_init_devices();
339 	ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_64M);
340 	ep93xx_register_eth(&vision_eth_data, 1);
341 	ep93xx_register_fb(&ep93xxfb_info);
342 	ep93xx_register_pwm(1, 0);
343 
344 	/*
345 	 * Request the gpio expander's interrupt gpio line now to prevent
346 	 * the kernel from doing a WARN in gpiolib:gpio_ensure_requested().
347 	 */
348 	if (gpio_request_one(EP93XX_GPIO_LINE_F(7), GPIOF_DIR_IN,
349 				"pca9539:74"))
350 		pr_warn("cannot request interrupt gpio for pca9539:74\n");
351 
352 	vision_i2c_info[1].irq = gpio_to_irq(EP93XX_GPIO_LINE_F(7));
353 
354 	ep93xx_register_i2c(&vision_i2c_gpio_data, vision_i2c_info,
355 				ARRAY_SIZE(vision_i2c_info));
356 	ep93xx_register_spi(&vision_spi_master, vision_spi_board_info,
357 				ARRAY_SIZE(vision_spi_board_info));
358 }
359 
360 MACHINE_START(VISION_EP9307, "Vision Engraving Systems EP9307")
361 	/* Maintainer: H Hartley Sweeten <hsweeten@visionengravers.com> */
362 	.atag_offset	= 0x100,
363 	.map_io		= vision_map_io,
364 	.init_irq	= ep93xx_init_irq,
365 	.handle_irq	= vic_handle_irq,
366 	.timer		= &ep93xx_timer,
367 	.init_machine	= vision_init_machine,
368 	.restart	= ep93xx_restart,
369 MACHINE_END
370