1 /*
2 * Neuros Technologies OSD2 board support
3 *
4 * Modified from original 644X-EVM board support.
5 * 2008 (c) Neuros Technology, LLC.
6 * 2009 (c) Jorge Luis Zapata Muga <jorgeluis.zapata@gmail.com>
7 * 2009 (c) Andrey A. Porodko <Andrey.Porodko@gmail.com>
8 *
9 * The Neuros OSD 2.0 is the hardware component of the Neuros Open
10 * Internet Television Platform. Hardware is very close to TI
11 * DM644X-EVM board. It has:
12 * DM6446M02 module with 256MB NAND, 256MB RAM, TLV320AIC32 AIC,
13 * USB, Ethernet, SD/MMC, UART, THS8200, TVP7000 for video.
14 * Additionally realtime clock, IR remote control receiver,
15 * IR Blaster based on MSP430 (firmware although is different
16 * from used in DM644X-EVM), internal ATA-6 3.5” HDD drive
17 * with PATA interface, two muxed red-green leds.
18 *
19 * For more information please refer to
20 * http://wiki.neurostechnology.com/index.php/OSD_2.0_HD
21 *
22 * This file is licensed under the terms of the GNU General Public
23 * License version 2. This program is licensed "as is" without any
24 * warranty of any kind, whether express or implied.
25 */
26 #include <linux/platform_device.h>
27 #include <linux/gpio.h>
28 #include <linux/mtd/partitions.h>
29
30 #include <asm/mach-types.h>
31 #include <asm/mach/arch.h>
32
33 #include <mach/dm644x.h>
34 #include <mach/common.h>
35 #include <mach/i2c.h>
36 #include <mach/serial.h>
37 #include <mach/mux.h>
38 #include <mach/nand.h>
39 #include <mach/mmc.h>
40 #include <mach/usb.h>
41
42 #define NEUROS_OSD2_PHY_ID "davinci_mdio-0:01"
43 #define LXT971_PHY_ID 0x001378e2
44 #define LXT971_PHY_MASK 0xfffffff0
45
46 #define NTOSD2_AUDIOSOC_I2C_ADDR 0x18
47 #define NTOSD2_MSP430_I2C_ADDR 0x59
48 #define NTOSD2_MSP430_IRQ 2
49
50 /* Neuros OSD2 has a Samsung 256 MByte NAND flash (Dev ID of 0xAA,
51 * 2048 blocks in the device, 64 pages per block, 2048 bytes per
52 * page.
53 */
54
55 #define NAND_BLOCK_SIZE SZ_128K
56
57 static struct mtd_partition davinci_ntosd2_nandflash_partition[] = {
58 {
59 /* UBL (a few copies) plus U-Boot */
60 .name = "bootloader",
61 .offset = 0,
62 .size = 15 * NAND_BLOCK_SIZE,
63 .mask_flags = MTD_WRITEABLE, /* force read-only */
64 }, {
65 /* U-Boot environment */
66 .name = "params",
67 .offset = MTDPART_OFS_APPEND,
68 .size = 1 * NAND_BLOCK_SIZE,
69 .mask_flags = 0,
70 }, {
71 /* Kernel */
72 .name = "kernel",
73 .offset = MTDPART_OFS_APPEND,
74 .size = SZ_4M,
75 .mask_flags = 0,
76 }, {
77 /* File System */
78 .name = "filesystem",
79 .offset = MTDPART_OFS_APPEND,
80 .size = MTDPART_SIZ_FULL,
81 .mask_flags = 0,
82 }
83 /* A few blocks at end hold a flash Bad Block Table. */
84 };
85
86 static struct davinci_nand_pdata davinci_ntosd2_nandflash_data = {
87 .parts = davinci_ntosd2_nandflash_partition,
88 .nr_parts = ARRAY_SIZE(davinci_ntosd2_nandflash_partition),
89 .ecc_mode = NAND_ECC_HW,
90 .bbt_options = NAND_BBT_USE_FLASH,
91 };
92
93 static struct resource davinci_ntosd2_nandflash_resource[] = {
94 {
95 .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
96 .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
97 .flags = IORESOURCE_MEM,
98 }, {
99 .start = DM644X_ASYNC_EMIF_CONTROL_BASE,
100 .end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
101 .flags = IORESOURCE_MEM,
102 },
103 };
104
105 static struct platform_device davinci_ntosd2_nandflash_device = {
106 .name = "davinci_nand",
107 .id = 0,
108 .dev = {
109 .platform_data = &davinci_ntosd2_nandflash_data,
110 },
111 .num_resources = ARRAY_SIZE(davinci_ntosd2_nandflash_resource),
112 .resource = davinci_ntosd2_nandflash_resource,
113 };
114
115 static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);
116
117 static struct platform_device davinci_fb_device = {
118 .name = "davincifb",
119 .id = -1,
120 .dev = {
121 .dma_mask = &davinci_fb_dma_mask,
122 .coherent_dma_mask = DMA_BIT_MASK(32),
123 },
124 .num_resources = 0,
125 };
126
127 static struct snd_platform_data dm644x_ntosd2_snd_data;
128
129 static struct gpio_led ntosd2_leds[] = {
130 { .name = "led1_green", .gpio = GPIO(10), },
131 { .name = "led1_red", .gpio = GPIO(11), },
132 { .name = "led2_green", .gpio = GPIO(12), },
133 { .name = "led2_red", .gpio = GPIO(13), },
134 };
135
136 static struct gpio_led_platform_data ntosd2_leds_data = {
137 .num_leds = ARRAY_SIZE(ntosd2_leds),
138 .leds = ntosd2_leds,
139 };
140
141 static struct platform_device ntosd2_leds_dev = {
142 .name = "leds-gpio",
143 .id = -1,
144 .dev = {
145 .platform_data = &ntosd2_leds_data,
146 },
147 };
148
149
150 static struct platform_device *davinci_ntosd2_devices[] __initdata = {
151 &davinci_fb_device,
152 &ntosd2_leds_dev,
153 };
154
155 static struct davinci_uart_config uart_config __initdata = {
156 .enabled_uarts = (1 << 0),
157 };
158
davinci_ntosd2_map_io(void)159 static void __init davinci_ntosd2_map_io(void)
160 {
161 dm644x_init();
162 }
163
164 /*
165 I2C initialization
166 */
167 static struct davinci_i2c_platform_data ntosd2_i2c_pdata = {
168 .bus_freq = 20 /* kHz */,
169 .bus_delay = 100 /* usec */,
170 };
171
172 static struct i2c_board_info __initdata ntosd2_i2c_info[] = {
173 };
174
ntosd2_init_i2c(void)175 static int ntosd2_init_i2c(void)
176 {
177 int status;
178
179 davinci_init_i2c(&ntosd2_i2c_pdata);
180 status = gpio_request(NTOSD2_MSP430_IRQ, ntosd2_i2c_info[0].type);
181 if (status == 0) {
182 status = gpio_direction_input(NTOSD2_MSP430_IRQ);
183 if (status == 0) {
184 status = gpio_to_irq(NTOSD2_MSP430_IRQ);
185 if (status > 0) {
186 ntosd2_i2c_info[0].irq = status;
187 i2c_register_board_info(1,
188 ntosd2_i2c_info,
189 ARRAY_SIZE(ntosd2_i2c_info));
190 }
191 }
192 }
193 return status;
194 }
195
196 static struct davinci_mmc_config davinci_ntosd2_mmc_config = {
197 .wires = 4,
198 .version = MMC_CTLR_VERSION_1
199 };
200
201
202 #if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
203 defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
204 #define HAS_ATA 1
205 #else
206 #define HAS_ATA 0
207 #endif
208
209 #if defined(CONFIG_MTD_NAND_DAVINCI) || \
210 defined(CONFIG_MTD_NAND_DAVINCI_MODULE)
211 #define HAS_NAND 1
212 #else
213 #define HAS_NAND 0
214 #endif
215
davinci_ntosd2_init(void)216 static __init void davinci_ntosd2_init(void)
217 {
218 struct clk *aemif_clk;
219 struct davinci_soc_info *soc_info = &davinci_soc_info;
220 int status;
221
222 aemif_clk = clk_get(NULL, "aemif");
223 clk_enable(aemif_clk);
224
225 if (HAS_ATA) {
226 if (HAS_NAND)
227 pr_warning("WARNING: both IDE and Flash are "
228 "enabled, but they share AEMIF pins.\n"
229 "\tDisable IDE for NAND/NOR support.\n");
230 davinci_init_ide();
231 } else if (HAS_NAND) {
232 davinci_cfg_reg(DM644X_HPIEN_DISABLE);
233 davinci_cfg_reg(DM644X_ATAEN_DISABLE);
234
235 /* only one device will be jumpered and detected */
236 if (HAS_NAND)
237 platform_device_register(
238 &davinci_ntosd2_nandflash_device);
239 }
240
241 platform_add_devices(davinci_ntosd2_devices,
242 ARRAY_SIZE(davinci_ntosd2_devices));
243
244 /* Initialize I2C interface specific for this board */
245 status = ntosd2_init_i2c();
246 if (status < 0)
247 pr_warning("davinci_ntosd2_init: msp430 irq setup failed:"
248 " %d\n", status);
249
250 davinci_serial_init(&uart_config);
251 dm644x_init_asp(&dm644x_ntosd2_snd_data);
252
253 soc_info->emac_pdata->phy_id = NEUROS_OSD2_PHY_ID;
254
255 davinci_setup_usb(1000, 8);
256 /*
257 * Mux the pins to be GPIOs, VLYNQEN is already done at startup.
258 * The AEAWx are five new AEAW pins that can be muxed by separately.
259 * They are a bitmask for GPIO management. According TI
260 * documentation (http://www.ti.com/lit/gpn/tms320dm6446) to employ
261 * gpio(10,11,12,13) for leds any combination of bits works except
262 * four last. So we are to reset all five.
263 */
264 davinci_cfg_reg(DM644X_AEAW0);
265 davinci_cfg_reg(DM644X_AEAW1);
266 davinci_cfg_reg(DM644X_AEAW2);
267 davinci_cfg_reg(DM644X_AEAW3);
268 davinci_cfg_reg(DM644X_AEAW4);
269
270 davinci_setup_mmc(0, &davinci_ntosd2_mmc_config);
271 }
272
273 MACHINE_START(NEUROS_OSD2, "Neuros OSD2")
274 /* Maintainer: Neuros Technologies <neuros@groups.google.com> */
275 .atag_offset = 0x100,
276 .map_io = davinci_ntosd2_map_io,
277 .init_irq = davinci_irq_init,
278 .timer = &davinci_timer,
279 .init_machine = davinci_ntosd2_init,
280 .dma_zone_size = SZ_128M,
281 .restart = davinci_restart,
282 MACHINE_END
283